Lines Matching refs:i0
285 ldx [%i0+0], %l0
286 ldx [%i0+8], %l1
287 ldx [%i0+16], %l2 ! %l0 could be used here if Dcache hit
288 ldx [%i0+24], %l3 ! but US-II prefetch only loads Ecache
289 ldx [%i0+32], %l4 ! check on US-III: could mix preloads & splits?
290 ldx [%i0+40], %l5
291 ldx [%i0+48], %l6
292 ldx [%i0+56], %l7
293 inc 64, %i0
294 prefetch [%i0], #n_reads
326 ldx [%i0+0], %l0
330 ldx [%i0+8], %l1
334 ldx [%i0+16], %l2
338 ldx [%i0+24], %l3
342 ldx [%i0+32], %l4
346 ldx [%i0+40], %l5
350 ldx [%i0+48], %l6
353 ldx [%i0+56], %l7
355 inc 64, %i0 ! increment source address
359 prefetch [%i0], #n_reads ! next cacheline
394 ldx [%i0], %l0 ! tmp64 = *src++
395 inc 8, %i0
414 lduh [%i0], %l0 ! tmp16 = *src++
416 inc 2, %i0
423 lduh [%i0], %l0 ! tmp16 = *src++
441 add %o1, %o0, %i0 ! 16b result in %i0