Lines Matching refs:ldn
64 ldn [%g6], %g2 ! %g2 = cpu->m_cpu.intr_head[pil]
78 ldn [%g7], %g3 ! %g3 = next intr_vec_t
103 ldn [%g6 + %g3], %g6 ! %g6=cpu->m_cpu.intr_head[pil]
106 ldn [%g6 + %g3], %g6 ! %g6=cpu->m_cpu.intr_tail[pil]
192 ldn [ls1 + IV_HANDLER], os2; \
193 ldn [ls1 + IV_ARG1], %o0; \
194 ldn [ls1 + IV_ARG2], %o1; \
203 2: ldn [THREAD_REG + T_CPU], cpu; \
212 ldn [os1], os3;
234 4: ldn [os2], os5; \
260 ldn [os4 + PC_OFF], os2; \
349 ldn [THREAD_REG + T_CPU], %o2 ! delay - load CPU pointer
638 ldn [THREAD_REG + T_INTR], %o5 ! pinning anything?
742 ldn [THREAD_REG + T_SP], %sp ! delay - restore %sp
753 ldn [THREAD_REG + T_SP], %sp ! delay - restore %sp
893 ldn [THREAD_REG + T_CPU], %o3
895 ldn [THREAD_REG + T_ONFAULT], %l2
899 ldn [THREAD_REG + T_LOFAULT], %l3
910 ldn [THREAD_REG + T_ONTRAP], %l2
1322 ldn [%o3 + %o4], %l2
1331 ldn [%o3 + %o4], %l2
1337 ldn [%o3 + %o4], %l2
1521 ldn [%g6 + %g7], %g5 ! %g5 = cpu->m_cpu.intr_tail[pil]
1612 ldn [%g5], %g3 ! %g3 = pointer to first entry of
1685 ldn [%g6 + %g7], %g6 ! %g6=cpu->m_cpu.intr_head[pil]
1688 ldn [%g6 + %g7], %g6 ! %g6=cpu->m_cpu.intr_tail[pil]
1698 ldn [%g3 + IV_VEC_NEXT], %g3 ! %g3 = pointer to next intr_vec_t (iv)
1773 ldn [THREAD_REG + T_CPU], %o2 ! load CPU pointer
1836 ldn [%i0 + T_STACK], %i2 ! get stack save area pointer
1837 ldn [%i2 + (0*GREGSIZE)], %l0 ! load locals
1838 ldn [%i2 + (1*GREGSIZE)], %l1
1839 ldn [%i2 + (2*GREGSIZE)], %l2
1840 ldn [%i2 + (3*GREGSIZE)], %l3
1841 ldn [%i2 + (4*GREGSIZE)], %l4
1842 ldn [%i2 + (5*GREGSIZE)], %l5
1843 ldn [%i2 + (6*GREGSIZE)], %l6
1844 ldn [%i2 + (7*GREGSIZE)], %l7
1845 ldn [%i2 + (8*GREGSIZE)], %o0 ! put ins from stack in outs
1846 ldn [%i2 + (9*GREGSIZE)], %o1
1847 ldn [%i2 + (10*GREGSIZE)], %o2
1848 ldn [%i2 + (11*GREGSIZE)], %o3
1849 ldn [%i2 + (12*GREGSIZE)], %o4
1850 ldn [%i2 + (13*GREGSIZE)], %o5
1851 ldn [%i2 + (14*GREGSIZE)], %i4
1853 ldn [%i2 + (15*GREGSIZE)], %i5
1997 ldn [THREAD_REG + T_CPU], %o5