Lines Matching defs:etx
369 struct etx { struct
370 uint32_t tx_kick; /* 0x2000 RW Transmit Kick Register */
371 uint32_t config; /* 0x2004 RW ETX Configuration Register */
372 uint32_t txring_lo; /* 0x2008 RW Transmit Descriptor Base Low */
373 uint32_t txring_hi; /* 0x200C RW Transmit Descriptor Base Low */
374 uint32_t reserved1; /* 0x2010 */
375 uint32_t txfifo_wr_ptr; /* 0x2014 RW TxFIFO Write Pointer */
376 uint32_t txfifo_sdwr_ptr; /* 0x2018 RW TxFIFO Shadow Write Pointer */
377 uint32_t txfifo_rd_ptr; /* 0x201C RW TxFIFO Read Pointer */
378 uint32_t txfifo_sdrd_ptr; /* 0x2020 RW TxFIFO Shadow Read Pointer */
379 uint32_t txfifo_pkt_cnt; /* 0x2024 RO TxFIFO Packet Counter */
380 uint32_t state_mach; /* 0x2028 RO ETX State Machine Reg */
381 uint32_t reserved2; /* 0x202C */
382 uint32_t txdata_ptr_lo; /* 0x2030 RO ETX State Machine Register */
383 uint32_t txdata_ptr_hi; /* 0x2034 RO ETX State Machine Register */
384 uint32_t reserved3[50]; /* 0x2038 - 0x20FC */
386 uint32_t tx_completion; /* 0x2100 RO ETX Completion Register */
387 uint32_t txfifo_adrs; /* 0x2104 RW ETX FIFO address */
388 uint32_t txfifo_tag; /* 0x2108 RO ETX FIFO tag */
389 uint32_t txfifo_data_lo; /* 0x210C RW ETX FIFO data low */
390 uint32_t txfifo_data_hi_T1; /* 0x2110 RW ETX FIFO data high T1 */
391 uint32_t txfifo_data_hi_T0; /* 0x2114 RW ETX FIFO data high T0 */
392 uint32_t txfifo_size; /* 0x2118 RO ETX FIFO size */
394 uint32_t reserved4[964]; /* 0x211C - 0x3024 */
396 uint32_t txdebug; /* 0x3028 RW ETX Debug Register */