Lines Matching refs:pinst
50 fp_inst_type pinst, /* FPU instruction to simulate. */ in fldst() argument
64 fp.inst = pinst; in fldst()
65 if ((pinst.op3 >> 4) & 1) { in fldst()
66 if (pinst.ibit) { in fldst()
73 if (((pinst.op3 & 0x30) == 0x30) && (asi > ASI_SNFL)) in fldst()
74 return (vis_fldst(pfpsd, pinst, pregs, prw, asi)); in fldst()
77 if (pinst.ibit == 0) { /* effective address = rs1 + rs2 */ in fldst()
78 ftt = read_iureg(pfpsd, pinst.rs1, pregs, prw, &fea); in fldst()
81 ftt = read_iureg(pfpsd, pinst.rs2, pregs, prw, &tea); in fldst()
88 ftt = read_iureg(pfpsd, pinst.rs1, pregs, prw, &tea); in fldst()
93 sz_bits = pinst.op3 & 0x3; in fldst()
100 case 1: if (pinst.rd == 0) { /* ldfsr/stfsr */ in fldst()
127 if ((pinst.op3 >> 2) & 1) /* store */ in fldst()
476 fp_inst_type pinst, /* FPU instruction to simulate. */ in movcc() argument
492 cc = (enum cc_type) (pinst.opcode >> 0x4) & 3; in movcc()
494 cond = (enum icc_type) (pinst.rs1 & 0xf); in movcc()
568 nrd = pinst.rd; in movcc()
569 if (pinst.ibit == 0) { /* copy the value in r[rs2] */ in movcc()
572 nrs2 = pinst.rs2; in movcc()
583 fp.inst = pinst; /* Extract simm11 field */ in movcc()