Lines Matching refs:g1
508 PANIC_IF_INTR_DISABLED_PSTR(%o0, sfmmu_di_l0, %g1)
546 sethi %hi(ksfmmup), %g1
547 ldx [%g1 + %lo(ksfmmup)], %g1
548 cmp %g1, %o0
552 sethi %hi(panicstr), %g1 ! if kernel as, panic
553 ldx [%g1 + %lo(panicstr)], %g1
554 tst %g1
567 PANIC_IF_INTR_ENABLED_PSTR(sfmmu_ei_l1, %g1)
570 mov %o3, %g1 ! save sfmmu pri/sh flag in %g1
591 sethi %hi(panicstr), %g1 ! test if panicstr is already set
592 ldx [%g1 + %lo(panicstr)], %g1
593 tst %g1
783 clr %g1
792 SET_SECCTX(%o1, %g1, %o4, %o5, alloc_ctx_lbl1)
801 ldx [%o0], %g1 /* original */
807 casx [%o2], %g1, %g2
808 cmp %g1, %g2
814 mov %g3, %g1
822 ldx [%o0], %g1 /* original */
827 casx [%o2], %g1, %g2
829 cmp %g1, %g2
839 ldx [%o0], %g1
841 stx %g1, [%o1]
1353 PANIC_IF_INTR_DISABLED_PSTR(%o5, sfmmu_di_l2, %g1)
1359 TSB_UPDATE(%o0, %o2, %o1, %g1, %g2, locked_tsb_l8)
1376 SETUP_TSB_ASI(%o2, %g1)
1377 TSB_INVALIDATE(%o0, %o1, %g1, %o2, %o3, unload_tsbe)
1394 PANIC_IF_INTR_DISABLED_PSTR(%o5, sfmmu_di_l3, %g1)
1405 mov %o0, %g1 ! %g1 = vaddr
1408 GET_KPM_TSBE_POINTER(%o2, %g2, %g1, %o3, %o4)
1411 srlx %o0, TTARGET_VA_SHIFT, %g1; ! %g1 = tag target
1413 TSB_UPDATE(%g2, %o1, %g1, %o3, %o4, locked_tsb_l9)
1437 mov %o0, %g1 ! %g1 = vaddr
1440 GET_KPM_TSBE_POINTER(%o1, %g2, %g1, %o3, %o4)
1443 srlx %o0, TTARGET_VA_SHIFT, %g1; ! %g1 = tag target
1445 TSB_INVALIDATE(%g2, %g1, %o3, %o4, %o1, kpm_tsbinval)
1453 ldx [%o0], %g1 /* read tte */
1454 TTETOPFN(%g1, %o1, sfmmu_ttetopfn_l1, %g2, %g3, %g4)
1459 mov %g1, %o0
1597 ld [%g4 + %lo(test_ptl1_panic)], %g1
1599 cmp %g1, %g0
1601 or %g0, PTL1_BAD_DEBUG, %g1
1610 sethi %hi(trap), %g1
1611 or %g1, %lo(trap), %g1
1639 sethi %hi(sfmmu_tsbmiss_exception), %g1
1640 or %g1, %lo(sfmmu_tsbmiss_exception), %g1
1659 sethi %hi(sfmmu_tsbmiss_suspended), %g1
1660 or %g1, %lo(sfmmu_tsbmiss_suspended), %g1
1671 rdpr %tpc, %g1
1680 mov PTL1_BAD_WTRAP, %g1
1685 cmp %g1, %g4
1689 cmp %g1, %g4
1692 set fault_rtt_fn1, %g1
1693 wrpr %g0, %g1, %tnpc
1698 ! already got it: rdpr %tpc, %g1
1708 wrpr %g1, %tpc
1725 cmp %g1, %g4
1729 cmp %g1, %g4
1732 andn %g1, WTRAP_ALIGN, %g1 /* 128 byte aligned */
1733 add %g1, WTRAP_FAULTOFF, %g1
1734 wrpr %g0, %g1, %tnpc
1752 mov PTL1_BAD_WTRAP, %g1
1755 mov PTL1_BAD_WTRAP, %g1
1764 CPU_PADDR(%g1, %g4)
1765 add %g1, CPU_TL1_HDLR, %g1
1766 lda [%g1]ASI_MEM, %g4
1768 sta %g0, [%g1]ASI_MEM
1770 mov PTL1_BAD_TRAP, %g1
1785 CPU_INDEX(%g1, %g2)
1787 sllx %g1, CPU_CORE_SHIFT, %g1
1788 add %g1, %g2, %g1
1789 lduh [%g1 + CPUC_DTRACE_FLAGS], %g2
1793 stuh %g2, [%g1 + CPUC_DTRACE_FLAGS]
1795 stx %g3, [%g1 + CPUC_DTRACE_ILLVAL]
1798 TSTAT_CHECK_TL1(1f, %g1, %g2)
1807 sethi %hi(trap), %g1
1808 or %g1, %lo(trap), %g1
2262 RUNTIME_PATCH_SETX(%g1, %g6)
2267 GET_TSBE_POINTER(MMU_PAGESHIFT, %g1, %g7, %g3, %g5)
2268 ! %g1 = First TSB entry pointer, as TSB miss handler expects
2295 GET_1ST_TSBE_PTR(%g2, %g1, %g4, %g5)
2315 brgez,pt %g1, 9f /* check for 2nd TSB */
2319 GET_2ND_TSBE_PTR(%g7, %g1, %g3, %g4, %g5, sfmmu_uprot)
2321 mov %g1, %g7
2322 GET_1ST_TSBE_PTR(%g7, %g1, %g5, sfmmu_uprot)
2354 iktsb: sllx %g2, 64-(TAGACC_SHIFT + TSB_START_SIZE + RUNTIME_PATCH), %g1
2355 srlx %g1, 64-(TSB_START_SIZE + TSB_ENTRY_SHIFT + RUNTIME_PATCH), %g1
2356 or %g4, %g1, %g1 ! form tsb ptr
2357 ldda [%g1]RUNTIME_PATCH, %g4 ! %g4 = tag, %g5 = data
2366 ITLB_STUFF(%g5, %g1, %g2, %g3, %g4)
2383 ITLB_STUFF(%g5, %g1, %g2, %g3, %g4)
2422 dktsb: sllx %g2, 64-(TAGACC_SHIFT + TSB_START_SIZE + RUNTIME_PATCH), %g1
2423 srlx %g1, 64-(TSB_START_SIZE + TSB_ENTRY_SHIFT + RUNTIME_PATCH), %g1
2430 ldda [%g7 + %g1]RUNTIME_PATCH, %g4 ! %g4 = tag, %g5 = data
2434 add %g7, %g1, %g1 /* form tsb ptr */
2436 DTLB_STUFF(%g5, %g1, %g2, %g3, %g4)
2487 DTLB_STUFF(%g5, %g1, %g2, %g3, %g4)
2532 PROBE_1ST_ITSB(%g1, %g7, uitlb_fast_8k_probefail)
2551 PROBE_1ST_DTSB(%g1, %g7, udtlb_fast_8k_probefail)
2575 GET_1ST_TSBE_PTR(%g2, %g1, %g4, %g5)
2576 PROBE_1ST_ITSB(%g1, %g7, uitlb_8k_probefail)
2637 mov %g1, %g3 /* save tsb8k reg in %g3 */
2638 GET_1ST_TSBE_PTR(%g3, %g1, %g5, sfmmu_uitlb)
2639 PROBE_1ST_ITSB(%g1, %g7, uitlb_8k_probefail)
2747 PROBE_1ST_DTSB(%g1, %g7, udtlb_8k_first_probefail2)
2768 mov %g1, %g3
2779 GET_1ST_TSBE_PTR(%g2, %g1, %g4, %g5)
2780 PROBE_1ST_DTSB(%g1, %g7, udtlb_first_probefail)
2791 mov %g1, %g4
2792 GET_1ST_TSBE_PTR(%g4, %g1, %g5, sfmmu_udtlb)
2793 PROBE_1ST_DTSB(%g1, %g7, udtlb_first_probefail)
2873 stn %g1, [%g6 + TSBMISS_TSBPTR] /* save 1ST tsb pointer */
2894 ISM_CHECK(%g2, %g6, %g3, %g4, %g5, %g7, %g1, tsb_l1, tsb_ism)
2912 GET_TTE(%g2, %g7, %g3, %g4, %g6, %g1,
2941 GET_TTE(%g2, %g7, %g3, %g4, %g6, %g1,
2958 GET_TTE(%g2, %g7, %g3, %g4, %g6, %g1,
2979 GET_TTE(%g2, %g7, %g3, %g4, %g6, %g1,
2997 GET_TTE(%g2, %g7, %g3, %g4, %g6, %g1,
3032 GET_SHME_TTE(%g2, %g7, %g3, %g4, %g6, %g1,
3047 GET_SHME_TTE(%g2, %g7, %g3, %g4, %g6, %g1,
3061 GET_SHME_TTE(%g2, %g7, %g3, %g4, %g6, %g1,
3076 GET_SHME_TTE(%g2, %g7, %g3, %g4, %g6, %g1,
3091 GET_SHME_TTE(%g2, %g7, %g3, %g4, %g6, %g1,
3108 brz,pt %g1, tsb_validtte
3110 ldub [%g6 + TSBMISS_URTTEFLAGS], %g1
3111 or %g1, HAT_CHKCTX1_FLAG, %g1
3112 stub %g1, [%g6 + TSBMISS_URTTEFLAGS]
3114 SAVE_CTX1(%g7, %g2, %g1, tsb_shmel)
3232 and %g7, HAT_CHKCTX1_FLAG, %g1
3233 brz,a,pn %g1, 1f
3234 ldn [%g6 + TSBMISS_TSBPTR], %g1 ! g1 = 1ST TSB ptr
3235 GET_UTSBREG_SHCTX(%g6, TSBMISS_TSBSCDPTR, %g1)
3236 brlz,a,pn %g1, ptl1_panic ! if no shared 3RD tsb
3237 mov PTL1_NO_SCDTSB8K, %g1 ! panic
3238 GET_3RD_TSBE_PTR(%g5, %g1, %g6, %g7)
3241 ldn [%g6 + TSBMISS_TSBPTR], %g1 ! g1 = 1ST TSB ptr
3249 TSB_UPDATE_TL(%g1, %g3, %g2, %g4, %g7, %g6, locked_tsb_l3)
3261 DTLB_STUFF(%g5, %g1, %g2, %g3, %g4)
3265 ITLB_STUFF(%g5, %g1, %g2, %g3, %g4)
3272 and %g7, HAT_CHKCTX1_FLAG, %g1
3273 brz,a,pn %g1, 4f
3274 ldn [%g6 + TSBMISS_TSBPTR4M], %g1 ! g1 = 2ND TSB ptr
3275 GET_UTSBREG_SHCTX(%g6, TSBMISS_TSBSCDPTR4M, %g1)! g1 = 4TH TSB ptr
3276 brlz,a,pn %g1, 5f ! if no shared 4TH TSB
3278 GET_4TH_TSBE_PTR(%g5, %g1, %g6, %g7)
3281 ldn [%g6 + TSBMISS_TSBPTR4M], %g1 ! g1 = 2ND TSB ptr
3284 brlz,pn %g1, 5f /* Check to see if we have 2nd TSB programmed */
3292 TSB_UPDATE_TL(%g1, %g3, %g2, %g4, %g7, %g6, locked_tsb_l4)
3305 DTLB_STUFF(%g5, %g1, %g2, %g3, %g4)
3309 ITLB_STUFF(%g5, %g1, %g2, %g3, %g4)
3337 ldn [%g6 + TSBMISS_TSBPTR4M], %g1 /* g1 = tsbp */
3338 brlz,a,pn %g1, 5f /* no 2nd tsb */
3347 TSB_UPDATE_TL_PN(%g1, %g5, %g2, %g4, %g7, %g3, locked_tsb_l5) /* update TSB */
3349 DTLB_STUFF(%g5, %g1, %g2, %g3, %g4)
3353 ldn [%g6 + TSBMISS_TSBPTR4M], %g1 /* g1 = 2ND TSB */
3358 brlz,a,pn %g1, 7f /* Check to see if we have 2nd TSB programmed */
3363 TSB_UPDATE_TL_PN(%g1, %g5, %g2, %g4, %g7, %g3, locked_tsb_l6) /* update TSB */
3366 ITLB_STUFF(%g5, %g1, %g2, %g3, %g4)
3380 ldn [%g6 + TSBMISS_TSBPTR], %g1 ! g1 = 8K TSB ptr
3384 ldn [%g6 + TSBMISS_TSBPTR4M], %g1 ! g1 = 4M TSB ptr
3385 brlz,pn %g1, 3f /* skip programming if 4M TSB ptr is -1 */
3393 TSB_UPDATE_TL(%g1, %g3, %g2, %g4, %g7, %g6, locked_tsb_l7)
3403 DTLB_STUFF(%g5, %g1, %g2, %g3, %g4)
3407 ITLB_STUFF(%g5, %g1, %g2, %g3, %g4)
3424 mov PTL1_BAD_ISM, %g1
3429 set TAGACC_CTX_MASK, %g1 /* mask off ctx number */
3431 and %g2, %g1, %g4 /* g4 = ctx number */
3432 andn %g2, %g1, %g1 /* g1 = tlb miss vaddr */
3433 sub %g1, %g3, %g2 /* g2 = offset in ISM seg */
3445 SAVE_CTX1(%g5, %g3, %g1, tsb_shctxl)
3473 GET_TTE(%g2, %g7, %g3, %g4, %g6, %g1, MMU_PAGESHIFT32M,
3487 mov PTL1_BAD_ISM, %g1
3492 GET_TTE(%g2, %g7, %g3, %g4, %g6, %g1, MMU_PAGESHIFT256M,
3504 GET_TTE(%g2, %g7, %g3, %g4, %g6, %g1, MMU_PAGESHIFT4M,
3518 GET_TTE(%g2, %g7, %g3, %g4, %g6, %g1, MMU_PAGESHIFT64K,
3572 mov PTL1_BAD_STACK, %g1
3577 TSTAT_CHECK_TL1(2f, %g1, %g2)
3580 mov PTL1_BAD_KPROT_FAULT, %g1
3581 movne %icc, PTL1_BAD_KMISS, %g1
3594 CPU_INDEX(%g1, %g2)
3596 sllx %g1, CPU_CORE_SHIFT, %g1
3597 add %g1, %g2, %g1
3598 lduh [%g1 + CPUC_DTRACE_FLAGS], %g2
3602 stuh %g2, [%g1 + CPUC_DTRACE_FLAGS]
3604 stx %g3, [%g1 + CPUC_DTRACE_ILLVAL]
3611 TSTAT_CHECK_TL1(4f, %g1, %g2)
3621 CPU_INDEX(%g1, %g2)
3623 sllx %g1, CPU_CORE_SHIFT, %g1
3624 add %g1, %g2, %g1
3625 lduh [%g1 + CPUC_DTRACE_FLAGS], %g2
3629 stuh %g2, [%g1 + CPUC_DTRACE_FLAGS]
3631 stx %g3, [%g1 + CPUC_DTRACE_ILLVAL]
3641 mov PTL1_BAD_DTRACE_FLAGS, %g1
3669 mov PTL1_BAD_DTRACE_FLAGS, %g1
3670 TSTAT_CHECK_TL1(2f, %g1, %g2);
3694 mov PTL1_BAD_CTX_STEAL, %g1 ! since kernel ctx was stolen
3699 TSTAT_CHECK_TL1(sfmmu_mmu_trap, %g1, %g2)
3715 PANIC_IF_INTR_DISABLED_PSTR(%o3, sfmmu_di_l5, %g1)
3728 CPU_TSBMISS_AREA(%g1, %o5)
3729 ldn [%g1 + TSBMISS_KHATID], %o4
3733 mov %g1,%o5 /* o5 = tsbmiss_area */
3757 set TAGACC_CTX_MASK, %g1
3758 andn %o0, %g1, %o0
3759 GET_TTE(%o0, %o4, %g1, %g2, %o5, %g4, %g6, %g5, %g3,
3773 brgez,a,pn %g1, 6f /* if tte invalid goto tl0 */
3775 stx %g1,[%o2] /* put tte into *ttep */
3776 TTETOPFN(%g1, %o0, vatopfn_l2, %g2, %g3, %g4)
3784 mov %g1, %o0
3827 stx %g1,[%o2] /* put tte into *ttep */
3828 brgez,a,pn %g1, 8f /* if tte invalid goto 8: */
3871 PANIC_IF_INTR_DISABLED_PSTR(%o3, sfmmu_di_l6, %g1)
3879 CPU_TSBMISS_AREA(%g1, %o5)
3880 ldn [%g1 + TSBMISS_KHATID], %o4
3900 GET_TTE(%o0, %o4, %g3, %g4, %g1, %o5, %g6, %o1, %g5,
4107 ldub [%g6 + KPMTSBM_KPMPSHIFT], %g1 /* kpmp_shift */
4109 srlx %g5, %g1, %g1 /* x = ksp >> kpmp_shift */
4110 add %g5, %g1, %g5 /* y = ksp + x */
4117 ldxa [%g3 + MEMSEG_KPM_PAGESPA]%asi, %g1 /* kpm_pagespa */
4118 add %g1, %g4, %g1 /* kp_pa */
4162 ldsha [%g1 + KPMPAGE_REFCNTC]%asi, %g7 /* kp_refcntc */
4169 ldsha [%g1 + KPMPAGE_REFCNT]%asi, %g7
4176 mov ASI_N, %g1
4178 movnz %icc, ASI_MEM, %g1
4179 mov %g1, %asi
4187 TSB_LOCK_ENTRY(%g4, %g1, %g7, locked_tsb_l1)
4192 DTLB_STUFF(%g5, %g1, %g2, %g4, %g6)
4255 stx %g1, [%g6 + KPMTSBM_TSBPTR] /* save 8K kpm TSB pointer */
4263 and %g4, KPMTSBM_TLTSBM_FLAG, %g1
4265 brz,pn %g1, sfmmu_kpm_exception
4292 srlx %g2, MMU_PAGESHIFT, %g1 /* vaddr >> MMU_PAGESHIFT */
4293 and %g1, %g5, %g1 /* g1 = v */
4295 cmp %g7, %g1 /* if (r > v) */
4298 sub %g7, %g1, %g5 /* g5 = r - v */
4361 ldub [%g6 + KPMTSBM_KPMPSHIFT], %g1 /* kpmp_shift */
4363 sllx %g5, %g1, %g1 /* x = ksp << kpmp_shift */
4364 add %g5, %g1, %g5 /* y = ksp + x */
4372 ldxa [%g3 + MEMSEG_KPM_PAGESPA]%asi, %g1 /* kpm_spagespa */
4373 add %g1, %g4, %g1 /* ksp_pa */
4409 ldsba [%g1 + KPMSPAGE_MAPPED]%asi, %g7 /* kp_mapped */
4420 mov ASI_N, %g1
4422 movnz %icc, ASI_MEM, %g1
4423 mov %g1, %asi
4431 TSB_LOCK_ENTRY(%g4, %g1, %g7, locked_tsb_l2)
4587 RUNTIME_PATCH_SETX(%g1, %g6) ! %g1 = contents of ktsb_pbase
4591 GET_TSBE_POINTER(MMU_PAGESHIFT, %g1, %g7, %g3, %g5)
4592 ! %g1 = First TSB entry pointer, as TSB miss handler expects
4612 GET_1ST_TSBE_PTR(%g2, %g1, %g4, %g5)