Lines Matching +full:sub +full:- +full:processor
28 * ------------------------
30 * ------------------------
45 * matters, some functional units have multiple smaller sub-units that decode
47 * mask describing the sub-unit's registers may not be contiguous. To keep
48 * software relatively simple, we generally treat sub-units and parent units the
55 * sub-units, registers with many instances whose locations are computed in
60 * processor family (see cpuid.c) or other collection and may require their own
63 * are they generally self-discoverable. Each functional unit may be present or
65 * Zen product range. Therefore, at this time most per-unit headers are
66 * intended for use only by code that will execute on a specific processor
70 * -----
72 * -----
96 * -----------------------
98 * -----------------------
104 * example from the publicly-available Naples PPR (publication 54945 rev. 1.14)
107 * described in additional detail in sections 1.3.3-4. For our example, let us
113 * instances; in fact, there are actually 16 per core-complex die (CCD), which
116 * processor. If it were possible to access all of these instances via MMIO,
128 * begin by determining that its top-level functional unit is L3REGS with a base
137 * to consider other registers in the L3REGS unit that may not have per-core
143 * let's call it SMN_UNIT_L3REGS_COREREGS since that's the sub-unit level at
161 * describes THREADREGS::TSC. Within the COREREGS functional sub-unit, each
174 * definition allows us to collapse the last functional sub-unit in our
176 * THREADREGS sub-unit. Instead, we can follow our previous code with:
190 * stride. For example, if a block of per-core (not per-thread) registers were
205 * space occupied by registers accessed by SMN is -- so far as we can tell,
206 * practically always -- 4 bytes in size, even if the register itself is
209 * out-of-bounds unit and register instance parameters, address overflow, and
223 * Our other per-core register's accessor would look like:
230 * -----------
232 * -----------
241 * know at compile-time the name of the register of which they want instances;
257 * well as for providing CTF to foreign-language binding generators. The other
267 * Zen-related functional units and blocks (including those accessed by SMN,
286 * in this case-insensitive manner, we also follow standard code style practice
351 * An instance of an SMN-accessible register.
359 * These are intended to be macro-like (and indeed some used to be macros) but
398 (((val) & ~(0xffffffffU >> ((4 - SMN_REG_SIZE(x)) << 3))) == 0)
403 * underlying register via SMN. It must always be 32-bit aligned.
412 * The offset address is the byte offset into the 32-bit-wide data register that
426 * registers with multiple iterators, have differently-sized apertures, or both;
459 * register's address within that unit's aperture (which may be the SDP-defined
485 * This macro may be used by per-functional-unit code to construct an address
518 ASSERT3U(aperture_off, <=, UINT32_MAX - aperture_base); \