Lines Matching refs:def

72 amdzen_smupwr_smn_reg(const uint8_t ccdno, const smn_reg_def_t def,  in amdzen_smupwr_smn_reg()  argument
83 const uint32_t size32 = (def.srd_size == 0) ? 4 : in amdzen_smupwr_smn_reg()
84 (const uint32_t)def.srd_size; in amdzen_smupwr_smn_reg()
86 const uint32_t stride = (def.srd_stride == 0) ? size32 : def.srd_stride; in amdzen_smupwr_smn_reg()
87 const uint32_t nents = (def.srd_nents == 0) ? 1 : in amdzen_smupwr_smn_reg()
88 (const uint32_t)def.srd_nents; in amdzen_smupwr_smn_reg()
91 ASSERT3S(def.srd_unit, ==, SMN_UNIT_SMUPWR); in amdzen_smupwr_smn_reg()
108 const uint32_t reg = def.srd_reg + reginst32 * stride; in amdzen_smupwr_smn_reg()
220 amdzen_l3soc_smn_reg(const uint8_t ccdno, const smn_reg_def_t def, in amdzen_l3soc_smn_reg() argument
229 const uint32_t size32 = (def.srd_size == 0) ? 4 : in amdzen_l3soc_smn_reg()
230 (const uint32_t)def.srd_size; in amdzen_l3soc_smn_reg()
232 const uint32_t stride = (def.srd_stride == 0) ? size32 : def.srd_stride; in amdzen_l3soc_smn_reg()
233 const uint32_t nents = (def.srd_nents == 0) ? 1 : in amdzen_l3soc_smn_reg()
234 (const uint32_t)def.srd_nents; in amdzen_l3soc_smn_reg()
237 ASSERT3S(def.srd_unit, ==, SMN_UNIT_L3SOC); in amdzen_l3soc_smn_reg()
249 const uint32_t reg = def.srd_reg + reginst32 * stride; in amdzen_l3soc_smn_reg()
337 const smn_reg_def_t def, const uint16_t reginst) in amdzen_scfctp_smn_reg() argument
346 const uint32_t size32 = (def.srd_size == 0) ? 4 : in amdzen_scfctp_smn_reg()
347 (const uint32_t)def.srd_size; in amdzen_scfctp_smn_reg()
349 const uint32_t stride = (def.srd_stride == 0) ? 4 : def.srd_stride; in amdzen_scfctp_smn_reg()
350 const uint32_t nents = (def.srd_nents == 0) ? 1 : in amdzen_scfctp_smn_reg()
351 (const uint32_t)def.srd_nents; in amdzen_scfctp_smn_reg()
354 ASSERT3S(def.srd_unit, ==, SMN_UNIT_SCFCTP); in amdzen_scfctp_smn_reg()
367 const uint32_t reg = def.srd_reg + reginst32 * stride; in amdzen_scfctp_smn_reg()