2506     ushort_t offset, pci_regspec_t *regs, pci_regspec_t *assigned,  in add_bar_reg_props()  argument
2577 		assigned->pci_phys_hi = PCI_RELOCAT_B | regs->pci_phys_hi;  in add_bar_reg_props()
2578 		regs->pci_size_low = assigned->pci_size_low = len;  in add_bar_reg_props()
2652 		assigned->pci_phys_low = base;  in add_bar_reg_props()
2684 		regs->pci_size_low = assigned->pci_size_low = len & 0xffffffff;  in add_bar_reg_props()
2685 		regs->pci_size_hi = assigned->pci_size_hi = len >> 32;  in add_bar_reg_props()
2711 		regs->pci_phys_hi = assigned->pci_phys_hi = phys_hi;  in add_bar_reg_props()
2712 		assigned->pci_phys_hi |= PCI_RELOCAT_B;  in add_bar_reg_props()
2863 		assigned->pci_phys_mid = base_hi;  in add_bar_reg_props()
2864 		assigned->pci_phys_low = base;  in add_bar_reg_props()
2869 	    assigned->pci_phys_hi,  in add_bar_reg_props()
2870 	    assigned->pci_phys_mid,  in add_bar_reg_props()
2871 	    assigned->pci_phys_low,  in add_bar_reg_props()
2872 	    assigned->pci_size_hi,  in add_bar_reg_props()
2873 	    assigned->pci_size_low);  in add_bar_reg_props()
2895 	pci_regspec_t assigned[15] = {{0}};  in add_reg_props()  local
2938 		    &regs[nreg], &assigned[nasgn], &bar_sz, pciide);  in add_reg_props()
2982 		assigned[nasgn].pci_phys_hi = (PCI_RELOCAT_B |  in add_reg_props()
2985 		assigned[nasgn].pci_phys_low = base;  in add_reg_props()
2987 		regs[nreg].pci_size_low = assigned[nasgn].pci_size_low = len;  in add_reg_props()
3006 		regs[nreg].pci_phys_hi = assigned[nasgn].pci_phys_hi =  in add_reg_props()
3008 		regs[nreg].pci_phys_low = assigned[nasgn].pci_phys_low = 0x3b0;  in add_reg_props()
3009 		regs[nreg].pci_size_low = assigned[nasgn].pci_size_low = 0xc;  in add_reg_props()
3016 		regs[nreg].pci_phys_hi = assigned[nasgn].pci_phys_hi =  in add_reg_props()
3018 		regs[nreg].pci_phys_low = assigned[nasgn].pci_phys_low = 0x3c0;  in add_reg_props()
3019 		regs[nreg].pci_size_low = assigned[nasgn].pci_size_low = 0x20;  in add_reg_props()
3026 		regs[nreg].pci_phys_hi = assigned[nasgn].pci_phys_hi =  in add_reg_props()
3029 		    assigned[nasgn].pci_phys_low = 0xa0000;  in add_reg_props()
3031 		    assigned[nasgn].pci_size_low = 0x20000;  in add_reg_props()
3046 		regs[nreg].pci_phys_hi = assigned[nasgn].pci_phys_hi =  in add_reg_props()
3048 		regs[nreg].pci_phys_low = assigned[nasgn].pci_phys_low = 0x2e8;  in add_reg_props()
3049 		regs[nreg].pci_size_low = assigned[nasgn].pci_size_low = 0x1;  in add_reg_props()
3056 		regs[nreg].pci_phys_hi = assigned[nasgn].pci_phys_hi =  in add_reg_props()
3058 		regs[nreg].pci_phys_low = assigned[nasgn].pci_phys_low = 0x2ea;  in add_reg_props()
3059 		regs[nreg].pci_size_low = assigned[nasgn].pci_size_low = 0x6;  in add_reg_props()
3073 	    (int *)assigned, nasgn * sizeof (pci_regspec_t) / sizeof (int));  in add_reg_props()