1317 #define	UNCERRSTS_RD(pex)		nb_pci_getl(0, pex, 0, 0x104, 0)  argument
1318 #define	UNCERRMSK_RD(pex) nb_pci_getl(0, pex, 0, 0x108, 0)  argument
1323 #define	PEX_ERR_DOCMD_RD(pex)	((nb_chipset == INTEL_NB_5400) ? \  argument
1324     nb_pci_getw(0, pex, 0, 0x144, 0) : nb_pci_getl(0, pex, 0, 0x144, 0))
1325 #define	PEX_ERR_PIN_MASK_RD(pex)	nb_pci_getw(0, pex, 0, 0x146, 0)  argument
1326 #define	EMASK_UNCOR_PEX_RD(pex)	nb_pci_getl(0, pex, 0, 0x148, 0)  argument
1327 #define	EMASK_COR_PEX_RD(pex)	nb_pci_getl(0, pex, 0, 0x14c, 0)  argument
1328 #define	EMASK_RP_PEX_RD(pex)	nb_pci_getl(0, pex, 0, 0x150, 0)  argument
1330 #define	UNCERRSTS_WR(pex, val)	nb_pci_putl(0, pex, 0, 0x104, val)  argument
1331 #define	UNCERRMSK_WR(pex, val)	nb_pci_putl(0, pex, 0, 0x108, val)  argument
1336 #define	PEX_ERR_DOCMD_WR(pex, val)	((nb_chipset == INTEL_NB_5400) ? \  argument
1337     nb_pci_putw(0, pex, 0, 0x144, val) : nb_pci_putl(0, pex, 0, 0x144, val))
1338 #define	PEX_ERR_PIN_MASK_WR(pex, val)	nb_pci_putw(0, pex, 0, 0x146, val)  argument
1339 #define	EMASK_UNCOR_PEX_WR(pex, val)	nb_pci_putl(0, pex, 0, 0x148, val)  argument
1340 #define	EMASK_COR_PEX_WR(pex, val)	nb_pci_putl(0, pex, 0, 0x14c, val)  argument
1341 #define	EMASK_RP_PEX_WR(pex, val)	nb_pci_putl(0, pex, 0, 0x150, val)  argument
1343 #define	PEX_FAT_FERR_RD(pex, ip)	nb_pci_getl(0, pex, 0, 0x154, ip)  argument
1344 #define	PEX_FAT_NERR_RD(pex, ip)	nb_pci_getl(0, pex, 0, 0x15c, ip)  argument
1345 #define	PEX_NF_FERR_RD(pex, ip)	nb_pci_getl(0, pex, 0, 0x158, ip)  argument
1346 #define	PEX_NF_NERR_RD(pex, ip)	nb_pci_getl(0, pex, 0, 0x160, ip)  argument
1347 #define	UNCERRSEV_RD(pex)	nb_pci_getl(0, pex, 0, 0x10c, 0)  argument
1348 #define	CORERRSTS_RD(pex)	nb_pci_getl(0, pex, 0, 0x110, 0)  argument
1349 #define	RPERRSTS_RD(pex)	nb_pci_getl(0, pex, 0, 0x130, 0)  argument
1350 #define	RPERRSID_RD(pex)	nb_pci_getl(0, pex, 0, 0x134, 0)  argument
1351 #define	AERRCAPCTRL_RD(pex)	nb_pci_getl(0, pex, 0, 0x118, 0)  argument
1352 #define	PEXDEVSTS_RD(pex)	nb_pci_getw(0, pex, 0, 0x76, 0)  argument
1353 #define	PEXROOTCTL_RD(pex)	nb_pci_getw(0, pex, 0, 0x88, 0)  argument
1355 #define	PEX_FAT_FERR_WR(pex, val) nb_pci_putl(0, pex, 0, 0x154, val)  argument
1356 #define	PEX_FAT_NERR_WR(pex, val) nb_pci_putl(0, pex, 0, 0x15c, val)  argument
1357 #define	PEX_NF_FERR_WR(pex, val)	nb_pci_putl(0, pex, 0, 0x158, val)  argument
1358 #define	PEX_NF_NERR_WR(pex, val)	nb_pci_putl(0, pex, 0, 0x160, val)  argument
1359 #define	CORERRSTS_WR(pex, val)	nb_pci_putl(0, pex, 0, 0x110, val)  argument
1360 #define	UNCERRSEV_WR(pex, val)	nb_pci_putl(0, pex, 0, 0x10c, val)  argument
1361 #define	RPERRSTS_WR(pex, val)	nb_pci_putl(0, pex, 0, 0x130, val)  argument
1362 #define	PEXDEVSTS_WR(pex, val)	nb_pci_putl(0, pex, 0, 0x76, val)  argument
1363 #define	PEXROOTCTL_WR(pex, val)	nb_pci_putw(0, pex, 0, 0x88, val)  argument