2525     const uint_t dimmno, boolean_t ddr4_style)  in zen_umc_fill_dimm_common()  argument
2533 	dimm = &chan->chan_dimms[dimmno];  in zen_umc_fill_dimm_common()
2534 	dimm->ud_dimmno = dimmno;  in zen_umc_fill_dimm_common()
2537 		reg = UMC_DIMMCFG_DDR4(id, dimmno);  in zen_umc_fill_dimm_common()
2539 		reg = UMC_DIMMCFG_DDR5(id, dimmno);  in zen_umc_fill_dimm_common()
2602     zen_umc_chan_t *chan, const uint_t dimmno)  in zen_umc_fill_chan_dimm_ddr4()  argument
2611 	ASSERT3U(dimmno, <, ZEN_UMC_MAX_DIMMS);  in zen_umc_fill_chan_dimm_ddr4()
2612 	dimm = &chan->chan_dimms[dimmno];  in zen_umc_fill_chan_dimm_ddr4()
2624 		const uint16_t reginst = i + dimmno * 2;  in zen_umc_fill_chan_dimm_ddr4()
2654 	reg = UMC_MASK_DDR4(id, dimmno);  in zen_umc_fill_chan_dimm_ddr4()
2670 	reg = UMC_MASK_SEC_DDR4(id, dimmno);  in zen_umc_fill_chan_dimm_ddr4()
2681 	reg = UMC_ADDRCFG_DDR4(id, dimmno);  in zen_umc_fill_chan_dimm_ddr4()
2717 	reg = UMC_ADDRSEL_DDR4(id, dimmno);  in zen_umc_fill_chan_dimm_ddr4()
2742 	reg = UMC_COLSEL_LO_DDR4(id, dimmno);  in zen_umc_fill_chan_dimm_ddr4()
2753 	reg = UMC_COLSEL_HI_DDR4(id, dimmno);  in zen_umc_fill_chan_dimm_ddr4()
2772 	reg = UMC_RMSEL_DDR4(id, dimmno);  in zen_umc_fill_chan_dimm_ddr4()
2788 	reg = UMC_RMSEL_SEC_DDR4(id, dimmno);  in zen_umc_fill_chan_dimm_ddr4()
2805 	return (zen_umc_fill_dimm_common(umc, df, chan, dimmno, B_TRUE));  in zen_umc_fill_chan_dimm_ddr4()
2815     zen_umc_chan_t *chan, const uint_t dimmno, const uint_t rankno)  in zen_umc_fill_chan_rank_ddr5()  argument
2822 	const uint32_t regno = dimmno * 2 + rankno;  in zen_umc_fill_chan_rank_ddr5()
2824 	ASSERT3U(dimmno, <, ZEN_UMC_MAX_DIMMS);  in zen_umc_fill_chan_rank_ddr5()
2826 	cs = &chan->chan_dimms[dimmno].ud_cs[rankno];  in zen_umc_fill_chan_rank_ddr5()
3030 	return (zen_umc_fill_dimm_common(umc, df, chan, dimmno, B_FALSE));  in zen_umc_fill_chan_rank_ddr5()