Lines Matching refs:mmu
104 (pa_to_ma(pfn_to_pa(pfn)) | mmu.ptp_bits[(l) + 1])
107 ((pfn_to_pa(pfn & ~PFN_IS_FOREIGN_MFN) | mmu.pte_bits[l]) | \
109 (pa_to_ma(pfn_to_pa(pfn)) | mmu.pte_bits[l]))
112 (pfn_to_pa(pfn) | mmu.ptp_bits[(l) + 1])
114 (pfn_to_pa(pfn) | mmu.pte_bits[l])
144 #define LEVEL_SHIFT(l) (mmu.level_shift[l])
145 #define LEVEL_SIZE(l) (mmu.level_size[l])
146 #define LEVEL_OFFSET(l) (mmu.level_offset[l])
147 #define LEVEL_MASK(l) (mmu.level_mask[l])
237 #define PWIN_VA(x) (mmu.pwin_base + ((x) << MMU_PAGESHIFT))
238 #define PWIN_PTE_VA(x) (mmu.pwin_pte_va + ((x) << mmu.pte_size_shift))
239 #define PWIN_PTE_PA(x) (mmu.pwin_pte_pa + ((x) << mmu.pte_size_shift))
253 #define IN_VA_HOLE(va) (mmu.hole_start <= (va) && (va) < mmu.hole_end)
269 #define GET_PTE(ptr) (mmu.pae_hat ? get_pte64(ptr) : *(x86pte32_t *)(ptr))
271 ((mmu.pae_hat ? ((x86pte32_t *)(ptr))[1] = (pte >> 32) : 0), \
274 (mmu.pae_hat ? atomic_cas_64(ptr, x, y) : \
283 ((x86pte_t *)((uintptr_t)(p) + ((x) << mmu.pte_size_shift)))
290 ((paddr_t)(p) + ((x) << mmu.pte_size_shift))
301 extern struct hat_mmu_info mmu;