Lines Matching +full:slew +full:- +full:rate

18  * Copyright 1996-1997, 2002 Sun Microsystems, Inc.  All rights reserved.
36  * phase-lock loop (PLL) model used in the kernel implementation. These
62  * possible without overflow of a 32-bit word.
65  * which serves as a an extension to the low-order bits of the system
100  * oscillator plus the maximum slew rate allowed by the protocol. It
119  * The following defines are used only if a pulse-per-second (PPS)
122  * asynch driver. They establish the design parameters of the frequency-
165 #define	STA_FLL		0x0008	/* select frequency-lock mode (rw) */
180     STA_PPSERROR | STA_CLOCKERR) /* read-only bits */
193  * NTP user interface (ntp_gettime()) - used to read kernel clock values
217  * NTP daemon interface - (ntp_adjtime()) used to discipline CPU clock