Lines Matching refs:val16
699 uint16_t val16; in rge_chip_ident() local
708 PCI_CAP_ID_PCI_E, &val16) == DDI_SUCCESS; in rge_chip_ident()
721 val16 = rge_mii_get16(rgep, PHY_ID_REG_2); in rge_chip_ident()
722 val16 &= PHY_VER_MASK; in rge_chip_ident()
723 chip->phy_ver = val16; in rge_chip_ident()
733 val16 = rge_reg_get16(rgep, RT_CONFIG_1_REG); in rge_chip_ident()
734 val16 &= 0x0300; in rge_chip_ident()
735 if (val16 == 0x1) /* 66Mhz PCI */ in rge_chip_ident()
737 else if (val16 == 0x0) /* 33Mhz PCI */ in rge_chip_ident()
886 uint32_t val16; in rge_chip_init() local
901 val16 = rge_reg_get8(rgep, PHY_STATUS_REG); in rge_chip_init()
902 val16 = 0x12<<8 | val16; in rge_chip_init()
903 rge_reg_put16(rgep, PHY_STATUS_REG, val16); in rge_chip_init()
927 val16 = rge_reg_get16(rgep, CPLUS_COMMAND_REG); in rge_chip_init()
928 val16 |= RX_CKSM_OFFLOAD | RX_VLAN_DETAG; in rge_chip_init()
930 val16 |= CPLUS_BIT14 | MUL_PCI_RW_ENABLE; in rge_chip_init()
935 val16 |= MUL_PCI_RW_ENABLE; in rge_chip_init()
937 rge_reg_put16(rgep, CPLUS_COMMAND_REG, val16 & (~0x03)); in rge_chip_init()