Lines Matching refs:opcode
548 u32 opcode = 0; in ecore_dmae_opcode() local
554 opcode |= (is_src_type_grc ? DMAE_CMD_SRC_MASK_GRC in ecore_dmae_opcode()
557 opcode |= (p_hwfn->rel_pf_id & DMAE_CMD_SRC_PF_ID_MASK) << in ecore_dmae_opcode()
561 opcode |= (is_dst_type_grc ? DMAE_CMD_DST_MASK_GRC in ecore_dmae_opcode()
564 opcode |= (p_hwfn->rel_pf_id & DMAE_CMD_DST_PF_ID_MASK) << in ecore_dmae_opcode()
574 opcode |= DMAE_CMD_COMP_WORD_EN_MASK << DMAE_CMD_COMP_WORD_EN_SHIFT; in ecore_dmae_opcode()
575 opcode |= DMAE_CMD_SRC_ADDR_RESET_MASK << in ecore_dmae_opcode()
579 opcode |= 1 << DMAE_CMD_COMP_FUNC_SHIFT; in ecore_dmae_opcode()
584 opcode |= DMAE_CMD_ENDIANITY << DMAE_CMD_ENDIANITY_MODE_SHIFT; in ecore_dmae_opcode()
586 opcode |= p_hwfn->port_id << DMAE_CMD_PORT_ID_SHIFT; in ecore_dmae_opcode()
589 opcode |= DMAE_CMD_SRC_ADDR_RESET_MASK << in ecore_dmae_opcode()
593 opcode |= DMAE_CMD_DST_ADDR_RESET_MASK << in ecore_dmae_opcode()
598 opcode |= (1 << DMAE_CMD_SRC_VF_ID_VALID_SHIFT); in ecore_dmae_opcode()
605 opcode |= 1 << DMAE_CMD_DST_VF_ID_VALID_SHIFT; in ecore_dmae_opcode()
612 p_hwfn->dmae_info.p_dmae_cmd->opcode = OSAL_CPU_TO_LE32(opcode); in ecore_dmae_opcode()
639 OSAL_LE32_TO_CPU(p_command->opcode), in ecore_dmae_post_command()
653 OSAL_LE32_TO_CPU(p_command->opcode), in ecore_dmae_post_command()