1014 	int			rdc;  in nxge_param_get_rxdma_info()  local
1058 	for (rdc = 0; rdc < NXGE_MAX_RDCS; rdc++) {  in nxge_param_get_rxdma_info()
1059 		if ((1 << rdc) & set->owned.map) {  in nxge_param_get_rxdma_info()
1063 			    rdc,  in nxge_param_get_rxdma_info()
1064 			    p_dma_cfgp->rcr_timeout[rdc],  in nxge_param_get_rxdma_info()
1065 			    p_dma_cfgp->rcr_threshold[rdc],  in nxge_param_get_rxdma_info()
1066 			    (void *)rbr_rings[rdc],  in nxge_param_get_rxdma_info()
1067 			    rbr_rings[rdc]->num_blocks, (void *)rcr_rings[rdc]);  in nxge_param_get_rxdma_info()
1084 	int			offset, rdc, i, rdc_grp;  in nxge_param_get_rxdma_rdcgrp_info()  local
1136 			for (rdc = 0; rdc < rdc_grp_p->max_rdcs; rdc++) {  in nxge_param_get_rxdma_rdcgrp_info()
1139 				    buf_len, "[%d]=%d ", rdc,  in nxge_param_get_rxdma_rdcgrp_info()
1140 				    rdc_grp_p->start_rdc + rdc);  in nxge_param_get_rxdma_rdcgrp_info()
2021 		int rdc;  in nxge_param_set_port_rdc()  local
2022 		if ((rdc = nxge_dci_map(nxgep, VP_BOUND_RX, cfg_value)) < 0)  in nxge_param_set_port_rdc()
2025 		    nxgep->function_num, rdc);  in nxge_param_set_port_rdc()
2124 	int rdc;  in nxge_param_dump_rdc()  local
2131 	for (rdc = 0; rdc < NXGE_MAX_TDCS; rdc++) {  in nxge_param_dump_rdc()
2132 		if ((1 << rdc) & set->owned.map) {  in nxge_param_dump_rdc()
2133 			(void) nxge_dump_rxdma_channel(nxgep, rdc);  in nxge_param_dump_rdc()
2258 	int			rdc, tdc, block;  in nxge_param_dump_ptrs()  local
2327 	for (rdc = 0; rdc < p_cfgp->max_rdcs; rdc++) {  in nxge_param_dump_ptrs()
2330 		    rdc, (void *)rcr_rings[rdc],  in nxge_param_dump_ptrs()
2331 		    (void *)rbr_rings[rdc]);  in nxge_param_dump_ptrs()