4797 	mii_anar_t	anar;  in nxge_mii_xcvr_init()  local
4965 		anar.value = 0;  in nxge_mii_xcvr_init()
4966 		anar.bits.selector = 1;  in nxge_mii_xcvr_init()
4967 		anar.bits.cap_100T4 = param_arr[param_anar_100T4].value;  in nxge_mii_xcvr_init()
4968 		anar.bits.cap_100fdx = param_arr[param_anar_100fdx].value;  in nxge_mii_xcvr_init()
4969 		anar.bits.cap_100hdx = param_arr[param_anar_100hdx].value;  in nxge_mii_xcvr_init()
4970 		anar.bits.cap_10fdx = param_arr[param_anar_10fdx].value;  in nxge_mii_xcvr_init()
4971 		anar.bits.cap_10hdx = param_arr[param_anar_10hdx].value;  in nxge_mii_xcvr_init()
4972 		anar.bits.cap_asmpause = 0;  in nxge_mii_xcvr_init()
4973 		anar.bits.cap_pause = 0;  in nxge_mii_xcvr_init()
4977 			anar.bits.cap_asmpause = statsp->mac_stats.cap_asmpause;  in nxge_mii_xcvr_init()
4978 			anar.bits.cap_pause = statsp->mac_stats.cap_pause;  in nxge_mii_xcvr_init()
4983 		    (uint8_t)(uint64_t)(&mii_regs->anar),  in nxge_mii_xcvr_init()
4984 		    anar.value)) != NXGE_OK)  in nxge_mii_xcvr_init()
5498 	mii_anar_t	anar;  in nxge_mii_check()  local
5590 			    (uint8_t)(uint64_t)(&mii_regs->anar),  in nxge_mii_check()
5591 			    &anar.value)) != NXGE_OK)  in nxge_mii_check()
5614 			an_common.value = anar.value & anlpar.value;  in nxge_mii_check()