Lines Matching refs:dc
322 nxge_hio_dc_t *dc; /* The relevant DMA channel data structure. */ in nxge_hio_intr_add() local
341 if ((dc = nxge_grp_dc_find(nxge, type, channel)) == 0) { in nxge_hio_intr_add()
351 vector = dc->ldg.vector; in nxge_hio_intr_add()
396 dc->interrupting = B_TRUE; in nxge_hio_intr_add()
425 nxge_hio_dc_t *dc; /* The relevant DMA channel data structure. */ in nxge_hio_intr_remove() local
443 if ((dc = nxge_grp_dc_find(nxge, type, channel)) == 0) { in nxge_hio_intr_remove()
450 if (dc->interrupting == B_FALSE) { in nxge_hio_intr_remove()
461 vector = dc->ldg.vector; in nxge_hio_intr_remove()
493 dc->interrupting = B_FALSE; in nxge_hio_intr_remove()
780 nxge_hio_dc_t *dc) in nxge_hio_tdsv_add() argument
796 hv_rv = (*tx->getinfo)(dc->cookie, dc->page, &dc->ldg.index, in nxge_hio_tdsv_add()
797 &dc->ldg.ldsv); in nxge_hio_tdsv_add()
806 (int)dc->ldg.index, (int)dc->ldg.ldsv)); in nxge_hio_tdsv_add()
809 hardware->tdc.start = dc->channel; in nxge_hio_tdsv_add()
822 dc->ldg.vector = (dc->ldg.ldsv % 2) + HIO_INTR_BLOCK_SIZE; in nxge_hio_tdsv_add()
846 nxge_hio_dc_t *dc) in nxge_hio_rdsv_add() argument
862 hv_rv = (*rx->getinfo)(dc->cookie, dc->page, &dc->ldg.index, in nxge_hio_rdsv_add()
863 &dc->ldg.ldsv); in nxge_hio_rdsv_add()
872 (int)dc->ldg.index, (int)dc->ldg.ldsv)); in nxge_hio_rdsv_add()
875 hardware->start_rdc = dc->channel; in nxge_hio_rdsv_add()
876 hardware->def_rdc = dc->channel; in nxge_hio_rdsv_add()
887 dc->ldg.vector = (dc->ldg.ldsv % 2); in nxge_hio_rdsv_add()
910 nxge_hio_ldsv_add(nxge_t *nxge, nxge_hio_dc_t *dc) in nxge_hio_ldsv_add() argument
916 if (dc->type == VP_BOUND_TX) { in nxge_hio_ldsv_add()
918 dc->channel)); in nxge_hio_ldsv_add()
919 if (nxge_hio_tdsv_add(nxge, dc) != 0) in nxge_hio_ldsv_add()
923 dc->channel)); in nxge_hio_ldsv_add()
924 if (nxge_hio_rdsv_add(nxge, dc) != 0) in nxge_hio_ldsv_add()
928 dc->ldg.map |= (1 << dc->ldg.ldsv); in nxge_hio_ldsv_add()
948 group = &control->ldgp[dc->ldg.vector]; in nxge_hio_ldsv_add()
955 group->ldg = nxge->pt_config.hw_config.ldg[dc->ldg.vector]; in nxge_hio_ldsv_add()
956 group->vldg_index = (uint8_t)dc->ldg.index; in nxge_hio_ldsv_add()
966 group->vector = dc->ldg.vector; in nxge_hio_ldsv_add()
980 device = &control->ldvp[dc->ldg.ldsv]; in nxge_hio_ldsv_add()
983 device->ldv = dc->ldg.ldsv; in nxge_hio_ldsv_add()
985 if (dc->type == VP_BOUND_TX) { in nxge_hio_ldsv_add()
999 device->channel = dc->channel; in nxge_hio_ldsv_add()
1000 device->vdma_index = dc->page; in nxge_hio_ldsv_add()