Lines Matching refs:rbrp

534     uint16_t channel, p_rx_rbr_ring_t rbrp)  in nxge_init_fzc_rxdma_channel_pages()  argument
549 cfg.valid = rbrp->page_valid.bits.ldw.page0; in nxge_init_fzc_rxdma_channel_pages()
550 cfg.value = rbrp->page_value_1.value; in nxge_init_fzc_rxdma_channel_pages()
551 cfg.mask = rbrp->page_mask_1.value; in nxge_init_fzc_rxdma_channel_pages()
552 cfg.reloc = rbrp->page_reloc_1.value; in nxge_init_fzc_rxdma_channel_pages()
563 cfg.valid = rbrp->page_valid.bits.ldw.page1; in nxge_init_fzc_rxdma_channel_pages()
564 cfg.value = rbrp->page_value_2.value; in nxge_init_fzc_rxdma_channel_pages()
565 cfg.mask = rbrp->page_mask_2.value; in nxge_init_fzc_rxdma_channel_pages()
566 cfg.reloc = rbrp->page_reloc_2.value; in nxge_init_fzc_rxdma_channel_pages()
575 rbrp->page_hdl.bits.ldw.handle); in nxge_init_fzc_rxdma_channel_pages()
1385 uint16_t channel, p_rx_rbr_ring_t rbrp) in nxge_init_hv_fzc_rxdma_channel_pages() argument
1396 if (rbrp->hv_set) { in nxge_init_hv_fzc_rxdma_channel_pages()
1403 rbrp->hv_rx_buf_base_ioaddr_pp, in nxge_init_hv_fzc_rxdma_channel_pages()
1404 rbrp->hv_rx_buf_ioaddr_size); in nxge_init_hv_fzc_rxdma_channel_pages()
1417 rbrp->hv_rx_buf_base_ioaddr_pp, in nxge_init_hv_fzc_rxdma_channel_pages()
1418 rbrp->hv_rx_buf_ioaddr_size)); in nxge_init_hv_fzc_rxdma_channel_pages()
1440 rbrp->hv_rx_buf_base_ioaddr_pp, in nxge_init_hv_fzc_rxdma_channel_pages()
1441 rbrp->hv_rx_buf_ioaddr_size, in nxge_init_hv_fzc_rxdma_channel_pages()
1449 rbrp->hv_rx_cntl_base_ioaddr_pp, in nxge_init_hv_fzc_rxdma_channel_pages()
1450 rbrp->hv_rx_cntl_ioaddr_size); in nxge_init_hv_fzc_rxdma_channel_pages()
1463 rbrp->hv_rx_buf_base_ioaddr_pp, in nxge_init_hv_fzc_rxdma_channel_pages()
1464 rbrp->hv_rx_buf_ioaddr_size)); in nxge_init_hv_fzc_rxdma_channel_pages()
1486 rbrp->hv_rx_cntl_base_ioaddr_pp, in nxge_init_hv_fzc_rxdma_channel_pages()
1487 rbrp->hv_rx_cntl_ioaddr_size, in nxge_init_hv_fzc_rxdma_channel_pages()
1492 rbrp->hv_set = B_FALSE; in nxge_init_hv_fzc_rxdma_channel_pages()