416 iwn_read(struct iwn_softc *sc, int reg)  in iwn_read()  argument
419 	return (ddi_get32(sc->sc_regh, (uint32_t *)(sc->sc_base + reg)));  in iwn_read()
423 iwn_write(struct iwn_softc *sc, int reg, uint32_t val)  in iwn_write()  argument
426 	ddi_put32(sc->sc_regh, (uint32_t *)(sc->sc_base + reg), val);  in iwn_write()
430 iwn_write_1(struct iwn_softc *sc, int reg, uint8_t val)  in iwn_write_1()  argument
432 	ddi_put8(sc->sc_regh, (uint8_t *)(sc->sc_base + reg), val);  in iwn_write_1()
436 iwn_kstat_create(struct iwn_softc *sc, const char *name, size_t size,  in iwn_kstat_create()  argument
439 	*ks = kstat_create(ddi_driver_name(sc->sc_dip),  in iwn_kstat_create()
440 	    ddi_get_instance(sc->sc_dip), name, "misc", KSTAT_TYPE_NAMED,  in iwn_kstat_create()
458 iwn_kstat_init(struct iwn_softc *sc)  in iwn_kstat_init()  argument
460 	if (sc->sc_ks_misc != NULL)  in iwn_kstat_init()
461 		sc->sc_ks_misc->ks_lock = &sc->sc_mtx;  in iwn_kstat_init()
462 	if (sc->sc_ks_ant != NULL)  in iwn_kstat_init()
463 		sc->sc_ks_ant->ks_lock = &sc->sc_mtx;  in iwn_kstat_init()
464 	if (sc->sc_ks_sens != NULL)  in iwn_kstat_init()
465 		sc->sc_ks_sens->ks_lock = &sc->sc_mtx;  in iwn_kstat_init()
466 	if (sc->sc_ks_timing != NULL)  in iwn_kstat_init()
467 		sc->sc_ks_timing->ks_lock = &sc->sc_mtx;  in iwn_kstat_init()
468 	if (sc->sc_ks_edca != NULL)  in iwn_kstat_init()
469 		sc->sc_ks_edca->ks_lock = &sc->sc_mtx;  in iwn_kstat_init()
471 	kstat_named_init(&sc->sc_misc->temp,  in iwn_kstat_init()
473 	kstat_named_init(&sc->sc_misc->crit_temp,  in iwn_kstat_init()
475 	kstat_named_init(&sc->sc_misc->pslevel,  in iwn_kstat_init()
477 	kstat_named_init(&sc->sc_misc->noise,  in iwn_kstat_init()
481 	kstat_named_init(&sc->sc_ant->tx_ant,  in iwn_kstat_init()
483 	kstat_named_init(&sc->sc_ant->rx_ant,  in iwn_kstat_init()
485 	kstat_named_init(&sc->sc_ant->conn_ant,  in iwn_kstat_init()
487 	kstat_named_init(&sc->sc_ant->gain[0],  in iwn_kstat_init()
489 	kstat_named_init(&sc->sc_ant->gain[1],  in iwn_kstat_init()
491 	kstat_named_init(&sc->sc_ant->gain[2],  in iwn_kstat_init()
494 	kstat_named_init(&sc->sc_sens->ofdm_x1,  in iwn_kstat_init()
496 	kstat_named_init(&sc->sc_sens->ofdm_mrc_x1,  in iwn_kstat_init()
498 	kstat_named_init(&sc->sc_sens->ofdm_x4,  in iwn_kstat_init()
500 	kstat_named_init(&sc->sc_sens->ofdm_mrc_x4,  in iwn_kstat_init()
502 	kstat_named_init(&sc->sc_sens->cck_x4,  in iwn_kstat_init()
504 	kstat_named_init(&sc->sc_sens->cck_mrc_x4,  in iwn_kstat_init()
506 	kstat_named_init(&sc->sc_sens->energy_cck,  in iwn_kstat_init()
509 	kstat_named_init(&sc->sc_timing->bintval,  in iwn_kstat_init()
511 	kstat_named_init(&sc->sc_timing->tstamp,  in iwn_kstat_init()
513 	kstat_named_init(&sc->sc_timing->init,  in iwn_kstat_init()
516 	kstat_named_init(&sc->sc_edca->ac[0].cwmin,  in iwn_kstat_init()
518 	kstat_named_init(&sc->sc_edca->ac[0].cwmax,  in iwn_kstat_init()
520 	kstat_named_init(&sc->sc_edca->ac[0].aifsn,  in iwn_kstat_init()
522 	kstat_named_init(&sc->sc_edca->ac[0].txop,  in iwn_kstat_init()
524 	kstat_named_init(&sc->sc_edca->ac[1].cwmin,  in iwn_kstat_init()
526 	kstat_named_init(&sc->sc_edca->ac[1].cwmax,  in iwn_kstat_init()
528 	kstat_named_init(&sc->sc_edca->ac[1].aifsn,  in iwn_kstat_init()
530 	kstat_named_init(&sc->sc_edca->ac[1].txop,  in iwn_kstat_init()
532 	kstat_named_init(&sc->sc_edca->ac[2].cwmin,  in iwn_kstat_init()
534 	kstat_named_init(&sc->sc_edca->ac[2].cwmax,  in iwn_kstat_init()
536 	kstat_named_init(&sc->sc_edca->ac[2].aifsn,  in iwn_kstat_init()
538 	kstat_named_init(&sc->sc_edca->ac[2].txop,  in iwn_kstat_init()
540 	kstat_named_init(&sc->sc_edca->ac[3].cwmin,  in iwn_kstat_init()
542 	kstat_named_init(&sc->sc_edca->ac[3].cwmax,  in iwn_kstat_init()
544 	kstat_named_init(&sc->sc_edca->ac[3].aifsn,  in iwn_kstat_init()
546 	kstat_named_init(&sc->sc_edca->ac[3].txop,  in iwn_kstat_init()
551 iwn_kstat_init_2000(struct iwn_softc *sc)  in iwn_kstat_init_2000()  argument
553 	if (sc->sc_ks_toff != NULL)  in iwn_kstat_init_2000()
554 		sc->sc_ks_toff->ks_lock = &sc->sc_mtx;  in iwn_kstat_init_2000()
556 	kstat_named_init(&sc->sc_toff.t2000->toff_lo,  in iwn_kstat_init_2000()
558 	kstat_named_init(&sc->sc_toff.t2000->toff_hi,  in iwn_kstat_init_2000()
560 	kstat_named_init(&sc->sc_toff.t2000->volt,  in iwn_kstat_init_2000()
565 iwn_kstat_init_4965(struct iwn_softc *sc)  in iwn_kstat_init_4965()  argument
569 	if (sc->sc_ks_txpower != NULL)  in iwn_kstat_init_4965()
570 		sc->sc_ks_txpower->ks_lock = &sc->sc_mtx;  in iwn_kstat_init_4965()
572 	kstat_named_init(&sc->sc_txpower->vdiff,  in iwn_kstat_init_4965()
574 	kstat_named_init(&sc->sc_txpower->chan,  in iwn_kstat_init_4965()
576 	kstat_named_init(&sc->sc_txpower->group,  in iwn_kstat_init_4965()
578 	kstat_named_init(&sc->sc_txpower->subband,  in iwn_kstat_init_4965()
584 		kstat_named_init(&sc->sc_txpower->txchain[i].power,  in iwn_kstat_init_4965()
588 		kstat_named_init(&sc->sc_txpower->txchain[i].gain,  in iwn_kstat_init_4965()
592 		kstat_named_init(&sc->sc_txpower->txchain[i].temp,  in iwn_kstat_init_4965()
597 		kstat_named_init(&sc->sc_txpower->txchain[i].tcomp,  in iwn_kstat_init_4965()
604 			    &sc->sc_txpower->txchain[i].rate[r].rf_gain,  in iwn_kstat_init_4965()
610 			    &sc->sc_txpower->txchain[0].rate[0].dsp_gain,  in iwn_kstat_init_4965()
617 iwn_kstat_init_6000(struct iwn_softc *sc)  in iwn_kstat_init_6000()  argument
619 	if (sc->sc_ks_toff != NULL)  in iwn_kstat_init_6000()
620 		sc->sc_ks_toff->ks_lock = &sc->sc_mtx;  in iwn_kstat_init_6000()
622 	kstat_named_init(&sc->sc_toff.t6000->toff,  in iwn_kstat_init_6000()
627 iwn_intr_teardown(struct iwn_softc *sc)  in iwn_intr_teardown()  argument
629 	if (sc->sc_intr_htable != NULL) {  in iwn_intr_teardown()
630 		if ((sc->sc_intr_cap & DDI_INTR_FLAG_BLOCK) != 0) {  in iwn_intr_teardown()
631 			(void) ddi_intr_block_disable(sc->sc_intr_htable,  in iwn_intr_teardown()
632 			    sc->sc_intr_count);  in iwn_intr_teardown()
634 			(void) ddi_intr_disable(sc->sc_intr_htable[0]);  in iwn_intr_teardown()
636 		(void) ddi_intr_remove_handler(sc->sc_intr_htable[0]);  in iwn_intr_teardown()
637 		(void) ddi_intr_free(sc->sc_intr_htable[0]);  in iwn_intr_teardown()
638 		sc->sc_intr_htable[0] = NULL;  in iwn_intr_teardown()
640 		kmem_free(sc->sc_intr_htable, sc->sc_intr_size);  in iwn_intr_teardown()
641 		sc->sc_intr_size = 0;  in iwn_intr_teardown()
642 		sc->sc_intr_htable = NULL;  in iwn_intr_teardown()
647 iwn_intr_add(struct iwn_softc *sc, int intr_type)  in iwn_intr_add()  argument
653 	if (ddi_intr_get_nintrs(sc->sc_dip, intr_type, &ni) != DDI_SUCCESS)  in iwn_intr_add()
657 	if (ddi_intr_get_navail(sc->sc_dip, intr_type, &na) != DDI_SUCCESS)  in iwn_intr_add()
660 	sc->sc_intr_size = sizeof (ddi_intr_handle_t);  in iwn_intr_add()
661 	sc->sc_intr_htable = kmem_zalloc(sc->sc_intr_size, KM_SLEEP);  in iwn_intr_add()
663 	ret = ddi_intr_alloc(sc->sc_dip, sc->sc_intr_htable, intr_type, 0, 1,  in iwn_intr_add()
664 	    &sc->sc_intr_count, DDI_INTR_ALLOC_STRICT);  in iwn_intr_add()
666 		dev_err(sc->sc_dip, CE_WARN, "!ddi_intr_alloc() failed");  in iwn_intr_add()
670 	ret = ddi_intr_get_pri(sc->sc_intr_htable[0], &sc->sc_intr_pri);  in iwn_intr_add()
672 		dev_err(sc->sc_dip, CE_WARN, "!ddi_intr_get_pri() failed");  in iwn_intr_add()
676 	ret = ddi_intr_add_handler(sc->sc_intr_htable[0], iwn_intr, (caddr_t)sc,  in iwn_intr_add()
679 		dev_err(sc->sc_dip, CE_WARN, "!ddi_intr_add_handler() failed");  in iwn_intr_add()
683 	ret = ddi_intr_get_cap(sc->sc_intr_htable[0], &sc->sc_intr_cap);  in iwn_intr_add()
685 		dev_err(sc->sc_dip, CE_WARN, "!ddi_intr_get_cap() failed");  in iwn_intr_add()
689 	if ((sc->sc_intr_cap & DDI_INTR_FLAG_BLOCK) != 0) {  in iwn_intr_add()
690 		ret = ddi_intr_block_enable(sc->sc_intr_htable,  in iwn_intr_add()
691 		    sc->sc_intr_count);  in iwn_intr_add()
694 		ret = ddi_intr_enable(sc->sc_intr_htable[0]);  in iwn_intr_add()
699 		dev_err(sc->sc_dip, CE_WARN, "!%s() failed", func);  in iwn_intr_add()
707 iwn_intr_setup(struct iwn_softc *sc)  in iwn_intr_setup()  argument
712 	ret = ddi_intr_get_supported_types(sc->sc_dip, &intr_type);  in iwn_intr_setup()
714 		dev_err(sc->sc_dip, CE_WARN,  in iwn_intr_setup()
720 		if (iwn_intr_add(sc, DDI_INTR_TYPE_MSIX) == DDI_SUCCESS)  in iwn_intr_setup()
722 		iwn_intr_teardown(sc);  in iwn_intr_setup()
726 		if (iwn_intr_add(sc, DDI_INTR_TYPE_MSI) == DDI_SUCCESS)  in iwn_intr_setup()
728 		iwn_intr_teardown(sc);  in iwn_intr_setup()
732 		if (iwn_intr_add(sc, DDI_INTR_TYPE_FIXED) == DDI_SUCCESS)  in iwn_intr_setup()
734 		iwn_intr_teardown(sc);  in iwn_intr_setup()
737 	dev_err(sc->sc_dip, CE_WARN, "!iwn_intr_setup() failed");  in iwn_intr_setup()
769 	struct iwn_softc *sc;  in iwn_attach()  local
783 		sc = ddi_get_soft_state(iwn_state,  in iwn_attach()
785 		ASSERT(sc != NULL);  in iwn_attach()
787 		if (sc->sc_flags & IWN_FLAG_RUNNING) {  in iwn_attach()
788 			(void) iwn_init(sc);  in iwn_attach()
791 		sc->sc_flags &= ~IWN_FLAG_SUSPEND;  in iwn_attach()
805 	sc = ddi_get_soft_state(iwn_state, instance);  in iwn_attach()
806 	ddi_set_driver_private(dip, (caddr_t)sc);  in iwn_attach()
808 	ic = &sc->sc_ic;  in iwn_attach()
810 	sc->sc_dip = dip;  in iwn_attach()
812 	iwn_kstat_create(sc, "hw_state", sizeof (struct iwn_ks_misc),  in iwn_attach()
813 	    &sc->sc_ks_misc, (void **)&sc->sc_misc);  in iwn_attach()
814 	iwn_kstat_create(sc, "antennas", sizeof (struct iwn_ks_ant),  in iwn_attach()
815 	    &sc->sc_ks_ant, (void **)&sc->sc_ant);  in iwn_attach()
816 	iwn_kstat_create(sc, "sensitivity", sizeof (struct iwn_ks_sens),  in iwn_attach()
817 	    &sc->sc_ks_sens, (void **)&sc->sc_sens);  in iwn_attach()
818 	iwn_kstat_create(sc, "timing", sizeof (struct iwn_ks_timing),  in iwn_attach()
819 	    &sc->sc_ks_timing, (void **)&sc->sc_timing);  in iwn_attach()
820 	iwn_kstat_create(sc, "edca", sizeof (struct iwn_ks_edca),  in iwn_attach()
821 	    &sc->sc_ks_edca, (void **)&sc->sc_edca);  in iwn_attach()
823 	if (pci_config_setup(dip, &sc->sc_pcih) != DDI_SUCCESS) {  in iwn_attach()
824 		dev_err(sc->sc_dip, CE_WARN, "!pci_config_setup() failed");  in iwn_attach()
832 	error = iwn_pci_get_capability(sc->sc_pcih, PCI_CAP_ID_PCI_E,  in iwn_attach()
833 	    &sc->sc_cap_off);  in iwn_attach()
835 		dev_err(sc->sc_dip, CE_WARN,  in iwn_attach()
841 	reg = pci_config_get8(sc->sc_pcih, 0x41);  in iwn_attach()
843 		pci_config_put8(sc->sc_pcih, 0x41, 0);  in iwn_attach()
845 	error = ddi_regs_map_setup(dip, 1, &sc->sc_base, 0, 0, &iwn_reg_accattr,  in iwn_attach()
846 	    &sc->sc_regh);  in iwn_attach()
848 		dev_err(sc->sc_dip, CE_WARN, "!ddi_regs_map_setup() failed");  in iwn_attach()
853 	IWN_WRITE(sc, IWN_INT, 0xffffffff);  in iwn_attach()
856 	IWN_WRITE(sc, IWN_INT_MASK, 0);  in iwn_attach()
859 	if (iwn_intr_setup(sc) != DDI_SUCCESS)  in iwn_attach()
862 	mutex_init(&sc->sc_mtx, NULL, MUTEX_DRIVER,  in iwn_attach()
863 	    DDI_INTR_PRI(sc->sc_intr_pri));  in iwn_attach()
864 	mutex_init(&sc->sc_tx_mtx, NULL, MUTEX_DRIVER,  in iwn_attach()
865 	    DDI_INTR_PRI(sc->sc_intr_pri));  in iwn_attach()
866 	mutex_init(&sc->sc_mt_mtx, NULL, MUTEX_DRIVER,  in iwn_attach()
867 	    DDI_INTR_PRI(sc->sc_intr_pri));  in iwn_attach()
869 	cv_init(&sc->sc_cmd_cv, NULL, CV_DRIVER, NULL);  in iwn_attach()
870 	cv_init(&sc->sc_scan_cv, NULL, CV_DRIVER, NULL);  in iwn_attach()
871 	cv_init(&sc->sc_fhdma_cv, NULL, CV_DRIVER, NULL);  in iwn_attach()
872 	cv_init(&sc->sc_alive_cv, NULL, CV_DRIVER, NULL);  in iwn_attach()
873 	cv_init(&sc->sc_calib_cv, NULL, CV_DRIVER, NULL);  in iwn_attach()
875 	iwn_kstat_init(sc);  in iwn_attach()
878 	sc->hw_type =  in iwn_attach()
879 	    (IWN_READ(sc, IWN_HW_REV) & IWN_HW_REV_TYPE_MASK)  in iwn_attach()
881 	if (sc->hw_type == IWN_HW_REV_TYPE_4965)  in iwn_attach()
882 		error = iwn4965_attach(sc);  in iwn_attach()
884 		error = iwn5000_attach(sc, sc->sc_devid);  in iwn_attach()
886 		dev_err(sc->sc_dip, CE_WARN, "!could not attach device");  in iwn_attach()
890 	if ((error = iwn_hw_prepare(sc)) != 0) {  in iwn_attach()
891 		dev_err(sc->sc_dip, CE_WARN, "!hardware not ready");  in iwn_attach()
896 	if ((error = iwn_read_eeprom(sc)) != 0) {  in iwn_attach()
897 		dev_err(sc->sc_dip, CE_WARN, "!could not read EEPROM");  in iwn_attach()
902 	if ((error = iwn_alloc_fwmem(sc)) != 0) {  in iwn_attach()
903 		dev_err(sc->sc_dip, CE_WARN,  in iwn_attach()
909 	if ((error = iwn_alloc_kw(sc)) != 0) {  in iwn_attach()
910 		dev_err(sc->sc_dip, CE_WARN,  in iwn_attach()
916 	if (sc->hw_type != IWN_HW_REV_TYPE_4965 &&  in iwn_attach()
917 	    (error = iwn_alloc_ict(sc)) != 0) {  in iwn_attach()
918 		dev_err(sc->sc_dip, CE_WARN, "!could not allocate ICT table");  in iwn_attach()
923 	if ((error = iwn_alloc_sched(sc)) != 0) {  in iwn_attach()
924 		dev_err(sc->sc_dip, CE_WARN,  in iwn_attach()
930 	for (i = 0; i < sc->ntxqs; i++) {  in iwn_attach()
931 		if ((error = iwn_alloc_tx_ring(sc, &sc->txq[i], i)) != 0) {  in iwn_attach()
932 			dev_err(sc->sc_dip, CE_WARN,  in iwn_attach()
935 				iwn_free_tx_ring(sc, &sc->txq[i]);  in iwn_attach()
941 	if ((error = iwn_alloc_rx_ring(sc, &sc->rxq)) != 0) {  in iwn_attach()
942 		dev_err(sc->sc_dip, CE_WARN, "!could not allocate RX ring");  in iwn_attach()
947 	IWN_WRITE(sc, IWN_INT, 0xffffffff);  in iwn_attach()
950 	sc->ntxchains =  in iwn_attach()
951 	    ((sc->txchainmask >> 2) & 1) +  in iwn_attach()
952 	    ((sc->txchainmask >> 1) & 1) +  in iwn_attach()
953 	    ((sc->txchainmask >> 0) & 1);  in iwn_attach()
954 	sc->nrxchains =  in iwn_attach()
955 	    ((sc->rxchainmask >> 2) & 1) +  in iwn_attach()
956 	    ((sc->rxchainmask >> 1) & 1) +  in iwn_attach()
957 	    ((sc->rxchainmask >> 0) & 1);  in iwn_attach()
958 	dev_err(sc->sc_dip, CE_CONT, "!MIMO %dT%dR, %s, address %s",  in iwn_attach()
959 	    sc->ntxchains, sc->nrxchains, sc->eeprom_domain,  in iwn_attach()
962 	sc->sc_ant->tx_ant.value.ul = sc->txchainmask;  in iwn_attach()
963 	sc->sc_ant->rx_ant.value.ul = sc->rxchainmask;  in iwn_attach()
982 	if (sc->sc_flags & IWN_FLAG_HAS_11N) {  in iwn_attach()
991 		if (sc->hw_type != IWN_HW_REV_TYPE_4965)  in iwn_attach()
993 		if (sc->hw_type == IWN_HW_REV_TYPE_6050)  in iwn_attach()
1003 	if (sc->sc_flags & IWN_FLAG_HAS_5GHZ) {  in iwn_attach()
1007 	if (sc->sc_flags & IWN_FLAG_HAS_11N) {  in iwn_attach()
1010 		if (sc->nrxchains > 1)  in iwn_attach()
1012 		if (sc->nrxchains > 2)  in iwn_attach()
1041 	sc->sc_newstate = ic->ic_newstate;  in iwn_attach()
1055 	sc->amrr.amrr_min_success_threshold =  1;  in iwn_attach()
1056 	sc->amrr.amrr_max_success_threshold = 15;  in iwn_attach()
1070 		dev_err(sc->sc_dip, CE_WARN, "!mac_alloc() failed");  in iwn_attach()
1075 	macp->m_driver		= sc;  in iwn_attach()
1090 		dev_err(sc->sc_dip, CE_WARN, "!mac_register() failed");  in iwn_attach()
1101 		dev_err(sc->sc_dip, CE_WARN, "!ddi_create_minor_node() failed");  in iwn_attach()
1110 	sc->sc_periodic = ddi_periodic_add(iwn_periodic, sc,  in iwn_attach()
1113 	if (sc->sc_ks_misc)  in iwn_attach()
1114 		kstat_install(sc->sc_ks_misc);  in iwn_attach()
1115 	if (sc->sc_ks_ant)  in iwn_attach()
1116 		kstat_install(sc->sc_ks_ant);  in iwn_attach()
1117 	if (sc->sc_ks_sens)  in iwn_attach()
1118 		kstat_install(sc->sc_ks_sens);  in iwn_attach()
1119 	if (sc->sc_ks_timing)  in iwn_attach()
1120 		kstat_install(sc->sc_ks_timing);  in iwn_attach()
1121 	if (sc->sc_ks_edca)  in iwn_attach()
1122 		kstat_install(sc->sc_ks_edca);  in iwn_attach()
1123 	if (sc->sc_ks_txpower)  in iwn_attach()
1124 		kstat_install(sc->sc_ks_txpower);  in iwn_attach()
1125 	if (sc->sc_ks_toff)  in iwn_attach()
1126 		kstat_install(sc->sc_ks_toff);  in iwn_attach()
1128 	sc->sc_flags |= IWN_FLAG_ATTACHED;  in iwn_attach()
1138 	iwn_free_rx_ring(sc, &sc->rxq);  in iwn_attach()
1141 	for (i = 0; i < sc->ntxqs; i++)  in iwn_attach()
1142 		iwn_free_tx_ring(sc, &sc->txq[i]);  in iwn_attach()
1145 	iwn_free_sched(sc);  in iwn_attach()
1148 	if (sc->ict != NULL)  in iwn_attach()
1149 		iwn_free_ict(sc);  in iwn_attach()
1152 	iwn_free_kw(sc);  in iwn_attach()
1155 	iwn_free_fwmem(sc);  in iwn_attach()
1159 	iwn_intr_teardown(sc);  in iwn_attach()
1161 	iwn_kstat_free(sc->sc_ks_txpower, sc->sc_txpower,  in iwn_attach()
1164 	if (sc->hw_type == IWN_HW_REV_TYPE_6005)  in iwn_attach()
1165 		iwn_kstat_free(sc->sc_ks_toff, sc->sc_toff.t6000,  in iwn_attach()
1168 		iwn_kstat_free(sc->sc_ks_toff, sc->sc_toff.t2000,  in iwn_attach()
1172 	ddi_regs_map_free(&sc->sc_regh);  in iwn_attach()
1176 	pci_config_teardown(&sc->sc_pcih);  in iwn_attach()
1179 	iwn_kstat_free(sc->sc_ks_misc, sc->sc_misc,  in iwn_attach()
1181 	iwn_kstat_free(sc->sc_ks_ant, sc->sc_ant,  in iwn_attach()
1183 	iwn_kstat_free(sc->sc_ks_sens, sc->sc_sens,  in iwn_attach()
1185 	iwn_kstat_free(sc->sc_ks_timing, sc->sc_timing,  in iwn_attach()
1187 	iwn_kstat_free(sc->sc_ks_edca, sc->sc_edca,  in iwn_attach()
1196 iwn4965_attach(struct iwn_softc *sc)  in iwn4965_attach()  argument
1198 	struct iwn_ops *ops = &sc->ops;  in iwn4965_attach()
1217 	sc->ntxqs = IWN4965_NTXQUEUES;  in iwn4965_attach()
1218 	sc->ndmachnls = IWN4965_NDMACHNLS;  in iwn4965_attach()
1219 	sc->broadcast_id = IWN4965_ID_BROADCAST;  in iwn4965_attach()
1220 	sc->rxonsz = IWN4965_RXONSZ;  in iwn4965_attach()
1221 	sc->schedsz = IWN4965_SCHEDSZ;  in iwn4965_attach()
1222 	sc->fw_text_maxsz = IWN4965_FW_TEXT_MAXSZ;  in iwn4965_attach()
1223 	sc->fw_data_maxsz = IWN4965_FW_DATA_MAXSZ;  in iwn4965_attach()
1224 	sc->fwsz = IWN4965_FWSZ;  in iwn4965_attach()
1225 	sc->sched_txfact_addr = IWN4965_SCHED_TXFACT;  in iwn4965_attach()
1226 	sc->limits = &iwn4965_sensitivity_limits;  in iwn4965_attach()
1227 	sc->fwname = "iwlwifi-4965-2.ucode";  in iwn4965_attach()
1229 	sc->txchainmask = IWN_ANT_AB;  in iwn4965_attach()
1230 	sc->rxchainmask = IWN_ANT_ABC;  in iwn4965_attach()
1232 	iwn_kstat_create(sc, "txpower", sizeof (struct iwn_ks_txpower),  in iwn4965_attach()
1233 	    &sc->sc_ks_txpower, (void **)&sc->sc_txpower);  in iwn4965_attach()
1234 	iwn_kstat_init_4965(sc);  in iwn4965_attach()
1240 iwn5000_attach(struct iwn_softc *sc, uint16_t pid)  in iwn5000_attach()  argument
1242 	struct iwn_ops *ops = &sc->ops;  in iwn5000_attach()
1261 	sc->ntxqs = IWN5000_NTXQUEUES;  in iwn5000_attach()
1262 	sc->ndmachnls = IWN5000_NDMACHNLS;  in iwn5000_attach()
1263 	sc->broadcast_id = IWN5000_ID_BROADCAST;  in iwn5000_attach()
1264 	sc->rxonsz = IWN5000_RXONSZ;  in iwn5000_attach()
1265 	sc->schedsz = IWN5000_SCHEDSZ;  in iwn5000_attach()
1266 	sc->fw_text_maxsz = IWN5000_FW_TEXT_MAXSZ;  in iwn5000_attach()
1267 	sc->fw_data_maxsz = IWN5000_FW_DATA_MAXSZ;  in iwn5000_attach()
1268 	sc->fwsz = IWN5000_FWSZ;  in iwn5000_attach()
1269 	sc->sched_txfact_addr = IWN5000_SCHED_TXFACT;  in iwn5000_attach()
1271 	switch (sc->hw_type) {  in iwn5000_attach()
1273 		sc->limits = &iwn5000_sensitivity_limits;  in iwn5000_attach()
1274 		sc->fwname = "iwlwifi-5000-2.ucode";  in iwn5000_attach()
1276 		sc->txchainmask = IWN_ANT_B;  in iwn5000_attach()
1277 		sc->rxchainmask = IWN_ANT_AB;  in iwn5000_attach()
1280 		sc->limits = &iwn5150_sensitivity_limits;  in iwn5000_attach()
1281 		sc->fwname = "iwlwifi-5150-2.ucode";  in iwn5000_attach()
1285 		sc->limits = &iwn5000_sensitivity_limits;  in iwn5000_attach()
1286 		sc->fwname = "iwlwifi-5000-2.ucode";  in iwn5000_attach()
1289 		sc->limits = &iwn1000_sensitivity_limits;  in iwn5000_attach()
1292 			sc->fwname = "iwlwifi-100-5.ucode";  in iwn5000_attach()
1294 			sc->fwname = "iwlwifi-1000-3.ucode";  in iwn5000_attach()
1297 		sc->limits = &iwn6000_sensitivity_limits;  in iwn5000_attach()
1298 		sc->fwname = "iwlwifi-6000-4.ucode";  in iwn5000_attach()
1301 			sc->sc_flags |= IWN_FLAG_INTERNAL_PA;  in iwn5000_attach()
1303 			sc->txchainmask = IWN_ANT_BC;  in iwn5000_attach()
1304 			sc->rxchainmask = IWN_ANT_BC;  in iwn5000_attach()
1308 		sc->limits = &iwn6000_sensitivity_limits;  in iwn5000_attach()
1309 		sc->fwname = "iwlwifi-6050-5.ucode";  in iwn5000_attach()
1312 		sc->limits = &iwn6000_sensitivity_limits;  in iwn5000_attach()
1320 			sc->fwname = "iwlwifi-6000g2b-6.ucode";  in iwn5000_attach()
1324 			sc->fwname = "iwlwifi-6000g2a-6.ucode";  in iwn5000_attach()
1326 		iwn_kstat_create(sc, "temp_offset",  in iwn5000_attach()
1328 		    &sc->sc_ks_toff, (void **)&sc->sc_toff.t6000);  in iwn5000_attach()
1329 		iwn_kstat_init_6000(sc);  in iwn5000_attach()
1332 		sc->limits = &iwn2000_sensitivity_limits;  in iwn5000_attach()
1333 		sc->fwname = "iwlwifi-2030-6.ucode";  in iwn5000_attach()
1336 		iwn_kstat_create(sc, "temp_offset",  in iwn5000_attach()
1338 		    &sc->sc_ks_toff, (void **)&sc->sc_toff.t2000);  in iwn5000_attach()
1339 		iwn_kstat_init_2000(sc);  in iwn5000_attach()
1342 		sc->limits = &iwn2000_sensitivity_limits;  in iwn5000_attach()
1343 		sc->fwname = "iwlwifi-2000-6.ucode";  in iwn5000_attach()
1345 		iwn_kstat_create(sc, "temp_offset",  in iwn5000_attach()
1347 		    &sc->sc_ks_toff, (void **)&sc->sc_toff.t2000);  in iwn5000_attach()
1348 		iwn_kstat_init_2000(sc);  in iwn5000_attach()
1351 		sc->limits = &iwn2000_sensitivity_limits;  in iwn5000_attach()
1352 		sc->fwname = "iwlwifi-135-6.ucode";  in iwn5000_attach()
1355 		iwn_kstat_create(sc, "temp_offset",  in iwn5000_attach()
1357 		    &sc->sc_ks_toff, (void **)&sc->sc_toff.t2000);  in iwn5000_attach()
1358 		iwn_kstat_init_2000(sc);  in iwn5000_attach()
1361 		sc->limits = &iwn2000_sensitivity_limits;  in iwn5000_attach()
1362 		sc->fwname = "iwlwifi-105-6.ucode";  in iwn5000_attach()
1364 		iwn_kstat_create(sc, "temp_offset",  in iwn5000_attach()
1366 		    &sc->sc_ks_toff, (void **)&sc->sc_toff.t2000);  in iwn5000_attach()
1367 		iwn_kstat_init_2000(sc);  in iwn5000_attach()
1370 		dev_err(sc->sc_dip, CE_WARN, "!adapter type %d not supported",  in iwn5000_attach()
1371 		    sc->hw_type);  in iwn5000_attach()
1380 	struct iwn_softc *sc = ddi_get_driver_private(dip);  in iwn_detach()  local
1381 	ieee80211com_t *ic = &sc->sc_ic;  in iwn_detach()
1388 		sc->sc_flags &= ~IWN_FLAG_HW_ERR_RECOVER;  in iwn_detach()
1389 		sc->sc_flags &= ~IWN_FLAG_RATE_AUTO_CTL;  in iwn_detach()
1391 		sc->sc_flags |= IWN_FLAG_SUSPEND;  in iwn_detach()
1393 		if (sc->sc_flags & IWN_FLAG_RUNNING) {  in iwn_detach()
1394 			iwn_hw_stop(sc, B_TRUE);  in iwn_detach()
1404 	if (!(sc->sc_flags & IWN_FLAG_ATTACHED)) {  in iwn_detach()
1412 	mutex_enter(&sc->sc_mtx);  in iwn_detach()
1413 	sc->sc_flags |= IWN_FLAG_STOP_CALIB_TO;  in iwn_detach()
1414 	mutex_exit(&sc->sc_mtx);  in iwn_detach()
1416 	if (sc->calib_to != 0)  in iwn_detach()
1417 		(void) untimeout(sc->calib_to);  in iwn_detach()
1418 	sc->calib_to = 0;  in iwn_detach()
1420 	if (sc->scan_to != 0)  in iwn_detach()
1421 		(void) untimeout(sc->scan_to);  in iwn_detach()
1422 	sc->scan_to = 0;  in iwn_detach()
1424 	ddi_periodic_delete(sc->sc_periodic);  in iwn_detach()
1429 	iwn_hw_stop(sc, B_TRUE);  in iwn_detach()
1438 	iwn_intr_teardown(sc);  in iwn_detach()
1441 	mutex_enter(&sc->sc_mtx);  in iwn_detach()
1442 	iwn_free_rx_ring(sc, &sc->rxq);  in iwn_detach()
1443 	for (qid = 0; qid < sc->ntxqs; qid++)  in iwn_detach()
1444 		iwn_free_tx_ring(sc, &sc->txq[qid]);  in iwn_detach()
1445 	iwn_free_sched(sc);  in iwn_detach()
1446 	iwn_free_kw(sc);  in iwn_detach()
1447 	if (sc->ict != NULL)  in iwn_detach()
1448 		iwn_free_ict(sc);  in iwn_detach()
1449 	iwn_free_fwmem(sc);  in iwn_detach()
1450 	mutex_exit(&sc->sc_mtx);  in iwn_detach()
1452 	iwn_kstat_free(sc->sc_ks_misc, sc->sc_misc,  in iwn_detach()
1454 	iwn_kstat_free(sc->sc_ks_ant, sc->sc_ant,  in iwn_detach()
1456 	iwn_kstat_free(sc->sc_ks_sens, sc->sc_sens,  in iwn_detach()
1458 	iwn_kstat_free(sc->sc_ks_timing, sc->sc_timing,  in iwn_detach()
1460 	iwn_kstat_free(sc->sc_ks_edca, sc->sc_edca,  in iwn_detach()
1462 	iwn_kstat_free(sc->sc_ks_txpower, sc->sc_txpower,  in iwn_detach()
1465 	if (sc->hw_type == IWN_HW_REV_TYPE_6005)  in iwn_detach()
1466 		iwn_kstat_free(sc->sc_ks_toff, sc->sc_toff.t6000,  in iwn_detach()
1469 		iwn_kstat_free(sc->sc_ks_toff, sc->sc_toff.t2000,  in iwn_detach()
1472 	ddi_regs_map_free(&sc->sc_regh);  in iwn_detach()
1473 	pci_config_teardown(&sc->sc_pcih);  in iwn_detach()
1483 	struct iwn_softc *sc;  in iwn_quiesce()  local
1485 	sc = ddi_get_soft_state(iwn_state, ddi_get_instance(dip));  in iwn_quiesce()
1486 	if (sc == NULL)  in iwn_quiesce()
1498 	sc->sc_flags |= IWN_FLAG_QUIESCED;  in iwn_quiesce()
1503 	iwn_hw_stop(sc, B_FALSE);  in iwn_quiesce()
1509 iwn_nic_lock(struct iwn_softc *sc)  in iwn_nic_lock()  argument
1514 	IWN_SETBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_MAC_ACCESS_REQ);  in iwn_nic_lock()
1518 		if ((IWN_READ(sc, IWN_GP_CNTRL) &  in iwn_nic_lock()
1528 iwn_nic_unlock(struct iwn_softc *sc)  in iwn_nic_unlock()  argument
1530 	IWN_CLRBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_MAC_ACCESS_REQ);  in iwn_nic_unlock()
1534 iwn_prph_read(struct iwn_softc *sc, uint32_t addr)  in iwn_prph_read()  argument
1536 	IWN_WRITE(sc, IWN_PRPH_RADDR, IWN_PRPH_DWORD | addr);  in iwn_prph_read()
1537 	IWN_BARRIER_READ_WRITE(sc);  in iwn_prph_read()
1538 	return IWN_READ(sc, IWN_PRPH_RDATA);  in iwn_prph_read()
1542 iwn_prph_write(struct iwn_softc *sc, uint32_t addr, uint32_t data)  in iwn_prph_write()  argument
1544 	IWN_WRITE(sc, IWN_PRPH_WADDR, IWN_PRPH_DWORD | addr);  in iwn_prph_write()
1545 	IWN_BARRIER_WRITE(sc);  in iwn_prph_write()
1546 	IWN_WRITE(sc, IWN_PRPH_WDATA, data);  in iwn_prph_write()
1550 iwn_prph_setbits(struct iwn_softc *sc, uint32_t addr, uint32_t mask)  in iwn_prph_setbits()  argument
1552 	iwn_prph_write(sc, addr, iwn_prph_read(sc, addr) | mask);  in iwn_prph_setbits()
1556 iwn_prph_clrbits(struct iwn_softc *sc, uint32_t addr, uint32_t mask)  in iwn_prph_clrbits()  argument
1558 	iwn_prph_write(sc, addr, iwn_prph_read(sc, addr) & ~mask);  in iwn_prph_clrbits()
1562 iwn_prph_write_region_4(struct iwn_softc *sc, uint32_t addr,  in iwn_prph_write_region_4()  argument
1566 		iwn_prph_write(sc, addr, *data);  in iwn_prph_write_region_4()
1570 iwn_mem_read(struct iwn_softc *sc, uint32_t addr)  in iwn_mem_read()  argument
1572 	IWN_WRITE(sc, IWN_MEM_RADDR, addr);  in iwn_mem_read()
1573 	IWN_BARRIER_READ_WRITE(sc);  in iwn_mem_read()
1574 	return IWN_READ(sc, IWN_MEM_RDATA);  in iwn_mem_read()
1578 iwn_mem_write(struct iwn_softc *sc, uint32_t addr, uint32_t data)  in iwn_mem_write()  argument
1580 	IWN_WRITE(sc, IWN_MEM_WADDR, addr);  in iwn_mem_write()
1581 	IWN_BARRIER_WRITE(sc);  in iwn_mem_write()
1582 	IWN_WRITE(sc, IWN_MEM_WDATA, data);  in iwn_mem_write()
1587 iwn_mem_write_2(struct iwn_softc *sc, uint32_t addr, uint16_t data)  in iwn_mem_write_2()  argument
1591 	tmp = iwn_mem_read(sc, addr & ~3);  in iwn_mem_write_2()
1596 	iwn_mem_write(sc, addr & ~3, tmp);  in iwn_mem_write_2()
1601 iwn_mem_read_region_4(struct iwn_softc *sc, uint32_t addr, uint32_t *data,  in iwn_mem_read_region_4()  argument
1605 		*data++ = iwn_mem_read(sc, addr);  in iwn_mem_read_region_4()
1609 iwn_mem_set_region_4(struct iwn_softc *sc, uint32_t addr, uint32_t val,  in iwn_mem_set_region_4()  argument
1613 		iwn_mem_write(sc, addr, val);  in iwn_mem_set_region_4()
1617 iwn_eeprom_lock(struct iwn_softc *sc)  in iwn_eeprom_lock()  argument
1623 		IWN_SETBITS(sc, IWN_HW_IF_CONFIG,  in iwn_eeprom_lock()
1628 			if (IWN_READ(sc, IWN_HW_IF_CONFIG) &  in iwn_eeprom_lock()
1638 iwn_eeprom_unlock(struct iwn_softc *sc)  in iwn_eeprom_unlock()  argument
1640 	IWN_CLRBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_EEPROM_LOCKED);  in iwn_eeprom_unlock()
1648 iwn_init_otprom(struct iwn_softc *sc)  in iwn_init_otprom()  argument
1654 	if ((error = iwn_clock_wait(sc)) != 0)  in iwn_init_otprom()
1657 	if ((error = iwn_nic_lock(sc)) != 0)  in iwn_init_otprom()
1659 	iwn_prph_setbits(sc, IWN_APMG_PS, IWN_APMG_PS_RESET_REQ);  in iwn_init_otprom()
1661 	iwn_prph_clrbits(sc, IWN_APMG_PS, IWN_APMG_PS_RESET_REQ);  in iwn_init_otprom()
1662 	iwn_nic_unlock(sc);  in iwn_init_otprom()
1665 	if (sc->hw_type != IWN_HW_REV_TYPE_1000) {  in iwn_init_otprom()
1666 		IWN_SETBITS(sc, IWN_DBG_LINK_PWR_MGMT,  in iwn_init_otprom()
1669 	IWN_CLRBITS(sc, IWN_EEPROM_GP, IWN_EEPROM_GP_IF_OWNER);  in iwn_init_otprom()
1671 	IWN_SETBITS(sc, IWN_OTP_GP,  in iwn_init_otprom()
1678 	if (sc->hw_type == IWN_HW_REV_TYPE_1000) {  in iwn_init_otprom()
1680 		IWN_CLRBITS(sc, IWN_OTP_GP, IWN_OTP_GP_RELATIVE_ACCESS);  in iwn_init_otprom()
1683 			error = iwn_read_prom_data(sc, base, &next, 2);  in iwn_init_otprom()
1694 		sc->prom_base = prev + 1;  in iwn_init_otprom()
1700 iwn_read_prom_data(struct iwn_softc *sc, uint32_t addr, void *data, int count)  in iwn_read_prom_data()  argument
1706 	addr += sc->prom_base;  in iwn_read_prom_data()
1708 		IWN_WRITE(sc, IWN_EEPROM, addr << 2);  in iwn_read_prom_data()
1710 			val = IWN_READ(sc, IWN_EEPROM);  in iwn_read_prom_data()
1716 			dev_err(sc->sc_dip, CE_WARN,  in iwn_read_prom_data()
1720 		if (sc->sc_flags & IWN_FLAG_HAS_OTPROM) {  in iwn_read_prom_data()
1722 			tmp = IWN_READ(sc, IWN_OTP_GP);  in iwn_read_prom_data()
1724 				dev_err(sc->sc_dip, CE_WARN,  in iwn_read_prom_data()
1730 				IWN_SETBITS(sc, IWN_OTP_GP,  in iwn_read_prom_data()
1742 iwn_dma_contig_alloc(struct iwn_softc *sc, struct iwn_dma_info *dma,  in iwn_dma_contig_alloc()  argument
1762 	error = ddi_dma_alloc_handle(sc->sc_dip, &dma_attr, DDI_DMA_SLEEP, NULL,  in iwn_dma_contig_alloc()
1765 		dev_err(sc->sc_dip, CE_WARN,  in iwn_dma_contig_alloc()
1774 		dev_err(sc->sc_dip, CE_WARN,  in iwn_dma_contig_alloc()
1786 		dev_err(sc->sc_dip, CE_WARN,  in iwn_dma_contig_alloc()
1824 iwn_alloc_sched(struct iwn_softc *sc)  in iwn_alloc_sched()  argument
1828 	return iwn_dma_contig_alloc(sc, &sc->sched_dma, sc->schedsz,  in iwn_alloc_sched()
1829 	    DDI_DMA_CONSISTENT | DDI_DMA_RDWR, (void **)&sc->sched,  in iwn_alloc_sched()
1834 iwn_free_sched(struct iwn_softc *sc)  in iwn_free_sched()  argument
1836 	iwn_dma_contig_free(&sc->sched_dma);  in iwn_free_sched()
1840 iwn_alloc_kw(struct iwn_softc *sc)  in iwn_alloc_kw()  argument
1844 	return iwn_dma_contig_alloc(sc, &sc->kw_dma, IWN_KW_SIZE,  in iwn_alloc_kw()
1849 iwn_free_kw(struct iwn_softc *sc)  in iwn_free_kw()  argument
1851 	iwn_dma_contig_free(&sc->kw_dma);  in iwn_free_kw()
1855 iwn_alloc_ict(struct iwn_softc *sc)  in iwn_alloc_ict()  argument
1859 	return iwn_dma_contig_alloc(sc, &sc->ict_dma, IWN_ICT_SIZE,  in iwn_alloc_ict()
1860 	    DDI_DMA_CONSISTENT | DDI_DMA_RDWR, (void **)&sc->ict,  in iwn_alloc_ict()
1865 iwn_free_ict(struct iwn_softc *sc)  in iwn_free_ict()  argument
1867 	iwn_dma_contig_free(&sc->ict_dma);  in iwn_free_ict()
1871 iwn_alloc_fwmem(struct iwn_softc *sc)  in iwn_alloc_fwmem()  argument
1874 	return iwn_dma_contig_alloc(sc, &sc->fw_dma, sc->fwsz,  in iwn_alloc_fwmem()
1879 iwn_free_fwmem(struct iwn_softc *sc)  in iwn_free_fwmem()  argument
1881 	iwn_dma_contig_free(&sc->fw_dma);  in iwn_free_fwmem()
1885 iwn_alloc_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)  in iwn_alloc_rx_ring()  argument
1894 	error = iwn_dma_contig_alloc(sc, &ring->desc_dma, size,  in iwn_alloc_rx_ring()
1898 		dev_err(sc->sc_dip, CE_WARN,  in iwn_alloc_rx_ring()
1904 	error = iwn_dma_contig_alloc(sc, &ring->stat_dma,  in iwn_alloc_rx_ring()
1908 		dev_err(sc->sc_dip, CE_WARN,  in iwn_alloc_rx_ring()
1919 		error = iwn_dma_contig_alloc(sc, &data->dma_data, IWN_RBUF_SIZE,  in iwn_alloc_rx_ring()
1923 			dev_err(sc->sc_dip, CE_WARN,  in iwn_alloc_rx_ring()
1936 fail:	iwn_free_rx_ring(sc, ring);  in iwn_alloc_rx_ring()
1941 iwn_reset_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)  in iwn_reset_rx_ring()  argument
1945 	if (iwn_nic_lock(sc) == 0) {  in iwn_reset_rx_ring()
1946 		IWN_WRITE(sc, IWN_FH_RX_CONFIG, 0);  in iwn_reset_rx_ring()
1948 			if (IWN_READ(sc, IWN_FH_RX_STATUS) &  in iwn_reset_rx_ring()
1953 		iwn_nic_unlock(sc);  in iwn_reset_rx_ring()
1956 	sc->last_rx_valid = 0;  in iwn_reset_rx_ring()
1960 iwn_free_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)  in iwn_free_rx_ring()  argument
1962 	_NOTE(ARGUNUSED(sc));  in iwn_free_rx_ring()
1977 iwn_alloc_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring, int qid)  in iwn_alloc_tx_ring()  argument
1989 	error = iwn_dma_contig_alloc(sc, &ring->desc_dma, size,  in iwn_alloc_tx_ring()
1993 		dev_err(sc->sc_dip, CE_WARN,  in iwn_alloc_tx_ring()
2006 	error = iwn_dma_contig_alloc(sc, &ring->cmd_dma, size,  in iwn_alloc_tx_ring()
2010 		dev_err(sc->sc_dip, CE_WARN,  in iwn_alloc_tx_ring()
2023 		error = iwn_dma_contig_alloc(sc, &data->dma_data, IWN_TBUF_SIZE,  in iwn_alloc_tx_ring()
2027 			dev_err(sc->sc_dip, CE_WARN,  in iwn_alloc_tx_ring()
2034 fail:	iwn_free_tx_ring(sc, ring);  in iwn_alloc_tx_ring()
2039 iwn_reset_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring)  in iwn_reset_tx_ring()  argument
2054 	sc->qfullmsk &= ~(1 << ring->qid);  in iwn_reset_tx_ring()
2060 iwn_free_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring)  in iwn_free_tx_ring()  argument
2062 	_NOTE(ARGUNUSED(sc));  in iwn_free_tx_ring()
2077 iwn5000_ict_reset(struct iwn_softc *sc)  in iwn5000_ict_reset()  argument
2080 	IWN_WRITE(sc, IWN_INT_MASK, 0);  in iwn5000_ict_reset()
2083 	memset(sc->ict, 0, IWN_ICT_SIZE);  in iwn5000_ict_reset()
2084 	sc->ict_cur = 0;  in iwn5000_ict_reset()
2087 	IWN_WRITE(sc, IWN_DRAM_INT_TBL, IWN_DRAM_INT_TBL_ENABLE |  in iwn5000_ict_reset()
2088 	    IWN_DRAM_INT_TBL_WRAP_CHECK | sc->ict_dma.paddr >> 12);  in iwn5000_ict_reset()
2091 	sc->int_mask |= IWN_INT_RX_PERIODIC;  in iwn5000_ict_reset()
2093 	sc->sc_flags |= IWN_FLAG_USE_ICT;  in iwn5000_ict_reset()
2096 	IWN_WRITE(sc, IWN_INT, 0xffffffff);  in iwn5000_ict_reset()
2097 	IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);  in iwn5000_ict_reset()
2101 iwn_read_eeprom(struct iwn_softc *sc)  in iwn_read_eeprom()  argument
2103 	struct iwn_ops *ops = &sc->ops;  in iwn_read_eeprom()
2104 	struct ieee80211com *ic = &sc->sc_ic;  in iwn_read_eeprom()
2109 	if (sc->hw_type >= IWN_HW_REV_TYPE_1000 &&  in iwn_read_eeprom()
2110 	    (IWN_READ(sc, IWN_OTP_GP) & IWN_OTP_GP_DEV_SEL_OTP))  in iwn_read_eeprom()
2111 		sc->sc_flags |= IWN_FLAG_HAS_OTPROM;  in iwn_read_eeprom()
2113 	    (sc->sc_flags & IWN_FLAG_HAS_OTPROM) ? "OTPROM" : "EEPROM");  in iwn_read_eeprom()
2116 	if ((error = iwn_apm_init(sc)) != 0) {  in iwn_read_eeprom()
2117 		dev_err(sc->sc_dip, CE_WARN,  in iwn_read_eeprom()
2122 	if ((IWN_READ(sc, IWN_EEPROM_GP) & 0x7) == 0) {  in iwn_read_eeprom()
2123 		dev_err(sc->sc_dip, CE_WARN,  in iwn_read_eeprom()
2127 	if ((error = iwn_eeprom_lock(sc)) != 0) {  in iwn_read_eeprom()
2128 		dev_err(sc->sc_dip, CE_WARN,  in iwn_read_eeprom()
2132 	if (sc->sc_flags & IWN_FLAG_HAS_OTPROM) {  in iwn_read_eeprom()
2133 		if ((error = iwn_init_otprom(sc)) != 0) {  in iwn_read_eeprom()
2134 			dev_err(sc->sc_dip, CE_WARN,  in iwn_read_eeprom()
2140 	iwn_read_prom_data(sc, IWN_EEPROM_SKU_CAP, &val, 2);  in iwn_read_eeprom()
2144 		sc->sc_flags |= IWN_FLAG_HAS_11N;  in iwn_read_eeprom()
2146 	iwn_read_prom_data(sc, IWN_EEPROM_RFCFG, &val, 2);  in iwn_read_eeprom()
2147 	sc->rfcfg = le16toh(val);  in iwn_read_eeprom()
2148 	IWN_DBG("radio config=0x%04x", sc->rfcfg);  in iwn_read_eeprom()
2150 	if (sc->txchainmask == 0)  in iwn_read_eeprom()
2151 		sc->txchainmask = IWN_RFCFG_TXANTMSK(sc->rfcfg);  in iwn_read_eeprom()
2152 	if (sc->rxchainmask == 0)  in iwn_read_eeprom()
2153 		sc->rxchainmask = IWN_RFCFG_RXANTMSK(sc->rfcfg);  in iwn_read_eeprom()
2156 	iwn_read_prom_data(sc, IWN_EEPROM_MAC, ic->ic_macaddr, 6);  in iwn_read_eeprom()
2159 	ops->read_eeprom(sc);  in iwn_read_eeprom()
2161 	iwn_apm_stop(sc);	/* Power OFF adapter. */  in iwn_read_eeprom()
2163 	iwn_eeprom_unlock(sc);  in iwn_read_eeprom()
2168 iwn4965_read_eeprom(struct iwn_softc *sc)  in iwn4965_read_eeprom()  argument
2175 	iwn_read_prom_data(sc, IWN4965_EEPROM_DOMAIN, sc->eeprom_domain, 4);  in iwn4965_read_eeprom()
2180 		iwn_read_eeprom_channels(sc, i, addr);  in iwn4965_read_eeprom()
2184 	iwn_read_prom_data(sc, IWN4965_EEPROM_MAXPOW, &val, 2);  in iwn4965_read_eeprom()
2185 	sc->maxpwr2GHz = val & 0xff;  in iwn4965_read_eeprom()
2186 	sc->maxpwr5GHz = val >> 8;  in iwn4965_read_eeprom()
2188 	if (sc->maxpwr5GHz < 20 || sc->maxpwr5GHz > 50)  in iwn4965_read_eeprom()
2189 		sc->maxpwr5GHz = 38;  in iwn4965_read_eeprom()
2190 	if (sc->maxpwr2GHz < 20 || sc->maxpwr2GHz > 50)  in iwn4965_read_eeprom()
2191 		sc->maxpwr2GHz = 38;  in iwn4965_read_eeprom()
2192 	IWN_DBG("maxpwr 2GHz=%d 5GHz=%d", sc->maxpwr2GHz, sc->maxpwr5GHz);  in iwn4965_read_eeprom()
2195 	iwn_read_prom_data(sc, IWN4965_EEPROM_BANDS, sc->bands,  in iwn4965_read_eeprom()
2196 	    sizeof sc->bands);  in iwn4965_read_eeprom()
2199 	iwn_read_prom_data(sc, IWN4965_EEPROM_VOLTAGE, &val, 2);  in iwn4965_read_eeprom()
2200 	sc->eeprom_voltage = (int16_t)le16toh(val);  in iwn4965_read_eeprom()
2201 	IWN_DBG("voltage=%d (in 0.3V)", sc->eeprom_voltage);  in iwn4965_read_eeprom()
2207 			iwn4965_print_power_group(sc, i);  in iwn4965_read_eeprom()
2214 iwn4965_print_power_group(struct iwn_softc *sc, int i)  in iwn4965_print_power_group()  argument
2216 	struct iwn4965_eeprom_band *band = &sc->bands[i];  in iwn4965_print_power_group()
2220 	dev_err(sc->sc_dip, CE_CONT, "!===band %d===", i);  in iwn4965_print_power_group()
2221 	dev_err(sc->sc_dip, CE_CONT, "!chan lo=%d, chan hi=%d", band->lo,  in iwn4965_print_power_group()
2223 	dev_err(sc->sc_dip, CE_CONT,  "!chan1 num=%d", chans[0].num);  in iwn4965_print_power_group()
2226 			dev_err(sc->sc_dip, CE_CONT, "!chain %d, sample %d: "  in iwn4965_print_power_group()
2234 	dev_err(sc->sc_dip, CE_CONT, "!chan2 num=%d", chans[1].num);  in iwn4965_print_power_group()
2237 			dev_err(sc->sc_dip, CE_CONT, "!chain %d, sample %d: "  in iwn4965_print_power_group()
2249 iwn5000_read_eeprom(struct iwn_softc *sc)  in iwn5000_read_eeprom()  argument
2258 	iwn_read_prom_data(sc, IWN5000_EEPROM_REG, &val, 2);  in iwn5000_read_eeprom()
2260 	iwn_read_prom_data(sc, base + IWN5000_EEPROM_DOMAIN,  in iwn5000_read_eeprom()
2261 	    sc->eeprom_domain, 4);  in iwn5000_read_eeprom()
2266 		iwn_read_eeprom_channels(sc, i, addr);  in iwn5000_read_eeprom()
2270 	if (sc->hw_type >= IWN_HW_REV_TYPE_6000)  in iwn5000_read_eeprom()
2271 		iwn_read_eeprom_enhinfo(sc);  in iwn5000_read_eeprom()
2273 	iwn_read_prom_data(sc, IWN5000_EEPROM_CAL, &val, 2);  in iwn5000_read_eeprom()
2275 	iwn_read_prom_data(sc, base, &hdr, sizeof hdr);  in iwn5000_read_eeprom()
2278 	sc->calib_ver = hdr.version;  in iwn5000_read_eeprom()
2280 	if (sc->hw_type == IWN_HW_REV_TYPE_2030 ||  in iwn5000_read_eeprom()
2281 	    sc->hw_type == IWN_HW_REV_TYPE_2000 ||  in iwn5000_read_eeprom()
2282 	    sc->hw_type == IWN_HW_REV_TYPE_135  ||  in iwn5000_read_eeprom()
2283 	    sc->hw_type == IWN_HW_REV_TYPE_105) {  in iwn5000_read_eeprom()
2284 		sc->eeprom_voltage = le16toh(hdr.volt);  in iwn5000_read_eeprom()
2285 		iwn_read_prom_data(sc, base + IWN5000_EEPROM_TEMP, &val, 2);  in iwn5000_read_eeprom()
2286 		sc->eeprom_temp = le16toh(val);  in iwn5000_read_eeprom()
2287 		iwn_read_prom_data(sc, base + IWN2000_EEPROM_RAWTEMP, &val, 2);  in iwn5000_read_eeprom()
2288 		sc->eeprom_rawtemp = le16toh(val);  in iwn5000_read_eeprom()
2291 	if (sc->hw_type == IWN_HW_REV_TYPE_5150) {  in iwn5000_read_eeprom()
2293 		iwn_read_prom_data(sc, base + IWN5000_EEPROM_TEMP, &val, 2);  in iwn5000_read_eeprom()
2294 		sc->eeprom_temp = le16toh(val);  in iwn5000_read_eeprom()
2295 		iwn_read_prom_data(sc, base + IWN5000_EEPROM_VOLT, &val, 2);  in iwn5000_read_eeprom()
2297 		sc->temp_off = sc->eeprom_temp - (volt / -5);  in iwn5000_read_eeprom()
2299 		    sc->eeprom_temp, volt, sc->temp_off);  in iwn5000_read_eeprom()
2302 		iwn_read_prom_data(sc, base + IWN5000_EEPROM_CRYSTAL,  in iwn5000_read_eeprom()
2303 		    &sc->eeprom_crystal, sizeof (uint32_t));  in iwn5000_read_eeprom()
2305 		    le32toh(sc->eeprom_crystal));  in iwn5000_read_eeprom()
2310 iwn_read_eeprom_channels(struct iwn_softc *sc, int n, uint32_t addr)  in iwn_read_eeprom_channels()  argument
2312 	struct ieee80211com *ic = &sc->sc_ic;  in iwn_read_eeprom_channels()
2318 	iwn_read_prom_data(sc, addr, channels,  in iwn_read_eeprom_channels()
2349 			sc->sc_flags |= IWN_FLAG_HAS_5GHZ;  in iwn_read_eeprom_channels()
2359 		sc->maxpwr[chan] = channels[i].maxpwr;  in iwn_read_eeprom_channels()
2362 		    chan, channels[i].flags, sc->maxpwr[chan]);  in iwn_read_eeprom_channels()
2367 iwn_read_eeprom_enhinfo(struct iwn_softc *sc)  in iwn_read_eeprom_enhinfo()  argument
2374 	iwn_read_prom_data(sc, IWN5000_EEPROM_REG, &val, 2);  in iwn_read_eeprom_enhinfo()
2376 	iwn_read_prom_data(sc, base + IWN6000_EEPROM_ENHINFO,  in iwn_read_eeprom_enhinfo()
2379 	memset(sc->enh_maxpwr, 0, sizeof sc->enh_maxpwr);  in iwn_read_eeprom_enhinfo()
2385 		if (sc->txchainmask & IWN_ANT_A)  in iwn_read_eeprom_enhinfo()
2387 		if (sc->txchainmask & IWN_ANT_B)  in iwn_read_eeprom_enhinfo()
2389 		if (sc->txchainmask & IWN_ANT_C)  in iwn_read_eeprom_enhinfo()
2391 		if (sc->ntxchains == 2)  in iwn_read_eeprom_enhinfo()
2393 		else if (sc->ntxchains == 3)  in iwn_read_eeprom_enhinfo()
2398 		sc->enh_maxpwr[i] = maxpwr;  in iwn_read_eeprom_enhinfo()
2431 	struct iwn_softc *sc = (struct iwn_softc *)&ni->in_ic;  in iwn_newassoc()  local
2436 	ieee80211_amrr_node_init(&sc->amrr, &wn->amn);  in iwn_newassoc()
2455 	struct iwn_softc *sc = (struct iwn_softc *)ic;  in iwn_newstate()  local
2459 	mutex_enter(&sc->sc_mtx);  in iwn_newstate()
2460 	sc->sc_flags |= IWN_FLAG_STOP_CALIB_TO;  in iwn_newstate()
2461 	mutex_exit(&sc->sc_mtx);  in iwn_newstate()
2463 	(void) untimeout(sc->calib_to);  in iwn_newstate()
2464 	sc->calib_to = 0;  in iwn_newstate()
2466 	mutex_enter(&sc->sc_mtx);  in iwn_newstate()
2469 	DTRACE_PROBE5(new__state, int, sc->sc_flags,  in iwn_newstate()
2475 	if ((sc->sc_flags & IWN_FLAG_RADIO_OFF) && nstate != IEEE80211_S_INIT) {  in iwn_newstate()
2476 		mutex_exit(&sc->sc_mtx);  in iwn_newstate()
2480 	if (!(sc->sc_flags & IWN_FLAG_HW_INITED) &&  in iwn_newstate()
2482 		mutex_exit(&sc->sc_mtx);  in iwn_newstate()
2489 		if (sc->sc_flags & IWN_FLAG_SCANNING) {  in iwn_newstate()
2491 				dev_err(sc->sc_dip, CE_WARN, "!scan request(%d)"  in iwn_newstate()
2494 			mutex_exit(&sc->sc_mtx);  in iwn_newstate()
2498 		bcopy(&sc->rxon, &sc->rxon_save, sizeof (sc->rxon));  in iwn_newstate()
2499 		sc->sc_ostate = ostate;  in iwn_newstate()
2504 		sc->sc_flags |= IWN_FLAG_SCANNING_2GHZ;  in iwn_newstate()
2507 		iwn_set_led(sc, IWN_LED_LINK, 10, 10);  in iwn_newstate()
2511 		error = iwn_scan(sc, IEEE80211_CHAN_2GHZ);  in iwn_newstate()
2513 			dev_err(sc->sc_dip, CE_WARN,  in iwn_newstate()
2515 			sc->sc_flags &= ~IWN_FLAG_SCANNING;  in iwn_newstate()
2516 			mutex_exit(&sc->sc_mtx);  in iwn_newstate()
2520 		mutex_exit(&sc->sc_mtx);  in iwn_newstate()
2521 		sc->scan_to = timeout(iwn_abort_scan, sc, iwn_scan_timeout *  in iwn_newstate()
2527 			mutex_exit(&sc->sc_mtx);  in iwn_newstate()
2533 		sc->rxon.associd = 0;  in iwn_newstate()
2534 		sc->rxon.filter &= ~htole32(IWN_FILTER_BSS);  in iwn_newstate()
2535 		sc->calib.state = IWN_CALIB_STATE_INIT;  in iwn_newstate()
2537 		if ((error = iwn_auth(sc)) != 0) {  in iwn_newstate()
2538 			mutex_exit(&sc->sc_mtx);  in iwn_newstate()
2539 			dev_err(sc->sc_dip, CE_WARN,  in iwn_newstate()
2543 		mutex_exit(&sc->sc_mtx);  in iwn_newstate()
2547 		if ((error = iwn_run(sc)) != 0) {  in iwn_newstate()
2548 			mutex_exit(&sc->sc_mtx);  in iwn_newstate()
2549 			dev_err(sc->sc_dip, CE_WARN,  in iwn_newstate()
2553 		mutex_exit(&sc->sc_mtx);  in iwn_newstate()
2557 		sc->sc_flags &= ~IWN_FLAG_SCANNING;  in iwn_newstate()
2558 		sc->calib.state = IWN_CALIB_STATE_INIT;  in iwn_newstate()
2563 		iwn_set_led(sc, IWN_LED_LINK, 1, 0);  in iwn_newstate()
2565 		cv_signal(&sc->sc_scan_cv);  in iwn_newstate()
2566 		mutex_exit(&sc->sc_mtx);  in iwn_newstate()
2567 		if (sc->scan_to != 0)  in iwn_newstate()
2568 			(void) untimeout(sc->scan_to);  in iwn_newstate()
2569 		sc->scan_to = 0;  in iwn_newstate()
2573 	error = sc->sc_newstate(ic, nstate, arg);  in iwn_newstate()
2584 	struct iwn_softc *sc = arg;  in iwn_iter_func()  local
2587 	ieee80211_amrr_choose(&sc->amrr, ni, &wn->amn);  in iwn_iter_func()
2593 	struct iwn_softc *sc = arg;  in iwn_calib_timeout()  local
2594 	struct ieee80211com *ic = &sc->sc_ic;  in iwn_calib_timeout()
2596 	mutex_enter(&sc->sc_mtx);  in iwn_calib_timeout()
2600 			iwn_iter_func(sc, ic->ic_bss);  in iwn_calib_timeout()
2602 			ieee80211_iterate_nodes(&ic->ic_sta, iwn_iter_func, sc);  in iwn_calib_timeout()
2605 	if (++sc->calib_cnt >= 120) {  in iwn_calib_timeout()
2609 		(void)iwn_cmd(sc, IWN_CMD_GET_STATISTICS, &flags,  in iwn_calib_timeout()
2611 		sc->calib_cnt = 0;  in iwn_calib_timeout()
2615 	if ((sc->sc_flags & IWN_FLAG_STOP_CALIB_TO) == 0)  in iwn_calib_timeout()
2616 		sc->calib_to = timeout(iwn_calib_timeout, sc,  in iwn_calib_timeout()
2619 	mutex_exit(&sc->sc_mtx);  in iwn_calib_timeout()
2627 iwn_rx_phy(struct iwn_softc *sc, struct iwn_rx_desc *desc,  in iwn_rx_phy()  argument
2638 	memcpy(&sc->last_rx_stat, stat, sizeof (*stat));  in iwn_rx_phy()
2639 	sc->last_rx_valid = 1;  in iwn_rx_phy()
2647 iwn_rx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,  in iwn_rx_done()  argument
2650 	struct iwn_ops *ops = &sc->ops;  in iwn_rx_done()
2651 	struct ieee80211com *ic = &sc->sc_ic;  in iwn_rx_done()
2652 	struct iwn_rx_ring *ring = &sc->rxq;  in iwn_rx_done()
2663 		if (!sc->last_rx_valid) {  in iwn_rx_done()
2664 			dev_err(sc->sc_dip, CE_WARN,  in iwn_rx_done()
2668 		sc->last_rx_valid = 0;  in iwn_rx_done()
2669 		stat = &sc->last_rx_stat;  in iwn_rx_done()
2677 		dev_err(sc->sc_dip, CE_WARN,  in iwn_rx_done()
2694 		sc->sc_rx_err++;  in iwn_rx_done()
2700 		sc->sc_rx_err++;  in iwn_rx_done()
2706 		sc->sc_rx_nobuf++;  in iwn_rx_done()
2741 		iwn_fix_channel(sc, m, stat);  in iwn_rx_done()
2753 iwn_rx_compressed_ba(struct iwn_softc *sc, struct iwn_rx_desc *desc,  in iwn_rx_compressed_ba()  argument
2762 	txq = &sc->txq[le16toh(ba->qid)];  in iwn_rx_compressed_ba()
2772 iwn5000_rx_calib_results(struct iwn_softc *sc, struct iwn_rx_desc *desc,  in iwn5000_rx_calib_results()  argument
2779 	if (sc->sc_flags & IWN_FLAG_CALIB_DONE)  in iwn5000_rx_calib_results()
2788 		if (sc->hw_type == IWN_HW_REV_TYPE_5150 ||  in iwn5000_rx_calib_results()
2789 		    sc->hw_type == IWN_HW_REV_TYPE_2030 ||  in iwn5000_rx_calib_results()
2790 		    sc->hw_type == IWN_HW_REV_TYPE_2000 ||  in iwn5000_rx_calib_results()
2791 		    sc->hw_type == IWN_HW_REV_TYPE_135  ||  in iwn5000_rx_calib_results()
2792 		    sc->hw_type == IWN_HW_REV_TYPE_105)  in iwn5000_rx_calib_results()
2802 		if (sc->hw_type < IWN_HW_REV_TYPE_6000 &&  in iwn5000_rx_calib_results()
2803 		    sc->hw_type != IWN_HW_REV_TYPE_5150)  in iwn5000_rx_calib_results()
2814 	if (sc->calibcmd[idx].buf != NULL)  in iwn5000_rx_calib_results()
2815 		kmem_free(sc->calibcmd[idx].buf, sc->calibcmd[idx].len);  in iwn5000_rx_calib_results()
2816 	sc->calibcmd[idx].buf = kmem_zalloc(len, KM_NOSLEEP);  in iwn5000_rx_calib_results()
2817 	if (sc->calibcmd[idx].buf == NULL) {  in iwn5000_rx_calib_results()
2820 	sc->calibcmd[idx].len = len;  in iwn5000_rx_calib_results()
2821 	memcpy(sc->calibcmd[idx].buf, calib, len);  in iwn5000_rx_calib_results()
2829 iwn_rx_statistics(struct iwn_softc *sc, struct iwn_rx_desc *desc,  in iwn_rx_statistics()  argument
2832 	struct iwn_ops *ops = &sc->ops;  in iwn_rx_statistics()
2833 	struct ieee80211com *ic = &sc->sc_ic;  in iwn_rx_statistics()
2834 	struct iwn_calib_state *calib = &sc->calib;  in iwn_rx_statistics()
2845 	sc->calib_cnt = 0;	/* Reset TX power calibration timeout. */  in iwn_rx_statistics()
2848 	if (stats->general.temp != sc->rawtemp) {  in iwn_rx_statistics()
2850 		sc->rawtemp = stats->general.temp;  in iwn_rx_statistics()
2851 		temp = ops->get_temperature(sc);  in iwn_rx_statistics()
2852 		sc->sc_misc->temp.value.ul = temp;  in iwn_rx_statistics()
2855 		if (sc->hw_type == IWN_HW_REV_TYPE_4965)  in iwn_rx_statistics()
2856 			iwn4965_power_calibration(sc, temp);  in iwn_rx_statistics()
2864 	sc->noise = iwn_get_noise(&stats->rx.general);  in iwn_rx_statistics()
2865 	sc->sc_misc->noise.value.l = sc->noise;  in iwn_rx_statistics()
2877 	if (sc->hw_type == IWN_HW_REV_TYPE_6005)  in iwn_rx_statistics()
2881 		iwn_collect_noise(sc, &stats->rx.general);  in iwn_rx_statistics()
2883 		iwn_tune_sensitivity(sc, &stats->rx);  in iwn_rx_statistics()
2891 iwn4965_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,  in iwn4965_tx_done()  argument
2898 	iwn_tx_done(sc, desc, stat->ackfailcnt, le32toh(stat->status) & 0xff);  in iwn4965_tx_done()
2902 iwn5000_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,  in iwn5000_tx_done()  argument
2909 	iwn5000_reset_sched(sc, desc->qid & 0xf, desc->idx);  in iwn5000_tx_done()
2914 	iwn_tx_done(sc, desc, stat->ackfailcnt, le16toh(stat->status) & 0xff);  in iwn5000_tx_done()
2921 iwn_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc, int ackfailcnt,  in iwn_tx_done()  argument
2924 	struct iwn_tx_ring *ring = &sc->txq[desc->qid & 0xf];  in iwn_tx_done()
2934 		sc->sc_tx_err++;  in iwn_tx_done()
2936 		sc->sc_ic.ic_stats.is_tx_frags++;  in iwn_tx_done()
2941 	mutex_enter(&sc->sc_tx_mtx);  in iwn_tx_done()
2942 	sc->sc_tx_timer = 0;  in iwn_tx_done()
2944 		sc->qfullmsk &= ~(1 << ring->qid);  in iwn_tx_done()
2946 	mac_tx_update(sc->sc_ic.ic_mach);  in iwn_tx_done()
2947 	mutex_exit(&sc->sc_tx_mtx);  in iwn_tx_done()
2955 iwn_cmd_done(struct iwn_softc *sc, struct iwn_rx_desc *desc)  in iwn_cmd_done()  argument
2957 	struct iwn_tx_ring *ring = &sc->txq[IWN_CMD_QUEUE_NUM];  in iwn_cmd_done()
2974 	mutex_enter(&sc->sc_mtx);  in iwn_cmd_done()
2975 	sc->sc_cmd_flag = SC_CMD_FLG_DONE;  in iwn_cmd_done()
2976 	cv_signal(&sc->sc_cmd_cv);  in iwn_cmd_done()
2977 	mutex_exit(&sc->sc_mtx);  in iwn_cmd_done()
2984 iwn_notif_intr(struct iwn_softc *sc)  in iwn_notif_intr()  argument
2986 	struct iwn_ops *ops = &sc->ops;  in iwn_notif_intr()
2987 	struct ieee80211com *ic = &sc->sc_ic;  in iwn_notif_intr()
2990 	ASSERT(sc != NULL);  in iwn_notif_intr()
2992 	(void) ddi_dma_sync(sc->rxq.stat_dma.dma_hdl, 0, 0,  in iwn_notif_intr()
2995 	hw = le16toh(sc->rxq.stat->closed_count) & 0xfff;  in iwn_notif_intr()
2996 	while (sc->rxq.cur != hw) {  in iwn_notif_intr()
2997 		struct iwn_rx_data *data = &sc->rxq.data[sc->rxq.cur];  in iwn_notif_intr()
3007 			iwn_cmd_done(sc, desc);  in iwn_notif_intr()
3011 			iwn_rx_phy(sc, desc, data);  in iwn_notif_intr()
3017 			iwn_rx_done(sc, desc, data);  in iwn_notif_intr()
3022 			iwn_rx_compressed_ba(sc, desc, data);  in iwn_notif_intr()
3027 			ops->tx_done(sc, desc, data);  in iwn_notif_intr()
3032 			mutex_enter(&sc->sc_mtx);  in iwn_notif_intr()
3033 			iwn_rx_statistics(sc, desc, data);  in iwn_notif_intr()
3034 			mutex_exit(&sc->sc_mtx);  in iwn_notif_intr()
3058 					dev_err(sc->sc_dip, CE_WARN,  in iwn_notif_intr()
3066 					mutex_enter(&sc->sc_mtx);  in iwn_notif_intr()
3067 					(void)iwn_init_sensitivity(sc);  in iwn_notif_intr()
3068 					mutex_exit(&sc->sc_mtx);  in iwn_notif_intr()
3085 				dev_err(sc->sc_dip, CE_WARN,  in iwn_notif_intr()
3091 				memcpy(&sc->ucode_info, uc, sizeof (*uc));  in iwn_notif_intr()
3094 			sc->errptr = le32toh(uc->errptr);  in iwn_notif_intr()
3110 				dev_err(sc->sc_dip, CE_WARN,  in iwn_notif_intr()
3113 				mutex_enter(&sc->sc_mtx);  in iwn_notif_intr()
3114 				sc->sc_flags |=  in iwn_notif_intr()
3117 				mutex_exit(&sc->sc_mtx);  in iwn_notif_intr()
3118 				ieee80211_new_state(&sc->sc_ic,  in iwn_notif_intr()
3154 			    (sc->sc_flags & IWN_FLAG_SCANNING_2GHZ) &&  in iwn_notif_intr()
3155 			    (sc->sc_flags & IWN_FLAG_HAS_5GHZ)) {  in iwn_notif_intr()
3160 				mutex_enter(&sc->sc_mtx);  in iwn_notif_intr()
3161 				sc->sc_flags |= IWN_FLAG_SCANNING_5GHZ;  in iwn_notif_intr()
3162 				sc->sc_flags &= ~IWN_FLAG_SCANNING_2GHZ;  in iwn_notif_intr()
3163 				if (iwn_scan(sc, IEEE80211_CHAN_5GHZ) == 0) {  in iwn_notif_intr()
3164 					mutex_exit(&sc->sc_mtx);  in iwn_notif_intr()
3167 				mutex_exit(&sc->sc_mtx);  in iwn_notif_intr()
3170 			mutex_enter(&sc->sc_mtx);  in iwn_notif_intr()
3171 			sc->sc_flags &= ~IWN_FLAG_SCANNING;  in iwn_notif_intr()
3172 			cv_signal(&sc->sc_scan_cv);  in iwn_notif_intr()
3173 			mutex_exit(&sc->sc_mtx);  in iwn_notif_intr()
3174 			(void) untimeout(sc->scan_to);  in iwn_notif_intr()
3175 			sc->scan_to = 0;  in iwn_notif_intr()
3179 			iwn5000_rx_calib_results(sc, desc, data);  in iwn_notif_intr()
3183 			mutex_enter(&sc->sc_mtx);  in iwn_notif_intr()
3184 			sc->sc_flags |= IWN_FLAG_CALIB_DONE;  in iwn_notif_intr()
3185 			cv_signal(&sc->sc_calib_cv);  in iwn_notif_intr()
3186 			mutex_exit(&sc->sc_mtx);  in iwn_notif_intr()
3190 		sc->rxq.cur = (sc->rxq.cur + 1) % IWN_RX_RING_COUNT;  in iwn_notif_intr()
3195 	IWN_WRITE(sc, IWN_FH_RX_WPTR, hw & ~7);  in iwn_notif_intr()
3203 iwn_wakeup_intr(struct iwn_softc *sc)  in iwn_wakeup_intr()  argument
3210 	IWN_WRITE(sc, IWN_FH_RX_WPTR, sc->rxq.cur & ~7);  in iwn_wakeup_intr()
3211 	for (qid = 0; qid < sc->ntxqs; qid++) {  in iwn_wakeup_intr()
3212 		struct iwn_tx_ring *ring = &sc->txq[qid];  in iwn_wakeup_intr()
3213 		IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | ring->cur);  in iwn_wakeup_intr()
3223 iwn_fatal_intr(struct iwn_softc *sc)  in iwn_fatal_intr()  argument
3231 	sc->sc_flags &= ~IWN_FLAG_CALIB_DONE;  in iwn_fatal_intr()
3234 	if (sc->errptr < IWN_FW_DATA_BASE ||  in iwn_fatal_intr()
3235 	    sc->errptr + sizeof (*dump) >  in iwn_fatal_intr()
3236 	    IWN_FW_DATA_BASE + sc->fw_data_maxsz) {  in iwn_fatal_intr()
3237 		dev_err(sc->sc_dip, CE_WARN,  in iwn_fatal_intr()
3238 		    "!bad firmware error log address 0x%08x", sc->errptr);  in iwn_fatal_intr()
3241 	if (iwn_nic_lock(sc) != 0) {  in iwn_fatal_intr()
3242 		dev_err(sc->sc_dip, CE_WARN,  in iwn_fatal_intr()
3248 	iwn_mem_read_region_4(sc, sc->errptr, buf, ARRAY_SIZE(buf));  in iwn_fatal_intr()
3249 	iwn_nic_unlock(sc);  in iwn_fatal_intr()
3252 		dev_err(sc->sc_dip, CE_WARN,  in iwn_fatal_intr()
3256 	dev_err(sc->sc_dip, CE_WARN, "!firmware error log:");  in iwn_fatal_intr()
3257 	dev_err(sc->sc_dip, CE_CONT, "!  error type      = \"%s\" (0x%08X)",  in iwn_fatal_intr()
3261 	dev_err(sc->sc_dip, CE_CONT, "!  program counter = 0x%08X", dump->pc);  in iwn_fatal_intr()
3262 	dev_err(sc->sc_dip, CE_CONT, "!  source line     = 0x%08X",  in iwn_fatal_intr()
3264 	dev_err(sc->sc_dip, CE_CONT, "!  error data      = 0x%08X%08X",  in iwn_fatal_intr()
3266 	dev_err(sc->sc_dip, CE_CONT, "!  branch link     = 0x%08X%08X",  in iwn_fatal_intr()
3268 	dev_err(sc->sc_dip, CE_CONT, "!  interrupt link  = 0x%08X%08X",  in iwn_fatal_intr()
3270 	dev_err(sc->sc_dip, CE_CONT, "!  time            = %u", dump->time[0]);  in iwn_fatal_intr()
3273 	dev_err(sc->sc_dip, CE_WARN, "!driver status:");  in iwn_fatal_intr()
3274 	for (i = 0; i < sc->ntxqs; i++) {  in iwn_fatal_intr()
3275 		struct iwn_tx_ring *ring = &sc->txq[i];  in iwn_fatal_intr()
3276 		dev_err(sc->sc_dip, CE_WARN,  in iwn_fatal_intr()
3280 	dev_err(sc->sc_dip, CE_WARN, "!  rx ring: cur=%d", sc->rxq.cur);  in iwn_fatal_intr()
3281 	dev_err(sc->sc_dip, CE_WARN, "!  802.11 state %d", sc->sc_ic.ic_state);  in iwn_fatal_intr()
3290 	struct iwn_softc *sc = (struct iwn_softc *)arg;  in iwn_intr()  local
3293 	if (sc == NULL)  in iwn_intr()
3297 	IWN_WRITE(sc, IWN_INT_MASK, 0);  in iwn_intr()
3300 	if (sc->sc_flags & IWN_FLAG_USE_ICT) {  in iwn_intr()
3301 		(void) ddi_dma_sync(sc->ict_dma.dma_hdl, 0, 0,  in iwn_intr()
3304 		while (sc->ict[sc->ict_cur] != 0) {  in iwn_intr()
3305 			tmp |= sc->ict[sc->ict_cur];  in iwn_intr()
3306 			sc->ict[sc->ict_cur] = 0;	/* Acknowledge. */  in iwn_intr()
3307 			sc->ict_cur = (sc->ict_cur + 1) % IWN_ICT_COUNT;  in iwn_intr()
3309 		(void) ddi_dma_sync(sc->ict_dma.dma_hdl, 0, 0,  in iwn_intr()
3319 		r1 = IWN_READ(sc, IWN_INT);  in iwn_intr()
3322 		r2 = IWN_READ(sc, IWN_FH_INT);  in iwn_intr()
3325 		IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);  in iwn_intr()
3330 	IWN_WRITE(sc, IWN_INT, r1);  in iwn_intr()
3331 	if (!(sc->sc_flags & IWN_FLAG_USE_ICT))  in iwn_intr()
3332 		IWN_WRITE(sc, IWN_FH_INT, r2);  in iwn_intr()
3335 		tmp = IWN_READ(sc, IWN_GP_CNTRL);  in iwn_intr()
3336 		dev_err(sc->sc_dip, CE_NOTE,  in iwn_intr()
3341 		dev_err(sc->sc_dip, CE_WARN,  in iwn_intr()
3345 		dev_err(sc->sc_dip, CE_WARN,  in iwn_intr()
3348 		iwn_fatal_intr(sc);  in iwn_intr()
3349 		iwn_hw_stop(sc, B_TRUE);  in iwn_intr()
3350 		if (!IWN_CHK_FAST_RECOVER(sc))  in iwn_intr()
3351 			ieee80211_new_state(&sc->sc_ic, IEEE80211_S_INIT, -1);  in iwn_intr()
3352 		mutex_enter(&sc->sc_mtx);  in iwn_intr()
3353 		sc->sc_flags |= IWN_FLAG_HW_ERR_RECOVER;  in iwn_intr()
3354 		mutex_exit(&sc->sc_mtx);  in iwn_intr()
3360 		if (sc->sc_flags & IWN_FLAG_USE_ICT) {  in iwn_intr()
3364 				IWN_WRITE(sc, IWN_FH_INT, IWN_FH_INT_RX);  in iwn_intr()
3365 			IWN_WRITE_1(sc, IWN_INT_PERIODIC,  in iwn_intr()
3367 			iwn_notif_intr(sc);  in iwn_intr()
3369 				IWN_WRITE_1(sc, IWN_INT_PERIODIC,  in iwn_intr()
3372 			iwn_notif_intr(sc);  in iwn_intr()
3377 		if (sc->sc_flags & IWN_FLAG_USE_ICT)  in iwn_intr()
3378 			IWN_WRITE(sc, IWN_FH_INT, IWN_FH_INT_TX);  in iwn_intr()
3379 		mutex_enter(&sc->sc_mtx);  in iwn_intr()
3380 		sc->sc_flags |= IWN_FLAG_FW_DMA;  in iwn_intr()
3381 		cv_signal(&sc->sc_fhdma_cv);  in iwn_intr()
3382 		mutex_exit(&sc->sc_mtx);  in iwn_intr()
3386 		mutex_enter(&sc->sc_mtx);  in iwn_intr()
3387 		sc->sc_flags |= IWN_FLAG_FW_ALIVE;  in iwn_intr()
3388 		cv_signal(&sc->sc_alive_cv);  in iwn_intr()
3389 		mutex_exit(&sc->sc_mtx);  in iwn_intr()
3393 		iwn_wakeup_intr(sc);  in iwn_intr()
3396 	IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);  in iwn_intr()
3405 iwn4965_update_sched(struct iwn_softc *sc, int qid, int idx, uint8_t id,  in iwn4965_update_sched()  argument
3410 	uint16_t *w = &sc->sched[w_idx];  in iwn4965_update_sched()
3413 	(void) ddi_dma_sync(sc->sched_dma.dma_hdl, w_idx * sizeof (uint16_t),  in iwn4965_update_sched()
3417 		(void) ddi_dma_sync(sc->sched_dma.dma_hdl,  in iwn4965_update_sched()
3424 iwn5000_update_sched(struct iwn_softc *sc, int qid, int idx, uint8_t id,  in iwn5000_update_sched()  argument
3428 	uint16_t *w = &sc->sched[w_idx];  in iwn5000_update_sched()
3431 	(void) ddi_dma_sync(sc->sched_dma.dma_hdl, w_idx * sizeof (uint16_t),  in iwn5000_update_sched()
3435 		(void) ddi_dma_sync(sc->sched_dma.dma_hdl,  in iwn5000_update_sched()
3443 iwn5000_reset_sched(struct iwn_softc *sc, int qid, int idx)  in iwn5000_reset_sched()  argument
3446 	uint16_t *w = &sc->sched[w_idx];  in iwn5000_reset_sched()
3449 	(void) ddi_dma_sync(sc->sched_dma.dma_hdl, w_idx * sizeof (uint16_t),  in iwn5000_reset_sched()
3453 		(void) ddi_dma_sync(sc->sched_dma.dma_hdl,  in iwn5000_reset_sched()
3473 iwn_wme_to_qos_ac(struct iwn_softc *sc, int wme_ac)  in iwn_wme_to_qos_ac()  argument
3491 		dev_err(sc->sc_dip, CE_WARN, "!iwn_wme_to_qos_ac(): "  in iwn_wme_to_qos_ac()
3515 iwn_wmeparam_check(struct iwn_softc *sc, struct wmeParams *wmeparam)  in iwn_wmeparam_check()  argument
3530 			dev_err(sc->sc_dip, CE_WARN, "!iwn_wmeparam_check(): "  in iwn_wmeparam_check()
3545 iwn_qosparam_to_hw(struct iwn_softc *sc, int async)  in iwn_qosparam_to_hw()  argument
3547 	ieee80211com_t *ic = &sc->sc_ic;  in iwn_qosparam_to_hw()
3563 	err = iwn_wmeparam_check(sc, wmeparam);  in iwn_qosparam_to_hw()
3578 		j = iwn_wme_to_qos_ac(sc, i);  in iwn_qosparam_to_hw()
3583 		sc->sc_edca->ac[j].cwmin.value.ul = edcaparam.ac[j].cwmin =  in iwn_qosparam_to_hw()
3585 		sc->sc_edca->ac[j].cwmax.value.ul = edcaparam.ac[j].cwmax =  in iwn_qosparam_to_hw()
3587 		sc->sc_edca->ac[j].aifsn.value.ul = edcaparam.ac[j].aifsn =  in iwn_qosparam_to_hw()
3589 		sc->sc_edca->ac[j].txop.value.ul = edcaparam.ac[j].txoplimit =  in iwn_qosparam_to_hw()
3593 	err = iwn_cmd(sc, IWN_CMD_EDCA_PARAMS, &edcaparam,  in iwn_qosparam_to_hw()
3596 		dev_err(sc->sc_dip, CE_WARN, "!iwn_qosparam_to_hw(): "  in iwn_qosparam_to_hw()
3643 iwn_wme_tid_to_txq(struct iwn_softc *sc, int tid)  in iwn_wme_tid_to_txq()  argument
3650 		dev_err(sc->sc_dip, CE_WARN, "!wme_tid_to_txq(): "  in iwn_wme_tid_to_txq()
3664 	struct iwn_softc *sc = (struct iwn_softc *)ic;  in iwn_send()  local
3694 	if (sc->sc_flags & IWN_FLAG_SUSPEND) {  in iwn_send()
3696 		sc->sc_tx_err++;  in iwn_send()
3709 		dev_err(sc->sc_dip, CE_WARN, "!iwn_send(): "  in iwn_send()
3712 		sc->sc_tx_err++;  in iwn_send()
3729 				txq_id = iwn_wme_tid_to_txq(sc, tid);  in iwn_send()
3734 					sc->sc_tx_err++;  in iwn_send()
3750 	if (sc->qfullmsk & (1 << txq_id)) {  in iwn_send()
3751 		sc->sc_tx_err++;  in iwn_send()
3765 		ridx = sc->fixed_ridx;  in iwn_send()
3785 		dev_err(sc->sc_dip, CE_WARN, "!iwn_send(): can't copy");  in iwn_send()
3814 	mutex_enter(&sc->sc_tx_mtx);  in iwn_send()
3815 	ring = &sc->txq[txq_id];  in iwn_send()
3862 			if (sc->hw_type != IWN_HW_REV_TYPE_4965) {  in iwn_send()
3873 		tx->id = sc->broadcast_id;  in iwn_send()
3918 	if (tx->id == sc->broadcast_id) {  in iwn_send()
3922 		txant = IWN_LSB(sc->txchainmask);  in iwn_send()
3972 	sc->ops.update_sched(sc, ring->qid, ring->cur, tx->id, totlen);  in iwn_send()
3976 	IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);  in iwn_send()
3980 		sc->qfullmsk |= 1 << ring->qid;  in iwn_send()
3981 	mutex_exit(&sc->sc_tx_mtx);  in iwn_send()
3986 	mutex_enter(&sc->sc_mt_mtx);  in iwn_send()
3987 	if (sc->sc_tx_timer == 0)  in iwn_send()
3988 		sc->sc_tx_timer = 5;  in iwn_send()
3989 	mutex_exit(&sc->sc_mt_mtx);  in iwn_send()
3997 	struct iwn_softc *sc;  in iwn_m_tx()  local
4001 	sc = (struct iwn_softc *)arg;  in iwn_m_tx()
4002 	ASSERT(sc != NULL);  in iwn_m_tx()
4003 	ic = &sc->sc_ic;  in iwn_m_tx()
4005 	if (sc->sc_flags & IWN_FLAG_SUSPEND) {  in iwn_m_tx()
4015 	if ((sc->sc_flags & IWN_FLAG_HW_ERR_RECOVER)) {  in iwn_m_tx()
4036 	struct iwn_softc *sc = (struct iwn_softc *)arg;  in iwn_watchdog()  local
4037 	ieee80211com_t *ic = &sc->sc_ic;  in iwn_watchdog()
4042 	mutex_enter(&sc->sc_mt_mtx);  in iwn_watchdog()
4043 	if (sc->sc_tx_timer > 0) {  in iwn_watchdog()
4044 		if (--sc->sc_tx_timer == 0) {  in iwn_watchdog()
4045 			dev_err(sc->sc_dip, CE_WARN, "!device timeout");  in iwn_watchdog()
4046 			sc->sc_flags |= IWN_FLAG_HW_ERR_RECOVER;  in iwn_watchdog()
4047 			sc->sc_ostate = IEEE80211_S_RUN;  in iwn_watchdog()
4051 	mutex_exit(&sc->sc_mt_mtx);  in iwn_watchdog()
4060 		dev_err(sc->sc_dip, CE_WARN, "!iwn_watchdog reset");  in iwn_watchdog()
4075 	struct iwn_softc *sc;  in iwn_m_ioctl()  local
4079 	sc = (struct iwn_softc *)arg;  in iwn_m_ioctl()
4080 	ASSERT(sc != NULL);  in iwn_m_ioctl()
4081 	ic = &sc->sc_ic;  in iwn_m_ioctl()
4083 	mutex_enter(&sc->sc_mtx);  in iwn_m_ioctl()
4084 	while (sc->sc_flags & IWN_FLAG_SCANNING)  in iwn_m_ioctl()
4085 		cv_wait(&sc->sc_scan_cv, &sc->sc_mtx);  in iwn_m_ioctl()
4086 	mutex_exit(&sc->sc_mtx);  in iwn_m_ioctl()
4099 			if (sc->sc_flags & IWN_FLAG_RUNNING) {  in iwn_m_ioctl()
4101 				iwn_m_stop(sc);  in iwn_m_ioctl()
4102 				(void) iwn_m_start(sc);  in iwn_m_ioctl()
4117 	struct iwn_softc *sc;  in iwn_m_getprop()  local
4119 	sc = (struct iwn_softc *)arg;  in iwn_m_getprop()
4120 	ASSERT(sc != NULL);  in iwn_m_getprop()
4122 	return (ieee80211_getprop(&sc->sc_ic, pr_name, wldp_pr_num,  in iwn_m_getprop()
4130 	struct iwn_softc *sc;  in iwn_m_propinfo()  local
4132 	sc = (struct iwn_softc *)arg;  in iwn_m_propinfo()
4133 	ASSERT(sc != NULL);  in iwn_m_propinfo()
4135 	ieee80211_propinfo(&sc->sc_ic, pr_name, wldp_pr_num, prh);  in iwn_m_propinfo()
4142 	struct iwn_softc *sc;  in iwn_m_setprop()  local
4146 	sc = (struct iwn_softc *)arg;  in iwn_m_setprop()
4147 	ASSERT(sc != NULL);  in iwn_m_setprop()
4148 	ic = &sc->sc_ic;  in iwn_m_setprop()
4150 	mutex_enter(&sc->sc_mtx);  in iwn_m_setprop()
4151 	while (sc->sc_flags & IWN_FLAG_SCANNING)  in iwn_m_setprop()
4152 		cv_wait(&sc->sc_scan_cv, &sc->sc_mtx);  in iwn_m_setprop()
4153 	mutex_exit(&sc->sc_mtx);  in iwn_m_setprop()
4160 			if (sc->sc_flags & IWN_FLAG_RUNNING) {  in iwn_m_setprop()
4162 				iwn_m_stop(sc);  in iwn_m_setprop()
4163 				(void) iwn_m_start(sc);  in iwn_m_setprop()
4180 	struct iwn_softc *sc;  in iwn_m_stat()  local
4184 	sc = (struct iwn_softc *)arg;  in iwn_m_stat()
4185 	ASSERT(sc != NULL);  in iwn_m_stat()
4186 	ic = &sc->sc_ic;  in iwn_m_stat()
4188 	mutex_enter(&sc->sc_mtx);  in iwn_m_stat()
4198 		*val = sc->sc_tx_nobuf;  in iwn_m_stat()
4201 		*val = sc->sc_rx_nobuf;  in iwn_m_stat()
4204 		*val = sc->sc_rx_err;  in iwn_m_stat()
4220 		*val = sc->sc_tx_err;  in iwn_m_stat()
4223 		*val = sc->sc_tx_retries;  in iwn_m_stat()
4235 		mutex_exit(&sc->sc_mtx);  in iwn_m_stat()
4238 		mutex_exit(&sc->sc_mtx);  in iwn_m_stat()
4242 	mutex_exit(&sc->sc_mtx);  in iwn_m_stat()
4254 	struct iwn_softc *sc;  in iwn_m_unicst()  local
4258 	sc = (struct iwn_softc *)arg;  in iwn_m_unicst()
4259 	ASSERT(sc != NULL);  in iwn_m_unicst()
4260 	ic = &sc->sc_ic;  in iwn_m_unicst()
4263 		mutex_enter(&sc->sc_mtx);  in iwn_m_unicst()
4265 		err = iwn_config(sc);  in iwn_m_unicst()
4266 		mutex_exit(&sc->sc_mtx);  in iwn_m_unicst()
4268 			dev_err(sc->sc_dip, CE_WARN, "!iwn_m_unicst(): "  in iwn_m_unicst()
4299 	struct iwn_softc *sc = (struct iwn_softc *)arg;  in iwn_abort_scan()  local
4300 	ieee80211com_t *ic = &sc->sc_ic;  in iwn_abort_scan()
4302 	mutex_enter(&sc->sc_mtx);  in iwn_abort_scan()
4303 	if ((sc->sc_flags & IWN_FLAG_SCANNING) == 0) {  in iwn_abort_scan()
4304 		mutex_exit(&sc->sc_mtx);  in iwn_abort_scan()
4308 	dev_err(sc->sc_dip, CE_WARN,  in iwn_abort_scan()
4310 	    sc->sc_flags, ieee80211_state_name[ic->ic_state]);  in iwn_abort_scan()
4311 	sc->sc_flags &= ~IWN_FLAG_SCANNING;  in iwn_abort_scan()
4312 	iwn_hw_stop(sc, B_FALSE);  in iwn_abort_scan()
4313 	mutex_exit(&sc->sc_mtx);  in iwn_abort_scan()
4315 	sc->scan_to = 0;  in iwn_abort_scan()
4316 	(void) iwn_init(sc);  in iwn_abort_scan()
4326 	struct iwn_softc *sc = (struct iwn_softc *)arg;  in iwn_periodic()  local
4327 	ieee80211com_t	*ic = &sc->sc_ic;  in iwn_periodic()
4331 	mutex_enter(&sc->sc_mtx);  in iwn_periodic()
4332 	tmp = IWN_READ(sc, IWN_GP_CNTRL);  in iwn_periodic()
4334 		sc->sc_flags &= ~IWN_FLAG_RADIO_OFF;  in iwn_periodic()
4336 		sc->sc_flags |= IWN_FLAG_RADIO_OFF;  in iwn_periodic()
4342 	if (sc->sc_flags & IWN_FLAG_RADIO_OFF) {  in iwn_periodic()
4343 		mutex_exit(&sc->sc_mtx);  in iwn_periodic()
4347 	mutex_exit(&sc->sc_mtx);  in iwn_periodic()
4353 	    (sc->sc_flags & IWN_FLAG_HW_ERR_RECOVER)) {  in iwn_periodic()
4354 		dev_err(sc->sc_dip, CE_WARN,  in iwn_periodic()
4357 		mutex_enter(&sc->sc_mtx);  in iwn_periodic()
4358 		sc->sc_flags |= IWN_FLAG_STOP_CALIB_TO;  in iwn_periodic()
4359 		mutex_exit(&sc->sc_mtx);  in iwn_periodic()
4361 		if (sc->calib_to != 0)  in iwn_periodic()
4362 			(void) untimeout(sc->calib_to);  in iwn_periodic()
4363 		sc->calib_to = 0;  in iwn_periodic()
4365 		if (sc->scan_to != 0)  in iwn_periodic()
4366 			(void) untimeout(sc->scan_to);  in iwn_periodic()
4367 		sc->scan_to = 0;  in iwn_periodic()
4369 		iwn_hw_stop(sc, B_TRUE);  in iwn_periodic()
4371 		if (IWN_CHK_FAST_RECOVER(sc)) {  in iwn_periodic()
4373 			bcopy(&sc->rxon, &sc->rxon_save, sizeof (sc->rxon));  in iwn_periodic()
4378 		err = iwn_init(sc);  in iwn_periodic()
4382 		mutex_enter(&sc->sc_mtx);  in iwn_periodic()
4383 		sc->sc_flags |= IWN_FLAG_RUNNING;  in iwn_periodic()
4384 		mutex_exit(&sc->sc_mtx);  in iwn_periodic()
4386 		if (!IWN_CHK_FAST_RECOVER(sc) ||  in iwn_periodic()
4387 		    iwn_fast_recover(sc) != IWN_SUCCESS) {  in iwn_periodic()
4388 			mutex_enter(&sc->sc_mtx);  in iwn_periodic()
4389 			sc->sc_flags &= ~IWN_FLAG_HW_ERR_RECOVER;  in iwn_periodic()
4390 			mutex_exit(&sc->sc_mtx);  in iwn_periodic()
4391 			if (sc->sc_ostate != IEEE80211_S_INIT) {  in iwn_periodic()
4402 iwn_cmd(struct iwn_softc *sc, uint8_t code, void *buf, int size, int async)  in iwn_cmd()  argument
4404 	struct iwn_tx_ring *ring = &sc->txq[IWN_CMD_QUEUE_NUM];  in iwn_cmd()
4412 	ASSERT(mutex_owned(&sc->sc_mtx));  in iwn_cmd()
4420 		if (iwn_dma_contig_alloc(sc, &data->cmd_dma, totlen,  in iwn_cmd()
4455 	sc->ops.update_sched(sc, ring->qid, ring->cur, 0, 0);  in iwn_cmd()
4459 	IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);  in iwn_cmd()
4464 	sc->sc_cmd_flag = SC_CMD_FLG_NONE;  in iwn_cmd()
4466 	while (sc->sc_cmd_flag != SC_CMD_FLG_DONE)  in iwn_cmd()
4467 		if (cv_timedwait(&sc->sc_cmd_cv, &sc->sc_mtx, clk) < 0)  in iwn_cmd()
4470 	ret = (sc->sc_cmd_flag == SC_CMD_FLG_DONE) ? IWN_SUCCESS : IWN_FAIL;  in iwn_cmd()
4471 	sc->sc_cmd_flag = SC_CMD_FLG_NONE;  in iwn_cmd()
4477 iwn4965_add_node(struct iwn_softc *sc, struct iwn_node_info *node, int async)  in iwn4965_add_node()  argument
4492 	return iwn_cmd(sc, IWN_CMD_ADD_NODE, &hnode, sizeof hnode, async);  in iwn4965_add_node()
4496 iwn5000_add_node(struct iwn_softc *sc, struct iwn_node_info *node, int async)  in iwn5000_add_node()  argument
4499 	return iwn_cmd(sc, IWN_CMD_ADD_NODE, node, sizeof (*node), async);  in iwn5000_add_node()
4503 iwn_set_link_quality(struct iwn_softc *sc, struct ieee80211_node *ni)  in iwn_set_link_quality()  argument
4513 	txant = IWN_LSB(sc->txchainmask);  in iwn_set_link_quality()
4534 	return iwn_cmd(sc, IWN_CMD_LINK_QUALITY, &linkq, sizeof linkq, 1);  in iwn_set_link_quality()
4541 iwn_add_broadcast_node(struct iwn_softc *sc, int async)  in iwn_add_broadcast_node()  argument
4543 	struct iwn_ops *ops = &sc->ops;  in iwn_add_broadcast_node()
4552 	node.id = sc->broadcast_id;  in iwn_add_broadcast_node()
4554 	if ((error = ops->add_node(sc, &node, async)) != 0)  in iwn_add_broadcast_node()
4558 	txant = IWN_LSB(sc->txchainmask);  in iwn_add_broadcast_node()
4561 	linkq.id = sc->broadcast_id;  in iwn_add_broadcast_node()
4569 	rinfo = (sc->sc_ic.ic_curmode != IEEE80211_MODE_11A) ?  in iwn_add_broadcast_node()
4579 	return iwn_cmd(sc, IWN_CMD_LINK_QUALITY, &linkq, sizeof linkq, async);  in iwn_add_broadcast_node()
4583 iwn_set_led(struct iwn_softc *sc, uint8_t which, uint8_t off, uint8_t on)  in iwn_set_led()  argument
4588 	IWN_CLRBITS(sc, IWN_LED, IWN_LED_BSM_CTRL);  in iwn_set_led()
4597 	(void)iwn_cmd(sc, IWN_CMD_SET_LED, &led, sizeof led, 1);  in iwn_set_led()
4605 iwn_set_critical_temp(struct iwn_softc *sc)  in iwn_set_critical_temp()  argument
4610 	IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_CTEMP_STOP_RF);  in iwn_set_critical_temp()
4612 	if (sc->hw_type == IWN_HW_REV_TYPE_5150)  in iwn_set_critical_temp()
4613 		temp = (IWN_CTOK(110) - sc->temp_off) * -5;  in iwn_set_critical_temp()
4614 	else if (sc->hw_type == IWN_HW_REV_TYPE_4965)  in iwn_set_critical_temp()
4619 	sc->sc_misc->crit_temp.value.ul = temp;  in iwn_set_critical_temp()
4623 	return iwn_cmd(sc, IWN_CMD_SET_CRITICAL_TEMP, &crit, sizeof crit, 0);  in iwn_set_critical_temp()
4627 iwn_set_timing(struct iwn_softc *sc, struct ieee80211_node *ni)  in iwn_set_timing()  argument
4642 	sc->sc_timing->bintval.value.ul = ni->in_intval;  in iwn_set_timing()
4643 	sc->sc_timing->tstamp.value.ul = ni->in_tstamp.tsf;  in iwn_set_timing()
4644 	sc->sc_timing->init.value.ul = (uint32_t)(val - mod);  in iwn_set_timing()
4646 	return iwn_cmd(sc, IWN_CMD_TIMING, &cmd, sizeof cmd, 1);  in iwn_set_timing()
4650 iwn4965_power_calibration(struct iwn_softc *sc, int temp)  in iwn4965_power_calibration()  argument
4653 	IWN_DBG("temperature %d->%d", sc->temp, temp);  in iwn4965_power_calibration()
4654 	if (abs(temp - sc->temp) >= 3) {  in iwn4965_power_calibration()
4656 		sc->temp = temp;  in iwn4965_power_calibration()
4657 		(void)iwn4965_set_txpower(sc, 1);  in iwn4965_power_calibration()
4667 iwn4965_set_txpower(struct iwn_softc *sc, int async)  in iwn4965_set_txpower()  argument
4677 	struct ieee80211com *ic = &sc->sc_ic;  in iwn4965_set_txpower()
4678 	struct iwn_ucode_info *uc = &sc->ucode_info;  in iwn4965_set_txpower()
4688 	chan = sc->rxon.chan;  in iwn4965_set_txpower()
4689 	sc->sc_txpower->chan.value.l = chan;  in iwn4965_set_txpower()
4697 		maxpwr   = sc->maxpwr5GHz;  in iwn4965_set_txpower()
4701 		maxpwr   = sc->maxpwr2GHz;  in iwn4965_set_txpower()
4707 	vdiff = ((int32_t)le32toh(uc->volt) - sc->eeprom_voltage) / 7;  in iwn4965_set_txpower()
4712 	sc->sc_txpower->vdiff.value.l = vdiff;  in iwn4965_set_txpower()
4725 	sc->sc_txpower->group.value.l = grp;  in iwn4965_set_txpower()
4729 		if (sc->bands[i].lo != 0 &&  in iwn4965_set_txpower()
4730 		    sc->bands[i].lo <= chan && chan <= sc->bands[i].hi)  in iwn4965_set_txpower()
4734 	chans = sc->bands[i].chans;  in iwn4965_set_txpower()
4735 	sc->sc_txpower->subband.value.l = i;  in iwn4965_set_txpower()
4750 		sc->sc_txpower->txchain[c].power.value.l = power;  in iwn4965_set_txpower()
4751 		sc->sc_txpower->txchain[c].gain.value.l = gain;  in iwn4965_set_txpower()
4752 		sc->sc_txpower->txchain[c].temp.value.l = temp;  in iwn4965_set_txpower()
4755 		tdiff = ((sc->temp - temp) * 2) / tdiv[grp];  in iwn4965_set_txpower()
4756 		sc->sc_txpower->txchain[c].tcomp.value.l = tdiff;  in iwn4965_set_txpower()
4760 			maxchpwr = sc->maxpwr[chan] * 2;  in iwn4965_set_txpower()
4795 			sc->sc_txpower->txchain[c].rate[ridx].rf_gain.value.l =  in iwn4965_set_txpower()
4797 			sc->sc_txpower->txchain[c].rate[ridx].dsp_gain.value.l =  in iwn4965_set_txpower()
4802 	return iwn_cmd(sc, IWN_CMD_TXPOWER, &cmd, sizeof cmd, async);  in iwn4965_set_txpower()
4809 iwn5000_set_txpower(struct iwn_softc *sc, int async)  in iwn5000_set_txpower()  argument
4821 	return iwn_cmd(sc, IWN_CMD_TXPOWER_DBM, &cmd, sizeof cmd, async);  in iwn5000_set_txpower()
4887 iwn4965_get_temperature(struct iwn_softc *sc)  in iwn4965_get_temperature()  argument
4889 	struct iwn_ucode_info *uc = &sc->ucode_info;  in iwn4965_get_temperature()
4895 	r4 = le32toh(sc->rawtemp);  in iwn4965_get_temperature()
4910 iwn5000_get_temperature(struct iwn_softc *sc)  in iwn5000_get_temperature()  argument
4919 	temp = le32toh(sc->rawtemp);  in iwn5000_get_temperature()
4920 	if (sc->hw_type == IWN_HW_REV_TYPE_5150) {  in iwn5000_get_temperature()
4921 		temp = (temp / -5) + sc->temp_off;  in iwn5000_get_temperature()
4931 iwn_init_sensitivity(struct iwn_softc *sc)  in iwn_init_sensitivity()  argument
4933 	struct iwn_ops *ops = &sc->ops;  in iwn_init_sensitivity()
4934 	struct iwn_calib_state *calib = &sc->calib;  in iwn_init_sensitivity()
4943 	calib->ofdm_x1     = sc->limits->min_ofdm_x1;  in iwn_init_sensitivity()
4944 	calib->ofdm_mrc_x1 = sc->limits->min_ofdm_mrc_x1;  in iwn_init_sensitivity()
4945 	calib->ofdm_x4     = sc->limits->min_ofdm_x4;  in iwn_init_sensitivity()
4946 	calib->ofdm_mrc_x4 = sc->limits->min_ofdm_mrc_x4;  in iwn_init_sensitivity()
4948 	calib->cck_mrc_x4  = sc->limits->min_cck_mrc_x4;  in iwn_init_sensitivity()
4949 	calib->energy_cck  = sc->limits->energy_cck;  in iwn_init_sensitivity()
4952 	if ((error = iwn_send_sensitivity(sc)) != 0)  in iwn_init_sensitivity()
4956 	if ((error = ops->init_gains(sc)) != 0)  in iwn_init_sensitivity()
4961 	return iwn_cmd(sc, IWN_CMD_GET_STATISTICS, &flags, sizeof flags, 1);  in iwn_init_sensitivity()
4970 iwn_collect_noise(struct iwn_softc *sc,  in iwn_collect_noise()  argument
4973 	struct iwn_ops *ops = &sc->ops;  in iwn_collect_noise()
4974 	struct iwn_calib_state *calib = &sc->calib;  in iwn_collect_noise()
4992 	sc->chainmask = sc->rxchainmask;  in iwn_collect_noise()
4995 			sc->chainmask &= ~(1 << i);  in iwn_collect_noise()
4997 	sc->sc_ant->conn_ant.value.ul = sc->chainmask;  in iwn_collect_noise()
5000 	if ((sc->chainmask & sc->txchainmask) == 0)  in iwn_collect_noise()
5001 		sc->chainmask |= IWN_LSB(sc->txchainmask);  in iwn_collect_noise()
5003 	(void)ops->set_gains(sc);  in iwn_collect_noise()
5008 	sc->rxon.rxchain = htole16(IWN_RXCHAIN_SEL(sc->chainmask));  in iwn_collect_noise()
5009 	DTRACE_PROBE2(rxon, struct iwn_rxon *, &sc->rxon, int, sc->rxonsz);  in iwn_collect_noise()
5010 	(void)iwn_cmd(sc, IWN_CMD_RXON, &sc->rxon, sc->rxonsz, 1);  in iwn_collect_noise()
5014 	if (sc->sc_ic.ic_flags & IEEE80211_F_PMGTON)  in iwn_collect_noise()
5015 		(void)iwn_set_pslevel(sc, 0, 3, 1);  in iwn_collect_noise()
5019 iwn4965_init_gains(struct iwn_softc *sc)  in iwn4965_init_gains()  argument
5026 	return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);  in iwn4965_init_gains()
5030 iwn5000_init_gains(struct iwn_softc *sc)  in iwn5000_init_gains()  argument
5035 	cmd.code = sc->reset_noise_gain;  in iwn5000_init_gains()
5038 	return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);  in iwn5000_init_gains()
5042 iwn4965_set_gains(struct iwn_softc *sc)  in iwn4965_set_gains()  argument
5044 	struct iwn_calib_state *calib = &sc->calib;  in iwn4965_set_gains()
5051 		if (sc->chainmask & (1 << i))  in iwn4965_set_gains()
5058 		if (sc->chainmask & (1 << i)) {  in iwn4965_set_gains()
5066 			sc->sc_ant->gain[i].value.ul = cmd.gain[i];  in iwn4965_set_gains()
5069 	return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);  in iwn4965_set_gains()
5073 iwn5000_set_gains(struct iwn_softc *sc)  in iwn5000_set_gains()  argument
5075 	struct iwn_calib_state *calib = &sc->calib;  in iwn5000_set_gains()
5080 	div = (sc->hw_type == IWN_HW_REV_TYPE_6050) ? 20 : 30;  in iwn5000_set_gains()
5083 	cmd.code = sc->noise_gain;  in iwn5000_set_gains()
5087 	ant = IWN_LSB(sc->rxchainmask);  in iwn5000_set_gains()
5090 		if (sc->chainmask & (1 << i)) {  in iwn5000_set_gains()
5097 			sc->sc_ant->gain[i - 1].value.ul  in iwn5000_set_gains()
5101 	return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);  in iwn5000_set_gains()
5109 iwn_tune_sensitivity(struct iwn_softc *sc, const struct iwn_rx_stats *stats)  in iwn_tune_sensitivity()  argument
5128 	const struct iwn_sensitivity_limits *limits = sc->limits;  in iwn_tune_sensitivity()
5129 	struct iwn_calib_state *calib = &sc->calib;  in iwn_tune_sensitivity()
5249 		(void)iwn_send_sensitivity(sc);  in iwn_tune_sensitivity()
5255 iwn_send_sensitivity(struct iwn_softc *sc)  in iwn_send_sensitivity()  argument
5257 	struct iwn_calib_state *calib = &sc->calib;  in iwn_send_sensitivity()
5269 	cmd.energy_ofdm      = htole16(sc->limits->energy_ofdm);  in iwn_send_sensitivity()
5278 	if (!(sc->sc_flags & IWN_FLAG_ENH_SENS))  in iwn_send_sensitivity()
5292 	sc->sc_sens->ofdm_x1.value.ul = calib->ofdm_x1;  in iwn_send_sensitivity()
5293 	sc->sc_sens->ofdm_mrc_x1.value.ul = calib->ofdm_mrc_x1;  in iwn_send_sensitivity()
5294 	sc->sc_sens->ofdm_x4.value.ul = calib->ofdm_x4;  in iwn_send_sensitivity()
5295 	sc->sc_sens->ofdm_mrc_x4.value.ul = calib->ofdm_mrc_x4;  in iwn_send_sensitivity()
5296 	sc->sc_sens->cck_x4.value.ul = calib->cck_x4;  in iwn_send_sensitivity()
5297 	sc->sc_sens->cck_mrc_x4.value.ul = calib->cck_mrc_x4;  in iwn_send_sensitivity()
5298 	sc->sc_sens->energy_cck.value.ul = calib->energy_cck;  in iwn_send_sensitivity()
5300 	return iwn_cmd(sc, IWN_CMD_SET_SENSITIVITY, &cmd, len, 1);  in iwn_send_sensitivity()
5308 iwn_set_pslevel(struct iwn_softc *sc, int dtim, int level, int async)  in iwn_set_pslevel()  argument
5330 	reg = pci_config_get32(sc->sc_pcih,  in iwn_set_pslevel()
5331 	    sc->sc_cap_off + PCIE_LINKCTL);  in iwn_set_pslevel()
5354 	sc->sc_misc->pslevel.value.ul = level;  in iwn_set_pslevel()
5355 	return iwn_cmd(sc, IWN_CMD_SET_POWER_MODE, &cmd, sizeof cmd, async);  in iwn_set_pslevel()
5359 iwn5000_runtime_calib(struct iwn_softc *sc)  in iwn5000_runtime_calib()  argument
5366 	return iwn_cmd(sc, IWN5000_CMD_CALIB_CONFIG, &cmd, sizeof(cmd), 0);  in iwn5000_runtime_calib()
5370 iwn_config_bt_coex_bluetooth(struct iwn_softc *sc)  in iwn_config_bt_coex_bluetooth()  argument
5379 	return iwn_cmd(sc, IWN_CMD_BT_COEX, &bluetooth, sizeof bluetooth, 0);  in iwn_config_bt_coex_bluetooth()
5383 iwn_config_bt_coex_prio_table(struct iwn_softc *sc)  in iwn_config_bt_coex_prio_table()  argument
5398 	return iwn_cmd(sc, IWN_CMD_BT_COEX_PRIO_TABLE,  in iwn_config_bt_coex_prio_table()
5403 iwn_config_bt_coex_adv_config(struct iwn_softc *sc, struct iwn_bt_basic *basic,  in iwn_config_bt_coex_adv_config()  argument
5432 	error = iwn_cmd(sc, IWN_CMD_BT_COEX, &basic, len, 0);  in iwn_config_bt_coex_adv_config()
5434 		dev_err(sc->sc_dip, CE_WARN,  in iwn_config_bt_coex_adv_config()
5439 	error = iwn_config_bt_coex_prio_table(sc);  in iwn_config_bt_coex_adv_config()
5441 		dev_err(sc->sc_dip, CE_WARN,  in iwn_config_bt_coex_adv_config()
5450 	error = iwn_cmd(sc, IWN_CMD_BT_COEX_PROT, &btprot, sizeof btprot, 1);  in iwn_config_bt_coex_adv_config()
5452 		dev_err(sc->sc_dip, CE_WARN, "!could not open BT protcol");  in iwn_config_bt_coex_adv_config()
5457 	error = iwn_cmd(sc, IWN_CMD_BT_COEX_PROT, &btprot, sizeof btprot, 1);  in iwn_config_bt_coex_adv_config()
5459 		dev_err(sc->sc_dip, CE_WARN, "!could not close BT protcol");  in iwn_config_bt_coex_adv_config()
5466 iwn_config_bt_coex_adv1(struct iwn_softc *sc)  in iwn_config_bt_coex_adv1()  argument
5474 	return iwn_config_bt_coex_adv_config(sc, &d.basic, sizeof d);  in iwn_config_bt_coex_adv1()
5478 iwn_config_bt_coex_adv2(struct iwn_softc *sc)  in iwn_config_bt_coex_adv2()  argument
5486 	return iwn_config_bt_coex_adv_config(sc, &d.basic, sizeof d);  in iwn_config_bt_coex_adv2()
5490 iwn_config(struct iwn_softc *sc)  in iwn_config()  argument
5492 	struct iwn_ops *ops = &sc->ops;  in iwn_config()
5493 	struct ieee80211com *ic = &sc->sc_ic;  in iwn_config()
5498 	error = ops->config_bt_coex(sc);  in iwn_config()
5500 		dev_err(sc->sc_dip, CE_WARN,  in iwn_config()
5506 	if (sc->hw_type == IWN_HW_REV_TYPE_6005) {  in iwn_config()
5507 		error = iwn6000_temp_offset_calib(sc);  in iwn_config()
5509 			dev_err(sc->sc_dip, CE_WARN,  in iwn_config()
5515 	if (sc->hw_type == IWN_HW_REV_TYPE_2030 ||  in iwn_config()
5516 	    sc->hw_type == IWN_HW_REV_TYPE_2000 ||  in iwn_config()
5517 	    sc->hw_type == IWN_HW_REV_TYPE_135  ||  in iwn_config()
5518 	    sc->hw_type == IWN_HW_REV_TYPE_105) {  in iwn_config()
5519 		error = iwn2000_temp_offset_calib(sc);  in iwn_config()
5521 			dev_err(sc->sc_dip, CE_WARN,  in iwn_config()
5527 	if (sc->hw_type == IWN_HW_REV_TYPE_6050 ||  in iwn_config()
5528 	    sc->hw_type == IWN_HW_REV_TYPE_6005) {  in iwn_config()
5530 		error = iwn5000_runtime_calib(sc);  in iwn_config()
5532 			dev_err(sc->sc_dip, CE_WARN,  in iwn_config()
5539 	if (sc->hw_type != IWN_HW_REV_TYPE_4965) {  in iwn_config()
5540 		txmask = htole32(sc->txchainmask);  in iwn_config()
5541 		error = iwn_cmd(sc, IWN5000_CMD_TX_ANT_CONFIG, &txmask,  in iwn_config()
5544 			dev_err(sc->sc_dip, CE_WARN,  in iwn_config()
5551 	memset(&sc->rxon, 0, sizeof (struct iwn_rxon));  in iwn_config()
5552 	IEEE80211_ADDR_COPY(sc->rxon.myaddr, ic->ic_macaddr);  in iwn_config()
5553 	IEEE80211_ADDR_COPY(sc->rxon.wlap, ic->ic_macaddr);  in iwn_config()
5554 	sc->rxon.chan = ieee80211_chan2ieee(ic, ic->ic_ibss_chan);  in iwn_config()
5555 	sc->rxon.flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF);  in iwn_config()
5557 		sc->rxon.flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);  in iwn_config()
5560 		sc->rxon.mode = IWN_MODE_IBSS;  in iwn_config()
5561 		sc->rxon.filter = htole32(IWN_FILTER_MULTICAST);  in iwn_config()
5564 		sc->rxon.mode = IWN_MODE_STA;  in iwn_config()
5565 		sc->rxon.filter = htole32(IWN_FILTER_MULTICAST);  in iwn_config()
5568 		sc->rxon.mode = IWN_MODE_MONITOR;  in iwn_config()
5569 		sc->rxon.filter = htole32(IWN_FILTER_MULTICAST |  in iwn_config()
5579 	sc->rxon.cck_mask  = 0x0f;	/* not yet negotiated */  in iwn_config()
5580 	sc->rxon.ofdm_mask = 0xff;	/* not yet negotiated */  in iwn_config()
5581 	sc->rxon.ht_single_mask = 0xff;  in iwn_config()
5582 	sc->rxon.ht_dual_mask = 0xff;  in iwn_config()
5583 	sc->rxon.ht_triple_mask = 0xff;  in iwn_config()
5585 	    IWN_RXCHAIN_VALID(sc->rxchainmask) |  in iwn_config()
5588 	sc->rxon.rxchain = htole16(rxchain);  in iwn_config()
5589 	DTRACE_PROBE2(rxon, struct iwn_rxon *, &sc->rxon, int, sc->rxonsz);  in iwn_config()
5590 	error = iwn_cmd(sc, IWN_CMD_RXON, &sc->rxon, sc->rxonsz, 0);  in iwn_config()
5592 		dev_err(sc->sc_dip, CE_WARN,  in iwn_config()
5597 	if ((error = iwn_add_broadcast_node(sc, 0)) != 0) {  in iwn_config()
5598 		dev_err(sc->sc_dip, CE_WARN,  in iwn_config()
5604 	if ((error = ops->set_txpower(sc, 0)) != 0) {  in iwn_config()
5605 		dev_err(sc->sc_dip, CE_WARN,  in iwn_config()
5610 	if ((error = iwn_set_critical_temp(sc)) != 0) {  in iwn_config()
5611 		dev_err(sc->sc_dip, CE_WARN,  in iwn_config()
5617 	if ((error = iwn_set_pslevel(sc, 0, 0, 0)) != 0) {  in iwn_config()
5618 		dev_err(sc->sc_dip, CE_WARN,  in iwn_config()
5626 iwn_get_active_dwell_time(struct iwn_softc *sc, uint16_t flags,  in iwn_get_active_dwell_time()  argument
5629 	_NOTE(ARGUNUSED(sc));  in iwn_get_active_dwell_time()
5647 iwn_limit_dwell(struct iwn_softc *sc, uint16_t dwell_time)  in iwn_limit_dwell()  argument
5651 	struct ieee80211com *ic = &sc->sc_ic;  in iwn_limit_dwell()
5674 iwn_get_passive_dwell_time(struct iwn_softc *sc, uint16_t flags)  in iwn_get_passive_dwell_time()  argument
5683 	return iwn_limit_dwell(sc, passive);  in iwn_get_passive_dwell_time()
5687 iwn_scan(struct iwn_softc *sc, uint16_t flags)  in iwn_scan()  argument
5689 	struct ieee80211com *ic = &sc->sc_ic;  in iwn_scan()
5704 		dev_err(sc->sc_dip, CE_WARN,  in iwn_scan()
5718 	    IWN_RXCHAIN_VALID(sc->rxchainmask) |  in iwn_scan()
5719 	    IWN_RXCHAIN_FORCE_MIMO_SEL(sc->rxchainmask) |  in iwn_scan()
5722 	    sc->hw_type == IWN_HW_REV_TYPE_4965) {  in iwn_scan()
5726 		rxchain |= IWN_RXCHAIN_FORCE_SEL(sc->rxchainmask);  in iwn_scan()
5732 	tx->id = sc->broadcast_id;  in iwn_scan()
5750 	txant = IWN_LSB(sc->txchainmask);  in iwn_scan()
5832 	if (sc->tlv_feature_flags & IWN_UCODE_TLV_FLAGS_NEWSCAN)  in iwn_scan()
5855 		dwell_active = iwn_get_active_dwell_time(sc, flags, is_active);  in iwn_scan()
5856 		dwell_passive = iwn_get_passive_dwell_time(sc, flags);  in iwn_scan()
5882 	error = iwn_cmd(sc, IWN_CMD_SCAN, buf, buflen, 1);  in iwn_scan()
5888 iwn_auth(struct iwn_softc *sc)  in iwn_auth()  argument
5890 	struct iwn_ops *ops = &sc->ops;  in iwn_auth()
5891 	struct ieee80211com *ic = &sc->sc_ic;  in iwn_auth()
5898 	IEEE80211_ADDR_COPY(sc->rxon.bssid, ni->in_bssid);  in iwn_auth()
5899 	sc->rxon.chan = ieee80211_chan2ieee(ic, ni->in_chan);  in iwn_auth()
5900 	sc->rxon.flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF);  in iwn_auth()
5903 		sc->rxon.flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);  in iwn_auth()
5905 		sc->rxon.flags |= htole32(IWN_RXON_SHSLOT);  in iwn_auth()
5907 		sc->rxon.flags |= htole32(IWN_RXON_SHPREAMBLE);  in iwn_auth()
5910 		sc->rxon.cck_mask  = 0;  in iwn_auth()
5911 		sc->rxon.ofdm_mask = 0x15;  in iwn_auth()
5914 		sc->rxon.cck_mask  = 0x03;  in iwn_auth()
5915 		sc->rxon.ofdm_mask = 0;  in iwn_auth()
5918 		sc->rxon.cck_mask  = 0x0f;  in iwn_auth()
5919 		sc->rxon.ofdm_mask = 0x15;  in iwn_auth()
5921 	DTRACE_PROBE2(rxon, struct iwn_rxon *, &sc->rxon, int, sc->rxonsz);  in iwn_auth()
5922 	error = iwn_cmd(sc, IWN_CMD_RXON, &sc->rxon, sc->rxonsz, 1);  in iwn_auth()
5924 		dev_err(sc->sc_dip, CE_WARN,  in iwn_auth()
5930 	if ((error = ops->set_txpower(sc, 1)) != 0) {  in iwn_auth()
5931 		dev_err(sc->sc_dip, CE_WARN,  in iwn_auth()
5939 	if ((error = iwn_add_broadcast_node(sc, 1)) != 0) {  in iwn_auth()
5940 		dev_err(sc->sc_dip, CE_WARN,  in iwn_auth()
5948 iwn_fast_recover(struct iwn_softc *sc)  in iwn_fast_recover()  argument
5952 	mutex_enter(&sc->sc_mtx);  in iwn_fast_recover()
5955 	bcopy(&sc->rxon_save, &sc->rxon,  in iwn_fast_recover()
5956 	    sizeof (sc->rxon));  in iwn_fast_recover()
5958 	sc->rxon.associd = 0;  in iwn_fast_recover()
5959 	sc->rxon.filter &= ~htole32(IWN_FILTER_BSS);  in iwn_fast_recover()
5961 	if ((err = iwn_auth(sc)) != IWN_SUCCESS) {  in iwn_fast_recover()
5962 		dev_err(sc->sc_dip, CE_WARN, "!iwn_fast_recover(): "  in iwn_fast_recover()
5964 		mutex_exit(&sc->sc_mtx);  in iwn_fast_recover()
5968 	bcopy(&sc->rxon_save, &sc->rxon, sizeof (sc->rxon));  in iwn_fast_recover()
5971 	err = iwn_run(sc);  in iwn_fast_recover()
5973 		dev_err(sc->sc_dip, CE_WARN, "!iwn_fast_recover(): "  in iwn_fast_recover()
5975 		mutex_exit(&sc->sc_mtx);  in iwn_fast_recover()
5979 	iwn_set_led(sc, IWN_LED_LINK, 0, 1);  in iwn_fast_recover()
5981 	sc->sc_flags &= ~IWN_FLAG_HW_ERR_RECOVER;  in iwn_fast_recover()
5982 	mutex_exit(&sc->sc_mtx);  in iwn_fast_recover()
5991 iwn_run(struct iwn_softc *sc)  in iwn_run()  argument
5993 	struct iwn_ops *ops = &sc->ops;  in iwn_run()
5994 	struct ieee80211com *ic = &sc->sc_ic;  in iwn_run()
6001 		iwn_set_led(sc, IWN_LED_LINK, 5, 5);  in iwn_run()
6004 	if ((error = iwn_set_timing(sc, ni)) != 0) {  in iwn_run()
6005 		dev_err(sc->sc_dip, CE_WARN,  in iwn_run()
6011 	IEEE80211_ADDR_COPY(sc->rxon.bssid, ni->in_bssid);  in iwn_run()
6012 	sc->rxon.associd = htole16(IEEE80211_AID(ni->in_associd));  in iwn_run()
6014 	sc->rxon.flags &= ~htole32(IWN_RXON_SHPREAMBLE | IWN_RXON_SHSLOT);  in iwn_run()
6016 		sc->rxon.flags |= htole32(IWN_RXON_SHSLOT);  in iwn_run()
6018 		sc->rxon.flags |= htole32(IWN_RXON_SHPREAMBLE);  in iwn_run()
6019 	sc->rxon.filter |= htole32(IWN_FILTER_BSS);  in iwn_run()
6022 		sc->rxon.filter |= htole32(IWN_FILTER_BEACON);  in iwn_run()
6023 	DTRACE_PROBE2(rxon, struct iwn_rxon *, &sc->rxon, int, sc->rxonsz);  in iwn_run()
6024 	error = iwn_cmd(sc, IWN_CMD_RXON, &sc->rxon, sc->rxonsz, 1);  in iwn_run()
6026 		dev_err(sc->sc_dip, CE_WARN,  in iwn_run()
6032 	if ((error = ops->set_txpower(sc, 1)) != 0) {  in iwn_run()
6033 		dev_err(sc->sc_dip, CE_WARN,  in iwn_run()
6050 	error = ops->add_node(sc, &node, 1);  in iwn_run()
6052 		dev_err(sc->sc_dip, CE_WARN,  in iwn_run()
6056 	if ((error = iwn_set_link_quality(sc, ni)) != 0) {  in iwn_run()
6057 		dev_err(sc->sc_dip, CE_WARN,  in iwn_run()
6062 	if ((error = iwn_init_sensitivity(sc)) != 0) {  in iwn_run()
6063 		dev_err(sc->sc_dip, CE_WARN,  in iwn_run()
6068 	if ((error = iwn_qosparam_to_hw(sc, 1)) != 0) {  in iwn_run()
6069 		dev_err(sc->sc_dip, CE_WARN,  in iwn_run()
6075 	sc->sc_flags &= ~IWN_FLAG_STOP_CALIB_TO;  in iwn_run()
6076 	sc->calib.state = IWN_CALIB_STATE_ASSOC;  in iwn_run()
6077 	sc->calib_cnt = 0;  in iwn_run()
6078 	sc->calib_to = timeout(iwn_calib_timeout, sc, drv_usectohz(500000));  in iwn_run()
6081 	iwn_set_led(sc, IWN_LED_LINK, 0, 1);  in iwn_run()
6094 	struct iwn_softc *sc = ic->ic_softc;  in iwn_set_key()  local
6095 	struct iwn_ops *ops = &sc->ops;  in iwn_set_key()
6110 	    sc->broadcast_id : wn->id;  in iwn_set_key()
6117 	return ops->add_node(sc, &node, 1);  in iwn_set_key()
6124 	struct iwn_softc *sc = ic->ic_softc;  in iwn_delete_key()  local
6125 	struct iwn_ops *ops = &sc->ops;  in iwn_delete_key()
6139 	    sc->broadcast_id : wn->id;  in iwn_delete_key()
6145 	(void)ops->add_node(sc, &node, 1);  in iwn_delete_key()
6159 	struct iwn_softc *sc = ic->ic_softc;  in iwn_ampdu_rx_start()  local
6160 	struct iwn_ops *ops = &sc->ops;  in iwn_ampdu_rx_start()
6171 	return ops->add_node(sc, &node, 1);  in iwn_ampdu_rx_start()
6182 	struct iwn_softc *sc = ic->ic_softc;  in iwn_ampdu_rx_stop()  local
6183 	struct iwn_ops *ops = &sc->ops;  in iwn_ampdu_rx_stop()
6193 	(void)ops->add_node(sc, &node, 1);  in iwn_ampdu_rx_stop()
6205 	struct iwn_softc *sc = ic->ic_softc;  in iwn_ampdu_tx_start()  local
6206 	struct iwn_ops *ops = &sc->ops;  in iwn_ampdu_tx_start()
6218 	error = ops->add_node(sc, &node, 1);  in iwn_ampdu_tx_start()
6222 	if ((error = iwn_nic_lock(sc)) != 0)  in iwn_ampdu_tx_start()
6224 	ops->ampdu_tx_start(sc, ni, tid, ba->ba_winstart);  in iwn_ampdu_tx_start()
6225 	iwn_nic_unlock(sc);  in iwn_ampdu_tx_start()
6234 	struct iwn_softc *sc = ic->ic_softc;  in iwn_ampdu_tx_stop()  local
6235 	struct iwn_ops *ops = &sc->ops;  in iwn_ampdu_tx_stop()
6237 	if (iwn_nic_lock(sc) != 0)  in iwn_ampdu_tx_stop()
6239 	ops->ampdu_tx_stop(sc, tid, ba->ba_winstart);  in iwn_ampdu_tx_stop()
6240 	iwn_nic_unlock(sc);  in iwn_ampdu_tx_stop()
6244 iwn4965_ampdu_tx_start(struct iwn_softc *sc, struct ieee80211_node *ni,  in iwn4965_ampdu_tx_start()  argument
6251 	iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),  in iwn4965_ampdu_tx_start()
6255 	iwn_mem_write_2(sc, sc->sched_base + IWN4965_SCHED_TRANS_TBL(qid),  in iwn4965_ampdu_tx_start()
6259 	iwn_prph_setbits(sc, IWN4965_SCHED_QCHAIN_SEL, 1 << qid);  in iwn4965_ampdu_tx_start()
6262 	IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));  in iwn4965_ampdu_tx_start()
6263 	iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), ssn);  in iwn4965_ampdu_tx_start()
6266 	iwn_mem_write(sc, sc->sched_base + IWN4965_SCHED_QUEUE_OFFSET(qid),  in iwn4965_ampdu_tx_start()
6269 	iwn_mem_write(sc, sc->sched_base + IWN4965_SCHED_QUEUE_OFFSET(qid) + 4,  in iwn4965_ampdu_tx_start()
6273 	iwn_prph_setbits(sc, IWN4965_SCHED_INTR_MASK, 1 << qid);  in iwn4965_ampdu_tx_start()
6276 	iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),  in iwn4965_ampdu_tx_start()
6282 iwn4965_ampdu_tx_stop(struct iwn_softc *sc, uint8_t tid, uint16_t ssn)  in iwn4965_ampdu_tx_stop()  argument
6287 	iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),  in iwn4965_ampdu_tx_stop()
6291 	IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));  in iwn4965_ampdu_tx_stop()
6292 	iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), ssn);  in iwn4965_ampdu_tx_stop()
6295 	iwn_prph_clrbits(sc, IWN4965_SCHED_INTR_MASK, 1 << qid);  in iwn4965_ampdu_tx_stop()
6298 	iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),  in iwn4965_ampdu_tx_stop()
6303 iwn5000_ampdu_tx_start(struct iwn_softc *sc, struct ieee80211_node *ni,  in iwn5000_ampdu_tx_start()  argument
6310 	iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),  in iwn5000_ampdu_tx_start()
6314 	iwn_mem_write_2(sc, sc->sched_base + IWN5000_SCHED_TRANS_TBL(qid),  in iwn5000_ampdu_tx_start()
6318 	iwn_prph_setbits(sc, IWN5000_SCHED_QCHAIN_SEL, 1 << qid);  in iwn5000_ampdu_tx_start()
6321 	iwn_prph_setbits(sc, IWN5000_SCHED_AGGR_SEL, 1 << qid);  in iwn5000_ampdu_tx_start()
6324 	IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));  in iwn5000_ampdu_tx_start()
6325 	iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), ssn);  in iwn5000_ampdu_tx_start()
6328 	iwn_mem_write(sc, sc->sched_base + IWN5000_SCHED_QUEUE_OFFSET(qid) + 4,  in iwn5000_ampdu_tx_start()
6332 	iwn_prph_setbits(sc, IWN5000_SCHED_INTR_MASK, 1 << qid);  in iwn5000_ampdu_tx_start()
6335 	iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),  in iwn5000_ampdu_tx_start()
6340 iwn5000_ampdu_tx_stop(struct iwn_softc *sc, uint8_t tid, uint16_t ssn)  in iwn5000_ampdu_tx_stop()  argument
6345 	iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),  in iwn5000_ampdu_tx_stop()
6349 	iwn_prph_clrbits(sc, IWN5000_SCHED_AGGR_SEL, 1 << qid);  in iwn5000_ampdu_tx_stop()
6352 	IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));  in iwn5000_ampdu_tx_stop()
6353 	iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), ssn);  in iwn5000_ampdu_tx_stop()
6356 	iwn_prph_clrbits(sc, IWN5000_SCHED_INTR_MASK, 1 << qid);  in iwn5000_ampdu_tx_stop()
6359 	iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),  in iwn5000_ampdu_tx_stop()
6369 iwn5000_query_calibration(struct iwn_softc *sc)  in iwn5000_query_calibration()  argument
6375 	ASSERT(mutex_owned(&sc->sc_mtx));  in iwn5000_query_calibration()
6382 	error = iwn_cmd(sc, IWN5000_CMD_CALIB_CONFIG, &cmd, sizeof cmd, 0);  in iwn5000_query_calibration()
6388 	while (!(sc->sc_flags & IWN_FLAG_CALIB_DONE))  in iwn5000_query_calibration()
6389 		if (cv_timedwait(&sc->sc_calib_cv, &sc->sc_mtx, clk) < 0)  in iwn5000_query_calibration()
6400 iwn5000_send_calibration(struct iwn_softc *sc)  in iwn5000_send_calibration()  argument
6405 		if (sc->calibcmd[idx].buf == NULL)  in iwn5000_send_calibration()
6407 		error = iwn_cmd(sc, IWN_CMD_PHY_CALIB, sc->calibcmd[idx].buf,  in iwn5000_send_calibration()
6408 		    sc->calibcmd[idx].len, 0);  in iwn5000_send_calibration()
6410 			dev_err(sc->sc_dip, CE_WARN,  in iwn5000_send_calibration()
6419 iwn5000_send_wimax_coex(struct iwn_softc *sc)  in iwn5000_send_wimax_coex()  argument
6424 	if (sc->hw_type == IWN_HW_REV_TYPE_6050) {  in iwn5000_send_wimax_coex()
6440 	return iwn_cmd(sc, IWN5000_CMD_WIMAX_COEX, &wimax, sizeof wimax, 0);  in iwn5000_send_wimax_coex()
6444 iwn6000_temp_offset_calib(struct iwn_softc *sc)  in iwn6000_temp_offset_calib()  argument
6452 	if (sc->eeprom_temp != 0)  in iwn6000_temp_offset_calib()
6453 		cmd.offset = htole16(sc->eeprom_temp);  in iwn6000_temp_offset_calib()
6456 	sc->sc_toff.t6000->toff.value.l = le16toh(cmd.offset);  in iwn6000_temp_offset_calib()
6457 	return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0);  in iwn6000_temp_offset_calib()
6461 iwn2000_temp_offset_calib(struct iwn_softc *sc)  in iwn2000_temp_offset_calib()  argument
6469 	if (sc->eeprom_rawtemp != 0) {  in iwn2000_temp_offset_calib()
6470 		cmd.offset_low = htole16(sc->eeprom_rawtemp);  in iwn2000_temp_offset_calib()
6471 		cmd.offset_high = htole16(sc->eeprom_temp);  in iwn2000_temp_offset_calib()
6476 	cmd.burnt_voltage_ref = htole16(sc->eeprom_voltage);  in iwn2000_temp_offset_calib()
6477 	sc->sc_toff.t2000->toff_lo.value.l = le16toh(cmd.offset_low);  in iwn2000_temp_offset_calib()
6478 	sc->sc_toff.t2000->toff_hi.value.l = le16toh(cmd.offset_high);  in iwn2000_temp_offset_calib()
6479 	sc->sc_toff.t2000->volt.value.l = le16toh(cmd.burnt_voltage_ref);  in iwn2000_temp_offset_calib()
6481 	return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0);  in iwn2000_temp_offset_calib()
6489 iwn4965_post_alive(struct iwn_softc *sc)  in iwn4965_post_alive()  argument
6493 	if ((error = iwn_nic_lock(sc)) != 0)  in iwn4965_post_alive()
6497 	sc->sched_base = iwn_prph_read(sc, IWN_SCHED_SRAM_ADDR);  in iwn4965_post_alive()
6498 	iwn_mem_set_region_4(sc, sc->sched_base + IWN4965_SCHED_CTX_OFF, 0,  in iwn4965_post_alive()
6502 	iwn_prph_write(sc, IWN4965_SCHED_DRAM_ADDR, sc->sched_dma.paddr >> 10);  in iwn4965_post_alive()
6504 	IWN_SETBITS(sc, IWN_FH_TX_CHICKEN, IWN_FH_TX_CHICKEN_SCHED_RETRY);  in iwn4965_post_alive()
6507 	iwn_prph_write(sc, IWN4965_SCHED_QCHAIN_SEL, 0);  in iwn4965_post_alive()
6510 		iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), 0);  in iwn4965_post_alive()
6511 		IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | 0);  in iwn4965_post_alive()
6514 		iwn_mem_write(sc, sc->sched_base +  in iwn4965_post_alive()
6517 		iwn_mem_write(sc, sc->sched_base +  in iwn4965_post_alive()
6523 	iwn_prph_write(sc, IWN4965_SCHED_INTR_MASK, 0xffff);  in iwn4965_post_alive()
6525 	iwn_prph_write(sc, IWN4965_SCHED_TXFACT, 0xff);  in iwn4965_post_alive()
6530 		iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),  in iwn4965_post_alive()
6533 	iwn_nic_unlock(sc);  in iwn4965_post_alive()
6542 iwn5000_post_alive(struct iwn_softc *sc)  in iwn5000_post_alive()  argument
6547 	iwn5000_ict_reset(sc);  in iwn5000_post_alive()
6549 	if ((error = iwn_nic_lock(sc)) != 0)  in iwn5000_post_alive()
6553 	sc->sched_base = iwn_prph_read(sc, IWN_SCHED_SRAM_ADDR);  in iwn5000_post_alive()
6554 	iwn_mem_set_region_4(sc, sc->sched_base + IWN5000_SCHED_CTX_OFF, 0,  in iwn5000_post_alive()
6558 	iwn_prph_write(sc, IWN5000_SCHED_DRAM_ADDR, sc->sched_dma.paddr >> 10);  in iwn5000_post_alive()
6560 	IWN_SETBITS(sc, IWN_FH_TX_CHICKEN, IWN_FH_TX_CHICKEN_SCHED_RETRY);  in iwn5000_post_alive()
6563 	iwn_prph_write(sc, IWN5000_SCHED_QCHAIN_SEL, 0xfffef);  in iwn5000_post_alive()
6564 	iwn_prph_write(sc, IWN5000_SCHED_AGGR_SEL, 0);  in iwn5000_post_alive()
6567 		iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), 0);  in iwn5000_post_alive()
6568 		IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | 0);  in iwn5000_post_alive()
6570 		iwn_mem_write(sc, sc->sched_base +  in iwn5000_post_alive()
6573 		iwn_mem_write(sc, sc->sched_base +  in iwn5000_post_alive()
6579 	iwn_prph_write(sc, IWN5000_SCHED_INTR_MASK, 0xfffff);  in iwn5000_post_alive()
6581 	iwn_prph_write(sc, IWN5000_SCHED_TXFACT, 0xff);  in iwn5000_post_alive()
6586 		iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),  in iwn5000_post_alive()
6589 	iwn_nic_unlock(sc);  in iwn5000_post_alive()
6592 	error = iwn5000_send_wimax_coex(sc);  in iwn5000_post_alive()
6594 		dev_err(sc->sc_dip, CE_WARN,  in iwn5000_post_alive()
6598 	if (sc->hw_type != IWN_HW_REV_TYPE_5150) {  in iwn5000_post_alive()
6606 		cmd.cap_pin[0] = le32toh(sc->eeprom_crystal) & 0xff;  in iwn5000_post_alive()
6607 		cmd.cap_pin[1] = (le32toh(sc->eeprom_crystal) >> 16) & 0xff;  in iwn5000_post_alive()
6608 		error = iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0);  in iwn5000_post_alive()
6610 			dev_err(sc->sc_dip, CE_WARN,  in iwn5000_post_alive()
6615 	if (!(sc->sc_flags & IWN_FLAG_CALIB_DONE)) {  in iwn5000_post_alive()
6617 		if ((error = iwn5000_query_calibration(sc)) != 0) {  in iwn5000_post_alive()
6618 			dev_err(sc->sc_dip, CE_WARN,  in iwn5000_post_alive()
6626 		iwn_hw_stop(sc, B_FALSE);  in iwn5000_post_alive()
6627 		error = iwn_hw_init(sc);  in iwn5000_post_alive()
6630 		error = iwn5000_send_calibration(sc);  in iwn5000_post_alive()
6640 iwn4965_load_bootcode(struct iwn_softc *sc, const uint8_t *ucode, int size)  in iwn4965_load_bootcode()  argument
6646 	if ((error = iwn_nic_lock(sc)) != 0)  in iwn4965_load_bootcode()
6650 	iwn_prph_write_region_4(sc, IWN_BSM_SRAM_BASE,  in iwn4965_load_bootcode()
6654 	iwn_prph_write(sc, IWN_BSM_WR_MEM_SRC, 0);  in iwn4965_load_bootcode()
6655 	iwn_prph_write(sc, IWN_BSM_WR_MEM_DST, IWN_FW_TEXT_BASE);  in iwn4965_load_bootcode()
6656 	iwn_prph_write(sc, IWN_BSM_WR_DWCOUNT, size);  in iwn4965_load_bootcode()
6659 	iwn_prph_write(sc, IWN_BSM_WR_CTRL, IWN_BSM_WR_CTRL_START);  in iwn4965_load_bootcode()
6663 		if (!(iwn_prph_read(sc, IWN_BSM_WR_CTRL) &  in iwn4965_load_bootcode()
6669 		dev_err(sc->sc_dip, CE_WARN,  in iwn4965_load_bootcode()
6671 		iwn_nic_unlock(sc);  in iwn4965_load_bootcode()
6676 	iwn_prph_write(sc, IWN_BSM_WR_CTRL, IWN_BSM_WR_CTRL_START_EN);  in iwn4965_load_bootcode()
6678 	iwn_nic_unlock(sc);  in iwn4965_load_bootcode()
6683 iwn4965_load_firmware(struct iwn_softc *sc)  in iwn4965_load_firmware()  argument
6685 	struct iwn_fw_info *fw = &sc->fw;  in iwn4965_load_firmware()
6686 	struct iwn_dma_info *dma = &sc->fw_dma;  in iwn4965_load_firmware()
6690 	ASSERT(mutex_owned(&sc->sc_mtx));  in iwn4965_load_firmware()
6699 	if ((error = iwn_nic_lock(sc)) != 0)  in iwn4965_load_firmware()
6701 	iwn_prph_write(sc, IWN_BSM_DRAM_DATA_ADDR, dma->paddr >> 4);  in iwn4965_load_firmware()
6702 	iwn_prph_write(sc, IWN_BSM_DRAM_DATA_SIZE, fw->init.datasz);  in iwn4965_load_firmware()
6703 	iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_ADDR,  in iwn4965_load_firmware()
6705 	iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_SIZE, fw->init.textsz);  in iwn4965_load_firmware()
6706 	iwn_nic_unlock(sc);  in iwn4965_load_firmware()
6709 	error = iwn4965_load_bootcode(sc, fw->boot.text, fw->boot.textsz);  in iwn4965_load_firmware()
6711 		dev_err(sc->sc_dip, CE_WARN,  in iwn4965_load_firmware()
6716 	IWN_WRITE(sc, IWN_RESET, 0);  in iwn4965_load_firmware()
6720 	while ((sc->sc_flags & IWN_FLAG_FW_ALIVE) == 0) {  in iwn4965_load_firmware()
6721 		if (cv_timedwait(&sc->sc_alive_cv, &sc->sc_mtx, clk) < 0) {  in iwn4965_load_firmware()
6722 			dev_err(sc->sc_dip, CE_WARN,  in iwn4965_load_firmware()
6729 	sc->rawtemp = sc->ucode_info.temp[3].chan20MHz;  in iwn4965_load_firmware()
6730 	sc->temp = iwn4965_get_temperature(sc);  in iwn4965_load_firmware()
6731 	sc->sc_misc->temp.value.ul = sc->temp;  in iwn4965_load_firmware()
6740 	if ((error = iwn_nic_lock(sc)) != 0)  in iwn4965_load_firmware()
6742 	iwn_prph_write(sc, IWN_BSM_DRAM_DATA_ADDR, dma->paddr >> 4);  in iwn4965_load_firmware()
6743 	iwn_prph_write(sc, IWN_BSM_DRAM_DATA_SIZE, fw->main.datasz);  in iwn4965_load_firmware()
6744 	iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_ADDR,  in iwn4965_load_firmware()
6746 	iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_SIZE,  in iwn4965_load_firmware()
6748 	iwn_nic_unlock(sc);  in iwn4965_load_firmware()
6754 iwn5000_load_firmware_section(struct iwn_softc *sc, uint32_t dst,  in iwn5000_load_firmware_section()  argument
6757 	struct iwn_dma_info *dma = &sc->fw_dma;  in iwn5000_load_firmware_section()
6761 	ASSERT(mutex_owned(&sc->sc_mtx));  in iwn5000_load_firmware_section()
6767 	if ((error = iwn_nic_lock(sc)) != 0)  in iwn5000_load_firmware_section()
6770 	IWN_WRITE(sc, IWN_FH_TX_CONFIG(IWN_SRVC_DMACHNL),  in iwn5000_load_firmware_section()
6773 	IWN_WRITE(sc, IWN_FH_SRAM_ADDR(IWN_SRVC_DMACHNL), dst);  in iwn5000_load_firmware_section()
6774 	IWN_WRITE(sc, IWN_FH_TFBD_CTRL0(IWN_SRVC_DMACHNL),  in iwn5000_load_firmware_section()
6776 	IWN_WRITE(sc, IWN_FH_TFBD_CTRL1(IWN_SRVC_DMACHNL),  in iwn5000_load_firmware_section()
6778 	IWN_WRITE(sc, IWN_FH_TXBUF_STATUS(IWN_SRVC_DMACHNL),  in iwn5000_load_firmware_section()
6784 	IWN_WRITE(sc, IWN_FH_TX_CONFIG(IWN_SRVC_DMACHNL),  in iwn5000_load_firmware_section()
6787 	iwn_nic_unlock(sc);  in iwn5000_load_firmware_section()
6791 	while ((sc->sc_flags & IWN_FLAG_FW_DMA) == 0) {  in iwn5000_load_firmware_section()
6792 		if (cv_timedwait(&sc->sc_fhdma_cv, &sc->sc_mtx, clk) < 0)  in iwn5000_load_firmware_section()
6795 	sc->sc_flags &= ~IWN_FLAG_FW_DMA;  in iwn5000_load_firmware_section()
6801 iwn5000_load_firmware(struct iwn_softc *sc)  in iwn5000_load_firmware()  argument
6807 	fw = (sc->sc_flags & IWN_FLAG_CALIB_DONE) ?  in iwn5000_load_firmware()
6808 	    &sc->fw.main : &sc->fw.init;  in iwn5000_load_firmware()
6810 	error = iwn5000_load_firmware_section(sc, IWN_FW_TEXT_BASE,  in iwn5000_load_firmware()
6813 		dev_err(sc->sc_dip, CE_WARN,  in iwn5000_load_firmware()
6817 	error = iwn5000_load_firmware_section(sc, IWN_FW_DATA_BASE,  in iwn5000_load_firmware()
6820 		dev_err(sc->sc_dip, CE_WARN,  in iwn5000_load_firmware()
6826 	IWN_WRITE(sc, IWN_RESET, 0);  in iwn5000_load_firmware()
6834 iwn_read_firmware_leg(struct iwn_softc *sc, struct iwn_fw_info *fw)  in iwn_read_firmware_leg()  argument
6836 	_NOTE(ARGUNUSED(sc));  in iwn_read_firmware_leg()
6847 		dev_err(sc->sc_dip, CE_WARN,  in iwn_read_firmware_leg()
6857 		dev_err(sc->sc_dip, CE_WARN,  in iwn_read_firmware_leg()
6870 		dev_err(sc->sc_dip, CE_WARN,  in iwn_read_firmware_leg()
6888 iwn_read_firmware_tlv(struct iwn_softc *sc, struct iwn_fw_info *fw,  in iwn_read_firmware_tlv()  argument
6891 	_NOTE(ARGUNUSED(sc));  in iwn_read_firmware_tlv()
6899 		dev_err(sc->sc_dip, CE_WARN,  in iwn_read_firmware_tlv()
6905 		dev_err(sc->sc_dip, CE_WARN,  in iwn_read_firmware_tlv()
6929 			dev_err(sc->sc_dip, CE_WARN,  in iwn_read_firmware_tlv()
6963 				dev_err(sc->sc_dip, CE_WARN,  in iwn_read_firmware_tlv()
6968 			sc->sc_flags |= IWN_FLAG_ENH_SENS;  in iwn_read_firmware_tlv()
6972 				dev_err(sc->sc_dip, CE_WARN,  in iwn_read_firmware_tlv()
6978 				sc->reset_noise_gain = le32toh(*ptr);  in iwn_read_firmware_tlv()
6979 				sc->noise_gain = le32toh(*ptr) + 1;  in iwn_read_firmware_tlv()
6987 			sc->tlv_feature_flags = le32toh(*ptr);  in iwn_read_firmware_tlv()
6988 			IWN_DBG("feature: 0x%08x", sc->tlv_feature_flags);  in iwn_read_firmware_tlv()
7001 iwn_read_firmware(struct iwn_softc *sc)  in iwn_read_firmware()  argument
7003 	struct iwn_fw_info *fw = &sc->fw;  in iwn_read_firmware()
7012 	sc->reset_noise_gain = IWN5000_PHY_CALIB_RESET_NOISE_GAIN;  in iwn_read_firmware()
7013 	sc->noise_gain = IWN5000_PHY_CALIB_NOISE_GAIN;  in iwn_read_firmware()
7020 	if ((error = firmware_open("iwn", sc->fwname, &fwh)) != 0) {  in iwn_read_firmware()
7021 		dev_err(sc->sc_dip, CE_WARN,  in iwn_read_firmware()
7022 		    "!could not get firmware handle %s", sc->fwname);  in iwn_read_firmware()
7027 		dev_err(sc->sc_dip, CE_WARN,  in iwn_read_firmware()
7038 		dev_err(sc->sc_dip, CE_WARN,  in iwn_read_firmware()
7039 		    "!could not read firmware %s", sc->fwname);  in iwn_read_firmware()
7046 		error = iwn_read_firmware_leg(sc, fw);  in iwn_read_firmware()
7048 		error = iwn_read_firmware_tlv(sc, fw, 1);  in iwn_read_firmware()
7050 		dev_err(sc->sc_dip, CE_WARN,  in iwn_read_firmware()
7056 	if (fw->main.textsz > sc->fw_text_maxsz ||  in iwn_read_firmware()
7057 	    fw->main.datasz > sc->fw_data_maxsz ||  in iwn_read_firmware()
7058 	    fw->init.textsz > sc->fw_text_maxsz ||  in iwn_read_firmware()
7059 	    fw->init.datasz > sc->fw_data_maxsz ||  in iwn_read_firmware()
7062 		dev_err(sc->sc_dip, CE_WARN,  in iwn_read_firmware()
7077 iwn_clock_wait(struct iwn_softc *sc)  in iwn_clock_wait()  argument
7082 	IWN_SETBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_INIT_DONE);  in iwn_clock_wait()
7086 		if (IWN_READ(sc, IWN_GP_CNTRL) & IWN_GP_CNTRL_MAC_CLOCK_READY)  in iwn_clock_wait()
7090 	dev_err(sc->sc_dip, CE_WARN,  in iwn_clock_wait()
7096 iwn_apm_init(struct iwn_softc *sc)  in iwn_apm_init()  argument
7102 	IWN_SETBITS(sc, IWN_GIO_CHICKEN, IWN_GIO_CHICKEN_DIS_L0S_TIMER);  in iwn_apm_init()
7104 	IWN_SETBITS(sc, IWN_GIO_CHICKEN, IWN_GIO_CHICKEN_L1A_NO_L0S_RX);  in iwn_apm_init()
7107 	IWN_SETBITS(sc, IWN_DBG_HPET_MEM, 0xffff0000);  in iwn_apm_init()
7110 	IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_HAP_WAKE_L1A);  in iwn_apm_init()
7113 	reg = pci_config_get32(sc->sc_pcih,  in iwn_apm_init()
7114 	    sc->sc_cap_off + PCIE_LINKCTL);  in iwn_apm_init()
7117 		IWN_SETBITS(sc, IWN_GIO, IWN_GIO_L0S_ENA);  in iwn_apm_init()
7119 		IWN_CLRBITS(sc, IWN_GIO, IWN_GIO_L0S_ENA);  in iwn_apm_init()
7121 	if (sc->hw_type != IWN_HW_REV_TYPE_4965 &&  in iwn_apm_init()
7122 	    sc->hw_type <= IWN_HW_REV_TYPE_1000)  in iwn_apm_init()
7123 		IWN_SETBITS(sc, IWN_ANA_PLL, IWN_ANA_PLL_INIT);  in iwn_apm_init()
7126 	if ((error = iwn_clock_wait(sc)) != 0)  in iwn_apm_init()
7129 	if ((error = iwn_nic_lock(sc)) != 0)  in iwn_apm_init()
7131 	if (sc->hw_type == IWN_HW_REV_TYPE_4965) {  in iwn_apm_init()
7133 		iwn_prph_write(sc, IWN_APMG_CLK_EN,  in iwn_apm_init()
7138 		iwn_prph_write(sc, IWN_APMG_CLK_EN,  in iwn_apm_init()
7143 	iwn_prph_setbits(sc, IWN_APMG_PCI_STT, IWN_APMG_PCI_STT_L1A_DIS);  in iwn_apm_init()
7144 	iwn_nic_unlock(sc);  in iwn_apm_init()
7150 iwn_apm_stop_master(struct iwn_softc *sc)  in iwn_apm_stop_master()  argument
7155 	IWN_SETBITS(sc, IWN_RESET, IWN_RESET_STOP_MASTER);  in iwn_apm_stop_master()
7157 		if (IWN_READ(sc, IWN_RESET) & IWN_RESET_MASTER_DISABLED)  in iwn_apm_stop_master()
7161 	dev_err(sc->sc_dip, CE_WARN,  in iwn_apm_stop_master()
7166 iwn_apm_stop(struct iwn_softc *sc)  in iwn_apm_stop()  argument
7168 	iwn_apm_stop_master(sc);  in iwn_apm_stop()
7171 	IWN_SETBITS(sc, IWN_RESET, IWN_RESET_SW);  in iwn_apm_stop()
7174 	IWN_CLRBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_INIT_DONE);  in iwn_apm_stop()
7178 iwn4965_nic_config(struct iwn_softc *sc)  in iwn4965_nic_config()  argument
7180 	if (IWN_RFCFG_TYPE(sc->rfcfg) == 1) {  in iwn4965_nic_config()
7186 		IWN_SETBITS(sc, IWN_HW_IF_CONFIG,  in iwn4965_nic_config()
7187 		    IWN_RFCFG_TYPE(sc->rfcfg) |  in iwn4965_nic_config()
7188 		    IWN_RFCFG_STEP(sc->rfcfg) |  in iwn4965_nic_config()
7189 		    IWN_RFCFG_DASH(sc->rfcfg));  in iwn4965_nic_config()
7191 	IWN_SETBITS(sc, IWN_HW_IF_CONFIG,  in iwn4965_nic_config()
7197 iwn5000_nic_config(struct iwn_softc *sc)  in iwn5000_nic_config()  argument
7202 	if (IWN_RFCFG_TYPE(sc->rfcfg) < 3) {  in iwn5000_nic_config()
7203 		IWN_SETBITS(sc, IWN_HW_IF_CONFIG,  in iwn5000_nic_config()
7204 		    IWN_RFCFG_TYPE(sc->rfcfg) |  in iwn5000_nic_config()
7205 		    IWN_RFCFG_STEP(sc->rfcfg) |  in iwn5000_nic_config()
7206 		    IWN_RFCFG_DASH(sc->rfcfg));  in iwn5000_nic_config()
7208 	IWN_SETBITS(sc, IWN_HW_IF_CONFIG,  in iwn5000_nic_config()
7211 	if ((error = iwn_nic_lock(sc)) != 0)  in iwn5000_nic_config()
7213 	iwn_prph_setbits(sc, IWN_APMG_PS, IWN_APMG_PS_EARLY_PWROFF_DIS);  in iwn5000_nic_config()
7215 	if (sc->hw_type == IWN_HW_REV_TYPE_1000) {  in iwn5000_nic_config()
7221 		tmp = iwn_prph_read(sc, IWN_APMG_DIGITAL_SVR);  in iwn5000_nic_config()
7224 		iwn_prph_write(sc, IWN_APMG_DIGITAL_SVR, tmp);  in iwn5000_nic_config()
7226 	iwn_nic_unlock(sc);  in iwn5000_nic_config()
7228 	if (sc->sc_flags & IWN_FLAG_INTERNAL_PA) {  in iwn5000_nic_config()
7230 		IWN_WRITE(sc, IWN_GP_DRIVER, IWN_GP_DRIVER_RADIO_2X2_IPA);  in iwn5000_nic_config()
7232 	if ((sc->hw_type == IWN_HW_REV_TYPE_6050 ||  in iwn5000_nic_config()
7233 		sc->hw_type == IWN_HW_REV_TYPE_6005) && sc->calib_ver >= 6) {  in iwn5000_nic_config()
7235 		IWN_SETBITS(sc, IWN_GP_DRIVER, IWN_GP_DRIVER_CALIB_VER6);  in iwn5000_nic_config()
7237 	if (sc->hw_type == IWN_HW_REV_TYPE_6005)  in iwn5000_nic_config()
7238 		IWN_SETBITS(sc, IWN_GP_DRIVER, IWN_GP_DRIVER_6050_1X2);  in iwn5000_nic_config()
7239 	if (sc->hw_type == IWN_HW_REV_TYPE_2030 ||  in iwn5000_nic_config()
7240 	    sc->hw_type == IWN_HW_REV_TYPE_2000 ||  in iwn5000_nic_config()
7241 	    sc->hw_type == IWN_HW_REV_TYPE_135  ||  in iwn5000_nic_config()
7242 	    sc->hw_type == IWN_HW_REV_TYPE_105)  in iwn5000_nic_config()
7243 		IWN_SETBITS(sc, IWN_GP_DRIVER, IWN_GP_DRIVER_RADIO_IQ_INVERT);  in iwn5000_nic_config()
7251 iwn_hw_prepare(struct iwn_softc *sc)  in iwn_hw_prepare()  argument
7256 	IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_NIC_READY);  in iwn_hw_prepare()
7258 		if (IWN_READ(sc, IWN_HW_IF_CONFIG) &  in iwn_hw_prepare()
7265 	IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_PREPARE);  in iwn_hw_prepare()
7267 		if (!(IWN_READ(sc, IWN_HW_IF_CONFIG) &  in iwn_hw_prepare()
7276 	IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_NIC_READY);  in iwn_hw_prepare()
7278 		if (IWN_READ(sc, IWN_HW_IF_CONFIG) &  in iwn_hw_prepare()
7287 iwn_hw_init(struct iwn_softc *sc)  in iwn_hw_init()  argument
7289 	struct iwn_ops *ops = &sc->ops;  in iwn_hw_init()
7294 	ASSERT(mutex_owned(&sc->sc_mtx));  in iwn_hw_init()
7297 	IWN_WRITE(sc, IWN_INT, 0xffffffff);  in iwn_hw_init()
7299 	if ((error = iwn_apm_init(sc)) != 0) {  in iwn_hw_init()
7300 		dev_err(sc->sc_dip, CE_WARN,  in iwn_hw_init()
7306 	if ((error = iwn_nic_lock(sc)) != 0)  in iwn_hw_init()
7308 	iwn_prph_clrbits(sc, IWN_APMG_PS, IWN_APMG_PS_PWR_SRC_MASK);  in iwn_hw_init()
7309 	iwn_nic_unlock(sc);  in iwn_hw_init()
7312 	if ((error = ops->nic_config(sc)) != 0)  in iwn_hw_init()
7316 	if ((error = iwn_nic_lock(sc)) != 0)  in iwn_hw_init()
7318 	IWN_WRITE(sc, IWN_FH_RX_CONFIG, 0);  in iwn_hw_init()
7319 	IWN_WRITE(sc, IWN_FH_RX_WPTR, 0);  in iwn_hw_init()
7321 	IWN_WRITE(sc, IWN_FH_RX_BASE, sc->rxq.desc_dma.paddr >> 8);  in iwn_hw_init()
7323 	IWN_WRITE(sc, IWN_FH_STATUS_WPTR, sc->rxq.stat_dma.paddr >> 4);  in iwn_hw_init()
7335 	IWN_WRITE(sc, IWN_FH_RX_CONFIG, rx_config);  in iwn_hw_init()
7336 	iwn_nic_unlock(sc);  in iwn_hw_init()
7337 	IWN_WRITE(sc, IWN_FH_RX_WPTR, (IWN_RX_RING_COUNT - 1) & ~7);  in iwn_hw_init()
7339 	if ((error = iwn_nic_lock(sc)) != 0)  in iwn_hw_init()
7343 	iwn_prph_write(sc, sc->sched_txfact_addr, 0);  in iwn_hw_init()
7346 	IWN_WRITE(sc, IWN_FH_KW_ADDR, sc->kw_dma.paddr >> 4);  in iwn_hw_init()
7349 	for (qid = 0; qid < sc->ntxqs; qid++) {  in iwn_hw_init()
7350 		struct iwn_tx_ring *txq = &sc->txq[qid];  in iwn_hw_init()
7353 		IWN_WRITE(sc, IWN_FH_CBBC_QUEUE(qid),  in iwn_hw_init()
7356 	iwn_nic_unlock(sc);  in iwn_hw_init()
7359 	for (chnl = 0; chnl < sc->ndmachnls; chnl++) {  in iwn_hw_init()
7360 		IWN_WRITE(sc, IWN_FH_TX_CONFIG(chnl),  in iwn_hw_init()
7366 	IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL);  in iwn_hw_init()
7367 	IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_CMD_BLOCKED);  in iwn_hw_init()
7370 	IWN_WRITE(sc, IWN_INT, 0xffffffff);  in iwn_hw_init()
7372 	IWN_WRITE(sc, IWN_INT_COALESCING, 512 / 32);  in iwn_hw_init()
7374 	IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);  in iwn_hw_init()
7377 	IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL);  in iwn_hw_init()
7378 	IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL);  in iwn_hw_init()
7381 	if (sc->hw_type >= IWN_HW_REV_TYPE_6000)  in iwn_hw_init()
7382 		IWN_SETBITS(sc, IWN_SHADOW_REG_CTRL, 0x800fffff);  in iwn_hw_init()
7384 	if ((error = ops->load_firmware(sc)) != 0) {  in iwn_hw_init()
7385 		dev_err(sc->sc_dip, CE_WARN,  in iwn_hw_init()
7391 	while ((sc->sc_flags & IWN_FLAG_FW_ALIVE) == 0) {  in iwn_hw_init()
7392 		if (cv_timedwait(&sc->sc_alive_cv, &sc->sc_mtx, clk) < 0) {  in iwn_hw_init()
7393 			dev_err(sc->sc_dip, CE_WARN,  in iwn_hw_init()
7399 	return ops->post_alive(sc);  in iwn_hw_init()
7403 iwn_hw_stop(struct iwn_softc *sc, boolean_t lock)  in iwn_hw_stop()  argument
7408 		mutex_enter(&sc->sc_mtx);  in iwn_hw_stop()
7411 	IWN_WRITE(sc, IWN_RESET, IWN_RESET_NEVO);  in iwn_hw_stop()
7414 	IWN_WRITE(sc, IWN_INT_MASK, 0);  in iwn_hw_stop()
7415 	IWN_WRITE(sc, IWN_INT, 0xffffffff);  in iwn_hw_stop()
7416 	IWN_WRITE(sc, IWN_FH_INT, 0xffffffff);  in iwn_hw_stop()
7417 	sc->sc_flags &= ~IWN_FLAG_USE_ICT;  in iwn_hw_stop()
7420 	iwn_nic_unlock(sc);  in iwn_hw_stop()
7423 	iwn_prph_write(sc, sc->sched_txfact_addr, 0);  in iwn_hw_stop()
7426 	if (iwn_nic_lock(sc) == 0) {  in iwn_hw_stop()
7427 		for (chnl = 0; chnl < sc->ndmachnls; chnl++) {  in iwn_hw_stop()
7428 			IWN_WRITE(sc, IWN_FH_TX_CONFIG(chnl), 0);  in iwn_hw_stop()
7430 				if (IWN_READ(sc, IWN_FH_TX_STATUS) &  in iwn_hw_stop()
7436 		iwn_nic_unlock(sc);  in iwn_hw_stop()
7440 	iwn_reset_rx_ring(sc, &sc->rxq);  in iwn_hw_stop()
7443 	for (qid = 0; qid < sc->ntxqs; qid++)  in iwn_hw_stop()
7444 		iwn_reset_tx_ring(sc, &sc->txq[qid]);  in iwn_hw_stop()
7446 	if (iwn_nic_lock(sc) == 0) {  in iwn_hw_stop()
7447 		iwn_prph_write(sc, IWN_APMG_CLK_DIS,  in iwn_hw_stop()
7449 		iwn_nic_unlock(sc);  in iwn_hw_stop()
7453 	iwn_apm_stop(sc);  in iwn_hw_stop()
7455 	sc->sc_flags &= ~(IWN_FLAG_HW_INITED | IWN_FLAG_FW_ALIVE);  in iwn_hw_stop()
7458 		mutex_exit(&sc->sc_mtx);  in iwn_hw_stop()
7463 iwn_init(struct iwn_softc *sc)  in iwn_init()  argument
7467 	mutex_enter(&sc->sc_mtx);  in iwn_init()
7468 	if (sc->sc_flags & IWN_FLAG_HW_INITED)  in iwn_init()
7470 	if ((error = iwn_hw_prepare(sc)) != 0) {  in iwn_init()
7471 		dev_err(sc->sc_dip, CE_WARN, "!hardware not ready");  in iwn_init()
7476 	if (!(IWN_READ(sc, IWN_GP_CNTRL) & IWN_GP_CNTRL_RFKILL)) {  in iwn_init()
7477 		dev_err(sc->sc_dip, CE_WARN,  in iwn_init()
7484 	if ((error = iwn_read_firmware(sc)) != 0) {  in iwn_init()
7485 		dev_err(sc->sc_dip, CE_WARN, "!could not read firmware");  in iwn_init()
7490 	sc->int_mask = IWN_INT_MASK_DEF;  in iwn_init()
7491 	sc->sc_flags &= ~IWN_FLAG_USE_ICT;  in iwn_init()
7494 	ASSERT(sc->fw.data != NULL && sc->fw.size > 0);  in iwn_init()
7495 	error = iwn_hw_init(sc);  in iwn_init()
7497 		dev_err(sc->sc_dip, CE_WARN, "!could not initialize hardware");  in iwn_init()
7502 	if ((error = iwn_config(sc)) != 0) {  in iwn_init()
7503 		dev_err(sc->sc_dip, CE_WARN, "!could not configure device");  in iwn_init()
7507 	sc->sc_flags |= IWN_FLAG_HW_INITED;  in iwn_init()
7509 	mutex_exit(&sc->sc_mtx);  in iwn_init()
7513 	iwn_hw_stop(sc, B_FALSE);  in iwn_init()
7514 	mutex_exit(&sc->sc_mtx);  in iwn_init()
7578 iwn_fix_channel(struct iwn_softc *sc, mblk_t *m,  in iwn_fix_channel()  argument
7581 	struct ieee80211com *ic = &sc->sc_ic;  in iwn_fix_channel()
7597 	if (sc->sc_flags & IWN_FLAG_SCANNING_5GHZ) {  in iwn_fix_channel()
7625 	struct iwn_softc *sc;  in iwn_m_start()  local
7629 	sc = (struct iwn_softc *)arg;  in iwn_m_start()
7630 	ASSERT(sc != NULL);  in iwn_m_start()
7631 	ic = &sc->sc_ic;  in iwn_m_start()
7633 	err = iwn_init(sc);  in iwn_m_start()
7641 		    !(IWN_READ(sc, IWN_GP_CNTRL) & IWN_GP_CNTRL_RFKILL)) {  in iwn_m_start()
7642 			mutex_enter(&sc->sc_mtx);  in iwn_m_start()
7643 			sc->sc_flags |= IWN_FLAG_HW_ERR_RECOVER;  in iwn_m_start()
7644 			sc->sc_flags |= IWN_FLAG_RADIO_OFF;  in iwn_m_start()
7645 			mutex_exit(&sc->sc_mtx);  in iwn_m_start()
7654 	mutex_enter(&sc->sc_mtx);  in iwn_m_start()
7655 	sc->sc_flags |= IWN_FLAG_RUNNING;  in iwn_m_start()
7656 	mutex_exit(&sc->sc_mtx);  in iwn_m_start()
7667 	struct iwn_softc *sc;  in iwn_m_stop()  local
7670 	sc = (struct iwn_softc *)arg;  in iwn_m_stop()
7671 	ASSERT(sc != NULL);  in iwn_m_stop()
7672 	ic = &sc->sc_ic;  in iwn_m_stop()
7674 	iwn_hw_stop(sc, B_TRUE);  in iwn_m_stop()
7683 	mutex_enter(&sc->sc_mtx);  in iwn_m_stop()
7684 	sc->sc_flags &= ~IWN_FLAG_HW_ERR_RECOVER;  in iwn_m_stop()
7685 	sc->sc_flags &= ~IWN_FLAG_RATE_AUTO_CTL;  in iwn_m_stop()
7687 	sc->sc_flags &= ~IWN_FLAG_RUNNING;  in iwn_m_stop()
7688 	sc->sc_flags &= ~IWN_FLAG_SCANNING;  in iwn_m_stop()
7689 	mutex_exit(&sc->sc_mtx);  in iwn_m_stop()