1554     int slots, int qid)  in iwh_alloc_tx_ring()  argument
1566 	ring->qid = qid;  in iwh_alloc_tx_ring()
1584 		    "failed\n", qid));  in iwh_alloc_tx_ring()
1610 		    " failed\n", qid));  in iwh_alloc_tx_ring()
1685 	IWH_WRITE(sc, IWH_FH_TCSR_CHNL_TX_CONFIG_REG(ring->qid), 0);  in iwh_reset_tx_ring()
1688 		    IWH_FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(ring->qid)) {  in iwh_reset_tx_ring()
1698 		    ring->qid));  in iwh_reset_tx_ring()
2441 	iwh_tx_ring_t *ring = &sc->sc_txq[desc->hdr.qid & 0x3];  in iwh_tx_intr()
2490 	if ((desc->hdr.qid & 7) != 4) {  in iwh_cmd_intr()
2509 	    desc->hdr.qid, desc->hdr.idx, desc->hdr.flags,  in iwh_cmd_intr()
2733 		    index, sc->sc_rxq.cur, desc->hdr.qid, desc->hdr.idx,  in iwh_rx_softintr()
2739 		if (!(desc->hdr.qid & 0x80) &&  in iwh_rx_softintr()
3236 	cmd->hdr.qid = ring->qid;  in iwh_send()
3420 	    ring->qid, ring->cur, len));  in iwh_send()
3450 	sc->sc_shared->queues_byte_cnt_tbls[ring->qid].  in iwh_send()
3454 		sc->sc_shared->queues_byte_cnt_tbls[ring->qid].  in iwh_send()
3463 	IWH_WRITE(sc, HBUS_TARG_WRPTR, ring->qid << 8 | ring->desc_cur);  in iwh_send()
3935 	cmd->hdr.qid = ring->qid;  in iwh_cmd()
3952 	sc->sc_shared->queues_byte_cnt_tbls[ring->qid].  in iwh_cmd()
3955 		sc->sc_shared->queues_byte_cnt_tbls[ring->qid].  in iwh_cmd()
3959 	IWH_WRITE(sc, HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);  in iwh_cmd()
4127 	cmd->hdr.qid = ring->qid;  in iwh_scan()
4270 	sc->sc_shared->queues_byte_cnt_tbls[ring->qid]  in iwh_scan()
4273 		sc->sc_shared->queues_byte_cnt_tbls[ring->qid].  in iwh_scan()
4281 	IWH_WRITE(sc, HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);  in iwh_scan()
5604 	int32_t	qid;  in iwh_init_common()  local
5658 	for (qid = 0; qid < IWH_NUM_QUEUES; qid++) {  in iwh_init_common()
5659 		IWH_WRITE(sc, FH_MEM_CBBC_QUEUE(qid),  in iwh_init_common()
5660 		    sc->sc_txq[qid].dma_desc.cookie.dmac_address >> 8);  in iwh_init_common()
5661 		IWH_WRITE(sc, IWH_FH_TCSR_CHNL_TX_CONFIG_REG(qid),  in iwh_init_common()