Lines Matching refs:igb
40 igb_t *igb = (igb_t *)arg; in igb_m_stat() local
41 struct e1000_hw *hw = &igb->hw; in igb_m_stat()
45 igb_ks = (igb_stat_t *)igb->igb_ks->ks_data; in igb_m_stat()
47 mutex_enter(&igb->gen_lock); in igb_m_stat()
49 if (igb->igb_state & IGB_SUSPENDED) { in igb_m_stat()
50 mutex_exit(&igb->gen_lock); in igb_m_stat()
56 *val = igb->link_speed * 1000000ull; in igb_m_stat()
60 igb->stat_mprc += E1000_READ_REG(hw, E1000_MPRC); in igb_m_stat()
61 *val = igb->stat_mprc; in igb_m_stat()
65 igb->stat_bprc += E1000_READ_REG(hw, E1000_BPRC); in igb_m_stat()
66 *val = igb->stat_bprc; in igb_m_stat()
70 igb->stat_mptc += E1000_READ_REG(hw, E1000_MPTC); in igb_m_stat()
71 *val = igb->stat_mptc; in igb_m_stat()
75 igb->stat_bptc += E1000_READ_REG(hw, E1000_BPTC); in igb_m_stat()
76 *val = igb->stat_bptc; in igb_m_stat()
80 igb->stat_rnbc += E1000_READ_REG(hw, E1000_RNBC); in igb_m_stat()
81 *val = igb->stat_rnbc; in igb_m_stat()
85 igb->stat_rxerrc += E1000_READ_REG(hw, E1000_RXERRC); in igb_m_stat()
86 igb->stat_algnerrc += E1000_READ_REG(hw, E1000_ALGNERRC); in igb_m_stat()
89 igb->stat_crcerrs += E1000_READ_REG(hw, E1000_CRCERRS); in igb_m_stat()
90 igb->stat_cexterr += E1000_READ_REG(hw, E1000_CEXTERR); in igb_m_stat()
91 *val = igb->stat_rxerrc + in igb_m_stat()
92 igb->stat_algnerrc + in igb_m_stat()
94 igb->stat_crcerrs + in igb_m_stat()
95 igb->stat_cexterr; in igb_m_stat()
103 igb->stat_ecol += E1000_READ_REG(hw, E1000_ECOL); in igb_m_stat()
104 *val = igb->stat_ecol; in igb_m_stat()
108 igb->stat_colc += E1000_READ_REG(hw, E1000_COLC); in igb_m_stat()
109 *val = igb->stat_colc; in igb_m_stat()
120 igb->stat_tor += (uint64_t)high_val << 32 | (uint64_t)low_val; in igb_m_stat()
121 *val = igb->stat_tor; in igb_m_stat()
125 igb->stat_tpr += E1000_READ_REG(hw, E1000_TPR); in igb_m_stat()
126 *val = igb->stat_tpr; in igb_m_stat()
137 igb->stat_tot += (uint64_t)high_val << 32 | (uint64_t)low_val; in igb_m_stat()
138 *val = igb->stat_tot; in igb_m_stat()
142 igb->stat_tpt += E1000_READ_REG(hw, E1000_TPT); in igb_m_stat()
143 *val = igb->stat_tpt; in igb_m_stat()
148 igb->stat_algnerrc += E1000_READ_REG(hw, E1000_ALGNERRC); in igb_m_stat()
149 *val = igb->stat_algnerrc; in igb_m_stat()
153 igb->stat_crcerrs += E1000_READ_REG(hw, E1000_CRCERRS); in igb_m_stat()
154 *val = igb->stat_crcerrs; in igb_m_stat()
158 igb->stat_scc += E1000_READ_REG(hw, E1000_SCC); in igb_m_stat()
159 *val = igb->stat_scc; in igb_m_stat()
163 igb->stat_mcc += E1000_READ_REG(hw, E1000_MCC); in igb_m_stat()
164 *val = igb->stat_mcc; in igb_m_stat()
168 igb->stat_sec += E1000_READ_REG(hw, E1000_SEC); in igb_m_stat()
169 *val = igb->stat_sec; in igb_m_stat()
173 igb->stat_dc += E1000_READ_REG(hw, E1000_DC); in igb_m_stat()
174 *val = igb->stat_dc; in igb_m_stat()
178 igb->stat_latecol += E1000_READ_REG(hw, E1000_LATECOL); in igb_m_stat()
179 *val = igb->stat_latecol; in igb_m_stat()
183 igb->stat_ecol += E1000_READ_REG(hw, E1000_ECOL); in igb_m_stat()
184 *val = igb->stat_ecol; in igb_m_stat()
188 igb->stat_ecol += E1000_READ_REG(hw, E1000_ECOL); in igb_m_stat()
189 *val = igb->stat_ecol; in igb_m_stat()
193 igb->stat_cexterr += E1000_READ_REG(hw, E1000_CEXTERR); in igb_m_stat()
194 *val = igb->stat_cexterr; in igb_m_stat()
198 igb->stat_roc += E1000_READ_REG(hw, E1000_ROC); in igb_m_stat()
199 *val = igb->stat_roc; in igb_m_stat()
203 igb->stat_rxerrc += E1000_READ_REG(hw, E1000_RXERRC); in igb_m_stat()
204 *val = igb->stat_rxerrc; in igb_m_stat()
217 *val = (uint64_t)e1000_link_to_media(hw, igb->link_speed); in igb_m_stat()
221 *val = igb->param_1000fdx_cap; in igb_m_stat()
225 *val = igb->param_1000hdx_cap; in igb_m_stat()
229 *val = igb->param_100fdx_cap; in igb_m_stat()
233 *val = igb->param_100hdx_cap; in igb_m_stat()
237 *val = igb->param_10fdx_cap; in igb_m_stat()
241 *val = igb->param_10hdx_cap; in igb_m_stat()
245 *val = igb->param_asym_pause_cap; in igb_m_stat()
249 *val = igb->param_pause_cap; in igb_m_stat()
253 *val = igb->param_autoneg_cap; in igb_m_stat()
257 *val = igb->param_adv_1000fdx_cap; in igb_m_stat()
261 *val = igb->param_adv_1000hdx_cap; in igb_m_stat()
265 *val = igb->param_adv_100fdx_cap; in igb_m_stat()
269 *val = igb->param_adv_100hdx_cap; in igb_m_stat()
273 *val = igb->param_adv_10fdx_cap; in igb_m_stat()
277 *val = igb->param_adv_10hdx_cap; in igb_m_stat()
281 *val = igb->param_adv_asym_pause_cap; in igb_m_stat()
285 *val = igb->param_adv_pause_cap; in igb_m_stat()
293 *val = igb->param_lp_1000fdx_cap; in igb_m_stat()
297 *val = igb->param_lp_1000hdx_cap; in igb_m_stat()
301 *val = igb->param_lp_100fdx_cap; in igb_m_stat()
305 *val = igb->param_lp_100hdx_cap; in igb_m_stat()
309 *val = igb->param_lp_10fdx_cap; in igb_m_stat()
313 *val = igb->param_lp_10hdx_cap; in igb_m_stat()
317 *val = igb->param_lp_asym_pause_cap; in igb_m_stat()
321 *val = igb->param_lp_pause_cap; in igb_m_stat()
325 *val = igb->param_lp_autoneg_cap; in igb_m_stat()
329 *val = igb->param_asym_pause_cap; in igb_m_stat()
333 *val = igb->param_pause_cap; in igb_m_stat()
341 *val = (igb->link_duplex == FULL_DUPLEX) ? in igb_m_stat()
346 igb->stat_ruc += E1000_READ_REG(hw, E1000_RUC); in igb_m_stat()
347 *val = igb->stat_ruc; in igb_m_stat()
351 *val = igb->param_rem_fault; in igb_m_stat()
355 *val = igb->param_adv_rem_fault; in igb_m_stat()
359 *val = igb->param_lp_rem_fault; in igb_m_stat()
363 igb->stat_rjc += E1000_READ_REG(hw, E1000_RJC); in igb_m_stat()
364 *val = igb->stat_rjc; in igb_m_stat()
368 *val = igb->param_100t4_cap; in igb_m_stat()
372 *val = igb->param_adv_100t4_cap; in igb_m_stat()
376 *val = igb->param_lp_100t4_cap; in igb_m_stat()
380 mutex_exit(&igb->gen_lock); in igb_m_stat()
384 mutex_exit(&igb->gen_lock); in igb_m_stat()
386 if (igb_check_acc_handle(igb->osdep.reg_handle) != DDI_FM_OK) { in igb_m_stat()
387 ddi_fm_service_impact(igb->dip, DDI_SERVICE_DEGRADED); in igb_m_stat()
401 igb_t *igb = (igb_t *)arg; in igb_m_start() local
403 mutex_enter(&igb->gen_lock); in igb_m_start()
405 if (igb->igb_state & IGB_SUSPENDED) { in igb_m_start()
406 mutex_exit(&igb->gen_lock); in igb_m_start()
410 if (igb_start(igb, B_TRUE) != IGB_SUCCESS) { in igb_m_start()
411 mutex_exit(&igb->gen_lock); in igb_m_start()
415 atomic_or_32(&igb->igb_state, IGB_STARTED); in igb_m_start()
417 mutex_exit(&igb->gen_lock); in igb_m_start()
422 igb_enable_watchdog_timer(igb); in igb_m_start()
434 igb_t *igb = (igb_t *)arg; in igb_m_stop() local
436 mutex_enter(&igb->gen_lock); in igb_m_stop()
438 if (igb->igb_state & IGB_SUSPENDED) { in igb_m_stop()
439 mutex_exit(&igb->gen_lock); in igb_m_stop()
443 atomic_and_32(&igb->igb_state, ~IGB_STARTED); in igb_m_stop()
445 igb_stop(igb, B_TRUE); in igb_m_stop()
447 mutex_exit(&igb->gen_lock); in igb_m_stop()
452 igb_disable_watchdog_timer(igb); in igb_m_stop()
461 igb_t *igb = (igb_t *)arg; in igb_m_promisc() local
464 mutex_enter(&igb->gen_lock); in igb_m_promisc()
466 if (igb->igb_state & IGB_SUSPENDED) { in igb_m_promisc()
467 mutex_exit(&igb->gen_lock); in igb_m_promisc()
471 reg_val = E1000_READ_REG(&igb->hw, E1000_RCTL); in igb_m_promisc()
478 E1000_WRITE_REG(&igb->hw, E1000_RCTL, reg_val); in igb_m_promisc()
480 mutex_exit(&igb->gen_lock); in igb_m_promisc()
482 if (igb_check_acc_handle(igb->osdep.reg_handle) != DDI_FM_OK) { in igb_m_promisc()
483 ddi_fm_service_impact(igb->dip, DDI_SERVICE_DEGRADED); in igb_m_promisc()
497 igb_t *igb = (igb_t *)arg; in igb_m_multicst() local
500 mutex_enter(&igb->gen_lock); in igb_m_multicst()
502 if (igb->igb_state & IGB_SUSPENDED) { in igb_m_multicst()
503 mutex_exit(&igb->gen_lock); in igb_m_multicst()
507 result = (add) ? igb_multicst_add(igb, mcst_addr) in igb_m_multicst()
508 : igb_multicst_remove(igb, mcst_addr); in igb_m_multicst()
510 mutex_exit(&igb->gen_lock); in igb_m_multicst()
522 igb_t *igb = (igb_t *)arg; in igb_m_ioctl() local
529 mutex_enter(&igb->gen_lock); in igb_m_ioctl()
530 if (igb->igb_state & IGB_SUSPENDED) { in igb_m_ioctl()
531 mutex_exit(&igb->gen_lock); in igb_m_ioctl()
535 mutex_exit(&igb->gen_lock); in igb_m_ioctl()
542 status = igb_loopback_ioctl(igb, iocp, mp); in igb_m_ioctl()
594 igb_t *igb = rx_group->igb; in igb_addmac() local
595 struct e1000_hw *hw = &igb->hw; in igb_addmac()
598 mutex_enter(&igb->gen_lock); in igb_addmac()
600 if (igb->igb_state & IGB_SUSPENDED) { in igb_addmac()
601 mutex_exit(&igb->gen_lock); in igb_addmac()
605 if (igb->unicst_avail == 0) { in igb_addmac()
607 mutex_exit(&igb->gen_lock); in igb_addmac()
618 if (igb->unicst_addr[rx_group->index].mac.set == 1) { in igb_addmac()
623 for (i = igb->num_rx_groups; i < igb->unicst_total; i++) { in igb_addmac()
624 if (igb->unicst_addr[i].mac.set == 0) { in igb_addmac()
634 mutex_exit(&igb->gen_lock); in igb_addmac()
639 e1000_rar_set_vmdq(hw, mac_addr, slot, igb->vmdq_mode, rx_group->index); in igb_addmac()
641 bcopy(mac_addr, igb->unicst_addr[slot].mac.addr, ETHERADDRL); in igb_addmac()
642 igb->unicst_addr[slot].mac.group_index = rx_group->index; in igb_addmac()
643 igb->unicst_addr[slot].mac.set = 1; in igb_addmac()
644 igb->unicst_avail--; in igb_addmac()
646 mutex_exit(&igb->gen_lock); in igb_addmac()
658 igb_t *igb = rx_group->igb; in igb_remmac() local
659 struct e1000_hw *hw = &igb->hw; in igb_remmac()
662 mutex_enter(&igb->gen_lock); in igb_remmac()
664 if (igb->igb_state & IGB_SUSPENDED) { in igb_remmac()
665 mutex_exit(&igb->gen_lock); in igb_remmac()
669 slot = igb_unicst_find(igb, mac_addr); in igb_remmac()
671 mutex_exit(&igb->gen_lock); in igb_remmac()
675 if (igb->unicst_addr[slot].mac.set == 0) { in igb_remmac()
676 mutex_exit(&igb->gen_lock); in igb_remmac()
682 igb->unicst_addr[slot].mac.set = 0; in igb_remmac()
683 igb->unicst_avail++; in igb_remmac()
685 mutex_exit(&igb->gen_lock); in igb_remmac()
697 igb_t *igb = rx_ring->igb; in igb_rx_ring_intr_enable() local
698 struct e1000_hw *hw = &igb->hw; in igb_rx_ring_intr_enable()
701 if (igb->intr_type == DDI_INTR_TYPE_MSIX) { in igb_rx_ring_intr_enable()
703 igb->eims_mask |= (E1000_EICR_RX_QUEUE0 << index); in igb_rx_ring_intr_enable()
704 E1000_WRITE_REG(hw, E1000_EIMS, igb->eims_mask); in igb_rx_ring_intr_enable()
705 E1000_WRITE_REG(hw, E1000_EIAC, igb->eims_mask); in igb_rx_ring_intr_enable()
709 igb->ims_mask |= E1000_IMS_RXT0; in igb_rx_ring_intr_enable()
710 E1000_WRITE_REG(hw, E1000_IMS, igb->ims_mask); in igb_rx_ring_intr_enable()
725 igb_t *igb = rx_ring->igb; in igb_rx_ring_intr_disable() local
726 struct e1000_hw *hw = &igb->hw; in igb_rx_ring_intr_disable()
729 if (igb->intr_type == DDI_INTR_TYPE_MSIX) { in igb_rx_ring_intr_disable()
731 igb->eims_mask &= ~(E1000_EICR_RX_QUEUE0 << index); in igb_rx_ring_intr_disable()
734 E1000_WRITE_REG(hw, E1000_EIAC, igb->eims_mask); in igb_rx_ring_intr_disable()
738 igb->ims_mask &= ~E1000_IMS_RXT0; in igb_rx_ring_intr_disable()
751 igb_get_rx_ring_index(igb_t *igb, int gindex, int rindex) in igb_get_rx_ring_index() argument
756 for (i = 0; i < igb->num_rx_rings; i++) { in igb_get_rx_ring_index()
757 rx_ring = &igb->rx_rings[i]; in igb_get_rx_ring_index()
786 igb_t *igb = (igb_t *)arg; in igb_fill_ring() local
798 global_index = igb_get_rx_ring_index(igb, rg_index, index); in igb_fill_ring()
802 rx_ring = &igb->rx_rings[global_index]; in igb_fill_ring()
814 if (igb->intr_type & (DDI_INTR_TYPE_MSIX | DDI_INTR_TYPE_MSI)) { in igb_fill_ring()
816 igb->htable[rx_ring->intr_vector]; in igb_fill_ring()
821 ASSERT(index < igb->num_tx_rings); in igb_fill_ring()
823 igb_tx_ring_t *tx_ring = &igb->tx_rings[index]; in igb_fill_ring()
831 if (igb->intr_type & (DDI_INTR_TYPE_MSIX | DDI_INTR_TYPE_MSI)) { in igb_fill_ring()
833 igb->htable[tx_ring->intr_vector]; in igb_fill_ring()
846 igb_t *igb = (igb_t *)arg; in igb_fill_group() local
852 ASSERT((index >= 0) && (index < igb->num_rx_groups)); in igb_fill_group()
854 rx_group = &igb->rx_groups[index]; in igb_fill_group()
862 infop->mgi_count = (igb->num_rx_rings / igb->num_rx_groups); in igb_fill_group()
876 igb_t *igb = arg; in igb_led_set() local
887 if (mode != MAC_LED_DEFAULT && !igb->igb_led_setup) { in igb_led_set()
888 if (e1000_setup_led(&igb->hw) != E1000_SUCCESS) in igb_led_set()
891 igb->igb_led_setup = B_TRUE; in igb_led_set()
896 if (igb->igb_led_setup) { in igb_led_set()
897 if (e1000_cleanup_led(&igb->hw) != E1000_SUCCESS) in igb_led_set()
899 igb->igb_led_setup = B_FALSE; in igb_led_set()
903 if (e1000_blink_led(&igb->hw) != E1000_SUCCESS) in igb_led_set()
907 if (e1000_led_off(&igb->hw) != E1000_SUCCESS) in igb_led_set()
911 if (e1000_led_on(&igb->hw) != E1000_SUCCESS) in igb_led_set()
928 igb_t *igb = (igb_t *)arg; in igb_m_getcapab() local
940 if (!igb->tx_hcksum_enable) in igb_m_getcapab()
949 if (igb->lso_enable) { in igb_m_getcapab()
965 cap_rings->mr_rnum = igb->num_rx_rings; in igb_m_getcapab()
966 cap_rings->mr_gnum = igb->num_rx_groups; in igb_m_getcapab()
975 cap_rings->mr_rnum = igb->num_tx_rings; in igb_m_getcapab()
992 if (igb->hw.mac.ops.blink_led != NULL && in igb_m_getcapab()
993 igb->hw.mac.ops.blink_led != e1000_null_ops_generic) { in igb_m_getcapab()
996 if (igb->hw.mac.ops.led_off != NULL && in igb_m_getcapab()
997 igb->hw.mac.ops.led_off != e1000_null_ops_generic) { in igb_m_getcapab()
1000 if (igb->hw.mac.ops.led_on != NULL && in igb_m_getcapab()
1001 igb->hw.mac.ops.led_on != e1000_null_ops_generic) { in igb_m_getcapab()
1018 igb_t *igb = (igb_t *)arg; in igb_m_setprop() local
1019 struct e1000_hw *hw = &igb->hw; in igb_m_setprop()
1026 mutex_enter(&igb->gen_lock); in igb_m_setprop()
1027 if (igb->igb_state & IGB_SUSPENDED) { in igb_m_setprop()
1028 mutex_exit(&igb->gen_lock); in igb_m_setprop()
1032 if (igb->loopback_mode != IGB_LB_NONE && igb_param_locked(pr_num)) { in igb_m_setprop()
1037 mutex_exit(&igb->gen_lock); in igb_m_setprop()
1048 igb->param_en_1000fdx_cap = *(uint8_t *)pr_val; in igb_m_setprop()
1049 igb->param_adv_1000fdx_cap = *(uint8_t *)pr_val; in igb_m_setprop()
1056 igb->param_en_100fdx_cap = *(uint8_t *)pr_val; in igb_m_setprop()
1057 igb->param_adv_100fdx_cap = *(uint8_t *)pr_val; in igb_m_setprop()
1064 igb->param_en_100hdx_cap = *(uint8_t *)pr_val; in igb_m_setprop()
1065 igb->param_adv_100hdx_cap = *(uint8_t *)pr_val; in igb_m_setprop()
1072 igb->param_en_10fdx_cap = *(uint8_t *)pr_val; in igb_m_setprop()
1073 igb->param_adv_10fdx_cap = *(uint8_t *)pr_val; in igb_m_setprop()
1080 igb->param_en_10hdx_cap = *(uint8_t *)pr_val; in igb_m_setprop()
1081 igb->param_adv_10hdx_cap = *(uint8_t *)pr_val; in igb_m_setprop()
1088 igb->param_adv_autoneg_cap = *(uint8_t *)pr_val; in igb_m_setprop()
1112 if (igb_setup_link(igb, B_TRUE) != IGB_SUCCESS) in igb_m_setprop()
1133 if (igb->igb_state & IGB_STARTED) { in igb_m_setprop()
1138 cur_mtu = igb->default_mtu; in igb_m_setprop()
1150 err = mac_maxsdu_update(igb->mac_hdl, new_mtu); in igb_m_setprop()
1152 igb->default_mtu = new_mtu; in igb_m_setprop()
1153 igb->max_frame_size = igb->default_mtu + in igb_m_setprop()
1159 rx_size = igb->max_frame_size + IPHDR_ALIGN_ROOM; in igb_m_setprop()
1160 igb->rx_buf_size = ((rx_size >> 10) + ((rx_size & in igb_m_setprop()
1166 tx_size = igb->max_frame_size; in igb_m_setprop()
1167 igb->tx_buf_size = ((tx_size >> 10) + ((tx_size & in igb_m_setprop()
1172 err = igb_set_priv_prop(igb, pr_name, pr_valsize, pr_val); in igb_m_setprop()
1179 mutex_exit(&igb->gen_lock); in igb_m_setprop()
1181 if (igb_check_acc_handle(igb->osdep.reg_handle) != DDI_FM_OK) { in igb_m_setprop()
1182 ddi_fm_service_impact(igb->dip, DDI_SERVICE_DEGRADED); in igb_m_setprop()
1193 igb_t *igb = (igb_t *)arg; in igb_m_getprop() local
1194 struct e1000_hw *hw = &igb->hw; in igb_m_getprop()
1202 bcopy(&igb->link_duplex, pr_val, sizeof (link_duplex_t)); in igb_m_getprop()
1206 tmp = igb->link_speed * 1000000ull; in igb_m_getprop()
1211 *(uint8_t *)pr_val = igb->param_adv_autoneg_cap; in igb_m_getprop()
1232 *(uint8_t *)pr_val = igb->param_adv_1000fdx_cap; in igb_m_getprop()
1235 *(uint8_t *)pr_val = igb->param_en_1000fdx_cap; in igb_m_getprop()
1238 *(uint8_t *)pr_val = igb->param_adv_1000hdx_cap; in igb_m_getprop()
1241 *(uint8_t *)pr_val = igb->param_en_1000hdx_cap; in igb_m_getprop()
1244 *(uint8_t *)pr_val = igb->param_adv_100t4_cap; in igb_m_getprop()
1247 *(uint8_t *)pr_val = igb->param_en_100t4_cap; in igb_m_getprop()
1250 *(uint8_t *)pr_val = igb->param_adv_100fdx_cap; in igb_m_getprop()
1253 *(uint8_t *)pr_val = igb->param_en_100fdx_cap; in igb_m_getprop()
1256 *(uint8_t *)pr_val = igb->param_adv_100hdx_cap; in igb_m_getprop()
1259 *(uint8_t *)pr_val = igb->param_en_100hdx_cap; in igb_m_getprop()
1262 *(uint8_t *)pr_val = igb->param_adv_10fdx_cap; in igb_m_getprop()
1265 *(uint8_t *)pr_val = igb->param_en_10fdx_cap; in igb_m_getprop()
1268 *(uint8_t *)pr_val = igb->param_adv_10hdx_cap; in igb_m_getprop()
1271 *(uint8_t *)pr_val = igb->param_en_10hdx_cap; in igb_m_getprop()
1275 igb->link_speed); in igb_m_getprop()
1278 err = igb_get_priv_prop(igb, pr_name, pr_valsize, pr_val); in igb_m_getprop()
1291 igb_t *igb = (igb_t *)arg; in igb_m_propinfo() local
1292 struct e1000_hw *hw = &igb->hw; in igb_m_propinfo()
1383 igb_priv_prop_info(igb, pr_name, prh); in igb_m_propinfo()
1413 igb_set_priv_prop(igb_t *igb, const char *pr_name, in igb_set_priv_prop() argument
1418 struct e1000_hw *hw = &igb->hw; in igb_set_priv_prop()
1468 igb->tx_copy_thresh = (uint32_t)result; in igb_set_priv_prop()
1482 igb->tx_recycle_thresh = (uint32_t)result; in igb_set_priv_prop()
1496 igb->tx_overload_thresh = (uint32_t)result; in igb_set_priv_prop()
1508 result > igb->tx_ring_size) in igb_set_priv_prop()
1511 igb->tx_resched_thresh = (uint32_t)result; in igb_set_priv_prop()
1525 igb->rx_copy_thresh = (uint32_t)result; in igb_set_priv_prop()
1539 igb->rx_limit_per_intr = (uint32_t)result; in igb_set_priv_prop()
1550 if (result < igb->capab->min_intr_throttle || in igb_set_priv_prop()
1551 result > igb->capab->max_intr_throttle) in igb_set_priv_prop()
1554 igb->intr_throttling[0] = (uint32_t)result; in igb_set_priv_prop()
1557 igb->intr_throttling[i] = in igb_set_priv_prop()
1558 igb->intr_throttling[0]; in igb_set_priv_prop()
1561 for (i = 0; i < igb->intr_cnt; i++) in igb_set_priv_prop()
1563 igb->intr_throttling[i]); in igb_set_priv_prop()
1571 igb_get_priv_prop(igb_t *igb, const char *pr_name, uint_t pr_valsize, in igb_get_priv_prop() argument
1577 value = igb->param_adv_pause_cap; in igb_get_priv_prop()
1579 value = igb->param_adv_asym_pause_cap; in igb_get_priv_prop()
1585 switch (igb->hw.mac.type) { in igb_get_priv_prop()
1588 value = !(igb->hw.dev_spec._82575.eee_disable); in igb_get_priv_prop()
1594 value = igb->tx_copy_thresh; in igb_get_priv_prop()
1596 value = igb->tx_recycle_thresh; in igb_get_priv_prop()
1598 value = igb->tx_overload_thresh; in igb_get_priv_prop()
1600 value = igb->tx_resched_thresh; in igb_get_priv_prop()
1602 value = igb->rx_copy_thresh; in igb_get_priv_prop()
1604 value = igb->rx_limit_per_intr; in igb_get_priv_prop()
1606 value = igb->intr_throttling[0]; in igb_get_priv_prop()
1616 igb_priv_prop_info(igb_t *igb, const char *pr_name, mac_prop_info_handle_t prh) in igb_priv_prop_info() argument
1638 value = igb->capab->def_intr_throttle; in igb_priv_prop_info()