Lines Matching refs:reg
214 uint32_t reg; in i40e_intr_adminq_enable() local
216 reg = I40E_PFINT_DYN_CTL0_INTENA_MASK | in i40e_intr_adminq_enable()
219 I40E_WRITE_REG(hw, I40E_PFINT_DYN_CTL0, reg); in i40e_intr_adminq_enable()
227 uint32_t reg; in i40e_intr_adminq_disable() local
229 reg = I40E_ITR_INDEX_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT; in i40e_intr_adminq_disable()
230 I40E_WRITE_REG(hw, I40E_PFINT_DYN_CTL0, reg); in i40e_intr_adminq_disable()
243 uint32_t reg; in i40e_intr_io_enable() local
247 reg = I40E_PFINT_DYN_CTLN_INTENA_MASK | in i40e_intr_io_enable()
250 I40E_WRITE_REG(hw, I40E_PFINT_DYN_CTLN(vector - 1), reg); in i40e_intr_io_enable()
256 uint32_t reg; in i40e_intr_io_disable() local
260 reg = I40E_ITR_INDEX_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT; in i40e_intr_io_disable()
261 I40E_WRITE_REG(hw, I40E_PFINT_DYN_CTLN(vector - 1), reg); in i40e_intr_io_disable()
279 uint32_t reg; in i40e_intr_io_enable_all() local
282 reg = I40E_READ_REG(hw, I40E_QINT_RQCTL(I40E_INTR_NOTX_QUEUE)); in i40e_intr_io_enable_all()
283 reg |= I40E_QINT_RQCTL_CAUSE_ENA_MASK; in i40e_intr_io_enable_all()
284 I40E_WRITE_REG(hw, I40E_QINT_RQCTL(I40E_INTR_NOTX_QUEUE), reg); in i40e_intr_io_enable_all()
286 reg = I40E_READ_REG(hw, I40E_QINT_TQCTL(I40E_INTR_NOTX_QUEUE)); in i40e_intr_io_enable_all()
287 reg |= I40E_QINT_TQCTL_CAUSE_ENA_MASK; in i40e_intr_io_enable_all()
288 I40E_WRITE_REG(hw, I40E_QINT_TQCTL(I40E_INTR_NOTX_QUEUE), reg); in i40e_intr_io_enable_all()
307 uint32_t reg; in i40e_intr_io_disable_all() local
310 reg = I40E_READ_REG(hw, I40E_QINT_RQCTL(I40E_INTR_NOTX_QUEUE)); in i40e_intr_io_disable_all()
311 reg &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK; in i40e_intr_io_disable_all()
312 I40E_WRITE_REG(hw, I40E_QINT_RQCTL(I40E_INTR_NOTX_QUEUE), reg); in i40e_intr_io_disable_all()
314 reg = I40E_READ_REG(hw, I40E_QINT_TQCTL(I40E_INTR_NOTX_QUEUE)); in i40e_intr_io_disable_all()
315 reg &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK; in i40e_intr_io_disable_all()
316 I40E_WRITE_REG(hw, I40E_QINT_TQCTL(I40E_INTR_NOTX_QUEUE), reg); in i40e_intr_io_disable_all()
334 uint32_t reg; in i40e_intr_io_clear_cause() local
335 reg = I40E_QUEUE_TYPE_EOL; in i40e_intr_io_clear_cause()
336 I40E_WRITE_REG(hw, I40E_PFINT_LNKLST0, reg); in i40e_intr_io_clear_cause()
341 uint32_t reg; in i40e_intr_io_clear_cause() local
343 reg = I40E_QUEUE_TYPE_EOL; in i40e_intr_io_clear_cause()
344 I40E_WRITE_REG(hw, I40E_PFINT_LNKLSTN(i), reg); in i40e_intr_io_clear_cause()
358 uint32_t reg; in i40e_intr_chip_fini() local
368 reg = I40E_READ_REG(hw, I40E_PFINT_DYN_CTLN(i)); in i40e_intr_chip_fini()
369 VERIFY0(reg & I40E_PFINT_DYN_CTLN_INTENA_MASK); in i40e_intr_chip_fini()
371 reg = I40E_READ_REG(hw, I40E_PFINT_LNKLSTN(i)); in i40e_intr_chip_fini()
372 VERIFY3U(reg, ==, I40E_QUEUE_TYPE_EOL); in i40e_intr_chip_fini()
388 uint32_t reg; in i40e_set_lnklstn() local
391 reg = (queue << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT) | in i40e_set_lnklstn()
394 I40E_WRITE_REG(hw, I40E_PFINT_LNKLSTN(vector), reg); in i40e_set_lnklstn()
395 DEBUGOUT2("PFINT_LNKLSTN[%u] = 0x%x", vector, reg); in i40e_set_lnklstn()
407 uint32_t reg; in i40e_set_rqctl() local
412 reg = (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) | in i40e_set_rqctl()
418 I40E_WRITE_REG(hw, I40E_QINT_RQCTL(queue), reg); in i40e_set_rqctl()
419 DEBUGOUT2("QINT_RQCTL[%u] = 0x%x", queue, reg); in i40e_set_rqctl()
429 uint32_t reg; in i40e_set_tqctl() local
434 reg = (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) | in i40e_set_tqctl()
440 I40E_WRITE_REG(hw, I40E_QINT_TQCTL(queue), reg); in i40e_set_tqctl()
441 DEBUGOUT2("QINT_TQCTL[%u] = 0x%x", queue, reg); in i40e_set_tqctl()
496 uint32_t reg; in i40e_intr_init_queue_shared() local
501 reg = (I40E_INTR_NOTX_QUEUE << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT) | in i40e_intr_init_queue_shared()
503 I40E_WRITE_REG(hw, I40E_PFINT_LNKLST0, reg); in i40e_intr_init_queue_shared()
505 reg = (I40E_INTR_NOTX_INTR << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) | in i40e_intr_init_queue_shared()
511 I40E_WRITE_REG(hw, I40E_QINT_RQCTL(I40E_INTR_NOTX_QUEUE), reg); in i40e_intr_init_queue_shared()
513 reg = (I40E_INTR_NOTX_INTR << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) | in i40e_intr_init_queue_shared()
519 I40E_WRITE_REG(hw, I40E_QINT_TQCTL(I40E_INTR_NOTX_QUEUE), reg); in i40e_intr_init_queue_shared()
530 uint32_t reg; in i40e_intr_rx_queue_enable() local
537 reg = I40E_READ_REG(hw, I40E_QINT_RQCTL(queue)); in i40e_intr_rx_queue_enable()
538 ASSERT0(reg & I40E_QINT_RQCTL_CAUSE_ENA_MASK); in i40e_intr_rx_queue_enable()
539 reg |= I40E_QINT_RQCTL_CAUSE_ENA_MASK; in i40e_intr_rx_queue_enable()
540 I40E_WRITE_REG(hw, I40E_QINT_RQCTL(queue), reg); in i40e_intr_rx_queue_enable()
551 uint32_t reg; in i40e_intr_rx_queue_disable() local
558 reg = I40E_READ_REG(hw, I40E_QINT_RQCTL(queue)); in i40e_intr_rx_queue_disable()
559 ASSERT3U(reg & I40E_QINT_RQCTL_CAUSE_ENA_MASK, ==, in i40e_intr_rx_queue_disable()
561 reg &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK; in i40e_intr_rx_queue_disable()
562 I40E_WRITE_REG(hw, I40E_QINT_RQCTL(queue), reg); in i40e_intr_rx_queue_disable()
574 uint32_t reg; in i40e_intr_chip_init() local
589 reg = I40E_ITR_INDEX_OTHER << I40E_PFINT_STAT_CTL0_OTHER_ITR_INDX_SHIFT; in i40e_intr_chip_init()
590 I40E_WRITE_REG(hw, I40E_PFINT_STAT_CTL0, reg); in i40e_intr_chip_init()
598 reg = I40E_PFINT_ICR0_ENA_ADMINQ_MASK; in i40e_intr_chip_init()
599 I40E_WRITE_REG(hw, I40E_PFINT_ICR0_ENA, reg); in i40e_intr_chip_init()
702 uint32_t reg; in i40e_intr_other_work() local
704 reg = I40E_READ_REG(hw, I40E_PFINT_ICR0); in i40e_intr_other_work()
712 if (reg & I40E_PFINT_ICR0_ADMINQ_MASK) in i40e_intr_other_work()
719 reg = I40E_READ_REG(hw, I40E_PFINT_ICR0_ENA); in i40e_intr_other_work()
720 reg |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK; in i40e_intr_other_work()
721 I40E_WRITE_REG(hw, I40E_PFINT_ICR0_ENA, reg); in i40e_intr_other_work()
830 uint32_t reg; in i40e_intr_notx() local
843 reg = I40E_READ_REG(hw, I40E_PFINT_ICR0); in i40e_intr_notx()
851 if (reg == 0) { in i40e_intr_notx()
857 if (reg & I40E_PFINT_ICR0_ADMINQ_MASK) in i40e_intr_notx()
861 if (reg & I40E_INTR_NOTX_RX_MASK) in i40e_intr_notx()
864 if (reg & I40E_INTR_NOTX_TX_MASK) in i40e_intr_notx()