Lines Matching full:rx
96 #define HMERMD_OVFLOW (1 << 30) /* 30 : Rx buffer overflow */
170 #define HMEG_STATUS_RX_DROP (1 << 17) /* No free Rx descriptors */
171 #define HMEG_STATUS_RX_ERR_ACK (1 << 18) /* Error Ack in Rx DMA cycle */
172 #define HMEG_STATUS_RX_LATE_ERR (1 << 19) /* Late Error in Rx DMA cycle */
173 #define HMEG_STATUS_RX_PAR_ERR (1 << 20) /* Parity error in Rx DMA */
224 #define HMEG_MASK_RX_DROP (1 << 17) /* No free Rx descriptors */
225 #define HMEG_MASK_RX_ERR_ACK (1 << 18) /* Error Ack in Rx DMA cycle */
226 #define HMEG_MASK_RX_LATE_ERR (1 << 19) /* Late Error in Rx DMA cycle */
227 #define HMEG_MASK_RX_PAR_ERR (1 << 20) /* Parity error in Rx DMA */
341 #define HMER_CONFIG_RXDMA_EN (1 << 0) /* 0 : Enable Rx DMA */
345 #define HMER_CONFIG_RXRINGSZ (0x3 << 9) /* 9,10 : RX desc. ring size */
349 #define HMER_CONFIG_RXRINGSZ32 (0x0 << 9) /* Rx descr. ring size 32 */
350 #define HMER_CONFIG_RXRINGSZ64 (0x1 << 9) /* Rx descr. ring size 64 */
351 #define HMER_CONFIG_RXRINGSZ128 (0x2 << 9) /* Rx descr. ring size 128 */
352 #define HMER_CONFIG_RXRINGSZ256 (0x3 << 9) /* Rx descr. ring size 256 */
413 uint_t rxrst; /* rx software reset register (RW) */
414 uint_t rxcfg; /* rx configuration register [12-0] (RW) */
415 uint_t rxmax; /* rx maximum packet size [12-0] (RW) */
416 uint_t rxmin; /* rx minimum frame size [7-0] (RW) */
421 uint_t lecnt; /* rx giant length error count [7-0] (RW) */
422 uint_t aecnt; /* rx alignment error count [7-0] (RW) */
424 uint_t rxsm; /* rx state machine register (R) */
425 uint_t rxcv; /* rx code voilation register (R) */
496 #define BMAC_RXCFG_ENAB (1 << 0) /* rx enable */
498 #define BMAC_RXCFG_STRIP (1 << 5) /* rx strip pad bytes */
499 #define BMAC_RXCFG_PROMIS (1 << 6) /* rx enable promiscous */
500 #define BMAC_RXCFG_ERR (1 << 7) /* rx disable error checking */
501 #define BMAC_RXCFG_CRC (1 << 8) /* rx disable CRC stripping */
502 #define BMAC_RXCFG_MYOWN (1 << 9) /* rx filter own packets */
503 #define BMAC_RXCFG_GRPROM (1 << 10) /* rx promiscuous group mode */
504 #define BMAC_RXCFG_HASH (1 << 11) /* rx enable hash filter */
505 #define BMAC_RXCFG_ADDR (1 << 12) /* rx enable address filter */