Lines Matching refs:hw
37 static s32 e1000_validate_mdi_setting_generic(struct e1000_hw *hw);
38 static void e1000_set_lan_id_multi_port_pcie(struct e1000_hw *hw);
39 static void e1000_config_collision_dist_generic(struct e1000_hw *hw);
40 static int e1000_rar_set_generic(struct e1000_hw *hw, u8 *addr, u32 index);
48 void e1000_init_mac_ops_generic(struct e1000_hw *hw) in e1000_init_mac_ops_generic() argument
50 struct e1000_mac_info *mac = &hw->mac; in e1000_init_mac_ops_generic()
88 s32 e1000_null_ops_generic(struct e1000_hw E1000_UNUSEDARG *hw) in e1000_null_ops_generic() argument
98 void e1000_null_mac_generic(struct e1000_hw E1000_UNUSEDARG *hw) in e1000_null_mac_generic() argument
108 s32 e1000_null_link_info(struct e1000_hw E1000_UNUSEDARG *hw, in e1000_null_link_info() argument
119 bool e1000_null_mng_mode(struct e1000_hw E1000_UNUSEDARG *hw) in e1000_null_mng_mode() argument
129 void e1000_null_update_mc(struct e1000_hw E1000_UNUSEDARG *hw, in e1000_null_update_mc() argument
140 void e1000_null_write_vfta(struct e1000_hw E1000_UNUSEDARG *hw, in e1000_null_write_vfta() argument
151 int e1000_null_rar_set(struct e1000_hw E1000_UNUSEDARG *hw, in e1000_null_rar_set() argument
162 s32 e1000_null_set_obff_timer(struct e1000_hw E1000_UNUSEDARG *hw, in e1000_null_set_obff_timer() argument
177 s32 e1000_get_bus_info_pci_generic(struct e1000_hw *hw) in e1000_get_bus_info_pci_generic() argument
179 struct e1000_mac_info *mac = &hw->mac; in e1000_get_bus_info_pci_generic()
180 struct e1000_bus_info *bus = &hw->bus; in e1000_get_bus_info_pci_generic()
181 u32 status = E1000_READ_REG(hw, E1000_STATUS); in e1000_get_bus_info_pci_generic()
219 mac->ops.set_lan_id(hw); in e1000_get_bus_info_pci_generic()
232 s32 e1000_get_bus_info_pcie_generic(struct e1000_hw *hw) in e1000_get_bus_info_pcie_generic() argument
234 struct e1000_mac_info *mac = &hw->mac; in e1000_get_bus_info_pcie_generic()
235 struct e1000_bus_info *bus = &hw->bus; in e1000_get_bus_info_pcie_generic()
243 ret_val = e1000_read_pcie_cap_reg(hw, PCIE_LINK_STATUS, in e1000_get_bus_info_pcie_generic()
265 mac->ops.set_lan_id(hw); in e1000_get_bus_info_pcie_generic()
278 static void e1000_set_lan_id_multi_port_pcie(struct e1000_hw *hw) in e1000_set_lan_id_multi_port_pcie() argument
280 struct e1000_bus_info *bus = &hw->bus; in e1000_set_lan_id_multi_port_pcie()
286 reg = E1000_READ_REG(hw, E1000_STATUS); in e1000_set_lan_id_multi_port_pcie()
296 void e1000_set_lan_id_multi_port_pci(struct e1000_hw *hw) in e1000_set_lan_id_multi_port_pci() argument
298 struct e1000_bus_info *bus = &hw->bus; in e1000_set_lan_id_multi_port_pci()
302 e1000_read_pci_cfg(hw, PCI_HEADER_TYPE_REGISTER, &pci_header_type); in e1000_set_lan_id_multi_port_pci()
304 status = E1000_READ_REG(hw, E1000_STATUS); in e1000_set_lan_id_multi_port_pci()
318 void e1000_set_lan_id_single_port(struct e1000_hw *hw) in e1000_set_lan_id_single_port() argument
320 struct e1000_bus_info *bus = &hw->bus; in e1000_set_lan_id_single_port()
332 void e1000_clear_vfta_generic(struct e1000_hw *hw) in e1000_clear_vfta_generic() argument
339 E1000_WRITE_REG_ARRAY(hw, E1000_VFTA, offset, 0); in e1000_clear_vfta_generic()
340 E1000_WRITE_FLUSH(hw); in e1000_clear_vfta_generic()
353 void e1000_write_vfta_generic(struct e1000_hw *hw, u32 offset, u32 value) in e1000_write_vfta_generic() argument
357 E1000_WRITE_REG_ARRAY(hw, E1000_VFTA, offset, value); in e1000_write_vfta_generic()
358 E1000_WRITE_FLUSH(hw); in e1000_write_vfta_generic()
370 void e1000_init_rx_addrs_generic(struct e1000_hw *hw, u16 rar_count) in e1000_init_rx_addrs_generic() argument
380 hw->mac.ops.rar_set(hw, hw->mac.addr, 0); in e1000_init_rx_addrs_generic()
385 hw->mac.ops.rar_set(hw, mac_addr, i); in e1000_init_rx_addrs_generic()
400 s32 e1000_check_alt_mac_addr_generic(struct e1000_hw *hw) in e1000_check_alt_mac_addr_generic() argument
409 ret_val = hw->nvm.ops.read(hw, NVM_COMPAT, 1, &nvm_data); in e1000_check_alt_mac_addr_generic()
414 if ((hw->mac.type < e1000_82571) || (hw->mac.type == e1000_82573)) in e1000_check_alt_mac_addr_generic()
420 if (hw->mac.type >= e1000_82580) in e1000_check_alt_mac_addr_generic()
423 ret_val = hw->nvm.ops.read(hw, NVM_ALT_MAC_ADDR_PTR, 1, in e1000_check_alt_mac_addr_generic()
435 if (hw->bus.func == E1000_FUNC_1) in e1000_check_alt_mac_addr_generic()
437 if (hw->bus.func == E1000_FUNC_2) in e1000_check_alt_mac_addr_generic()
440 if (hw->bus.func == E1000_FUNC_3) in e1000_check_alt_mac_addr_generic()
444 ret_val = hw->nvm.ops.read(hw, offset, 1, &nvm_data); in e1000_check_alt_mac_addr_generic()
464 hw->mac.ops.rar_set(hw, alt_mac_addr, 0); in e1000_check_alt_mac_addr_generic()
478 static int e1000_rar_set_generic(struct e1000_hw *hw, u8 *addr, u32 index) in e1000_rar_set_generic() argument
500 E1000_WRITE_REG(hw, E1000_RAL(index), rar_low); in e1000_rar_set_generic()
501 E1000_WRITE_FLUSH(hw); in e1000_rar_set_generic()
502 E1000_WRITE_REG(hw, E1000_RAH(index), rar_high); in e1000_rar_set_generic()
503 E1000_WRITE_FLUSH(hw); in e1000_rar_set_generic()
516 u32 e1000_hash_mc_addr_generic(struct e1000_hw *hw, u8 *mc_addr) in e1000_hash_mc_addr_generic() argument
524 hash_mask = (hw->mac.mta_reg_count * 32) - 1; in e1000_hash_mc_addr_generic()
557 switch (hw->mac.mc_filter_type) { in e1000_hash_mc_addr_generic()
587 void e1000_update_mc_addr_list_generic(struct e1000_hw *hw, in e1000_update_mc_addr_list_generic() argument
596 memset(&hw->mac.mta_shadow, 0, sizeof(hw->mac.mta_shadow)); in e1000_update_mc_addr_list_generic()
600 hash_value = e1000_hash_mc_addr_generic(hw, mc_addr_list); in e1000_update_mc_addr_list_generic()
602 hash_reg = (hash_value >> 5) & (hw->mac.mta_reg_count - 1); in e1000_update_mc_addr_list_generic()
605 hw->mac.mta_shadow[hash_reg] |= (1 << hash_bit); in e1000_update_mc_addr_list_generic()
610 for (i = hw->mac.mta_reg_count - 1; i >= 0; i--) in e1000_update_mc_addr_list_generic()
611 E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, hw->mac.mta_shadow[i]); in e1000_update_mc_addr_list_generic()
612 E1000_WRITE_FLUSH(hw); in e1000_update_mc_addr_list_generic()
624 void e1000_pcix_mmrbc_workaround_generic(struct e1000_hw *hw) in e1000_pcix_mmrbc_workaround_generic() argument
634 if (hw->bus.type != e1000_bus_type_pcix) in e1000_pcix_mmrbc_workaround_generic()
637 e1000_read_pci_cfg(hw, PCIX_COMMAND_REGISTER, &pcix_cmd); in e1000_pcix_mmrbc_workaround_generic()
638 e1000_read_pci_cfg(hw, PCIX_STATUS_REGISTER_HI, &pcix_stat_hi_word); in e1000_pcix_mmrbc_workaround_generic()
648 e1000_write_pci_cfg(hw, PCIX_COMMAND_REGISTER, &pcix_cmd); in e1000_pcix_mmrbc_workaround_generic()
658 void e1000_clear_hw_cntrs_base_generic(struct e1000_hw *hw) in e1000_clear_hw_cntrs_base_generic() argument
662 E1000_READ_REG(hw, E1000_CRCERRS); in e1000_clear_hw_cntrs_base_generic()
663 E1000_READ_REG(hw, E1000_SYMERRS); in e1000_clear_hw_cntrs_base_generic()
664 E1000_READ_REG(hw, E1000_MPC); in e1000_clear_hw_cntrs_base_generic()
665 E1000_READ_REG(hw, E1000_SCC); in e1000_clear_hw_cntrs_base_generic()
666 E1000_READ_REG(hw, E1000_ECOL); in e1000_clear_hw_cntrs_base_generic()
667 E1000_READ_REG(hw, E1000_MCC); in e1000_clear_hw_cntrs_base_generic()
668 E1000_READ_REG(hw, E1000_LATECOL); in e1000_clear_hw_cntrs_base_generic()
669 E1000_READ_REG(hw, E1000_COLC); in e1000_clear_hw_cntrs_base_generic()
670 E1000_READ_REG(hw, E1000_DC); in e1000_clear_hw_cntrs_base_generic()
671 E1000_READ_REG(hw, E1000_SEC); in e1000_clear_hw_cntrs_base_generic()
672 E1000_READ_REG(hw, E1000_RLEC); in e1000_clear_hw_cntrs_base_generic()
673 E1000_READ_REG(hw, E1000_XONRXC); in e1000_clear_hw_cntrs_base_generic()
674 E1000_READ_REG(hw, E1000_XONTXC); in e1000_clear_hw_cntrs_base_generic()
675 E1000_READ_REG(hw, E1000_XOFFRXC); in e1000_clear_hw_cntrs_base_generic()
676 E1000_READ_REG(hw, E1000_XOFFTXC); in e1000_clear_hw_cntrs_base_generic()
677 E1000_READ_REG(hw, E1000_FCRUC); in e1000_clear_hw_cntrs_base_generic()
678 E1000_READ_REG(hw, E1000_GPRC); in e1000_clear_hw_cntrs_base_generic()
679 E1000_READ_REG(hw, E1000_BPRC); in e1000_clear_hw_cntrs_base_generic()
680 E1000_READ_REG(hw, E1000_MPRC); in e1000_clear_hw_cntrs_base_generic()
681 E1000_READ_REG(hw, E1000_GPTC); in e1000_clear_hw_cntrs_base_generic()
682 E1000_READ_REG(hw, E1000_GORCL); in e1000_clear_hw_cntrs_base_generic()
683 E1000_READ_REG(hw, E1000_GORCH); in e1000_clear_hw_cntrs_base_generic()
684 E1000_READ_REG(hw, E1000_GOTCL); in e1000_clear_hw_cntrs_base_generic()
685 E1000_READ_REG(hw, E1000_GOTCH); in e1000_clear_hw_cntrs_base_generic()
686 E1000_READ_REG(hw, E1000_RNBC); in e1000_clear_hw_cntrs_base_generic()
687 E1000_READ_REG(hw, E1000_RUC); in e1000_clear_hw_cntrs_base_generic()
688 E1000_READ_REG(hw, E1000_RFC); in e1000_clear_hw_cntrs_base_generic()
689 E1000_READ_REG(hw, E1000_ROC); in e1000_clear_hw_cntrs_base_generic()
690 E1000_READ_REG(hw, E1000_RJC); in e1000_clear_hw_cntrs_base_generic()
691 E1000_READ_REG(hw, E1000_TORL); in e1000_clear_hw_cntrs_base_generic()
692 E1000_READ_REG(hw, E1000_TORH); in e1000_clear_hw_cntrs_base_generic()
693 E1000_READ_REG(hw, E1000_TOTL); in e1000_clear_hw_cntrs_base_generic()
694 E1000_READ_REG(hw, E1000_TOTH); in e1000_clear_hw_cntrs_base_generic()
695 E1000_READ_REG(hw, E1000_TPR); in e1000_clear_hw_cntrs_base_generic()
696 E1000_READ_REG(hw, E1000_TPT); in e1000_clear_hw_cntrs_base_generic()
697 E1000_READ_REG(hw, E1000_MPTC); in e1000_clear_hw_cntrs_base_generic()
698 E1000_READ_REG(hw, E1000_BPTC); in e1000_clear_hw_cntrs_base_generic()
709 s32 e1000_check_for_copper_link_generic(struct e1000_hw *hw) in e1000_check_for_copper_link_generic() argument
711 struct e1000_mac_info *mac = &hw->mac; in e1000_check_for_copper_link_generic()
729 ret_val = e1000_phy_has_link_generic(hw, 1, 0, &link); in e1000_check_for_copper_link_generic()
741 e1000_check_downshift_generic(hw); in e1000_check_for_copper_link_generic()
753 mac->ops.config_collision_dist(hw); in e1000_check_for_copper_link_generic()
760 ret_val = e1000_config_fc_after_link_up_generic(hw); in e1000_check_for_copper_link_generic()
774 s32 e1000_check_for_fiber_link_generic(struct e1000_hw *hw) in e1000_check_for_fiber_link_generic() argument
776 struct e1000_mac_info *mac = &hw->mac; in e1000_check_for_fiber_link_generic()
784 ctrl = E1000_READ_REG(hw, E1000_CTRL); in e1000_check_for_fiber_link_generic()
785 status = E1000_READ_REG(hw, E1000_STATUS); in e1000_check_for_fiber_link_generic()
786 rxcw = E1000_READ_REG(hw, E1000_RXCW); in e1000_check_for_fiber_link_generic()
805 E1000_WRITE_REG(hw, E1000_TXCW, (mac->txcw & ~E1000_TXCW_ANE)); in e1000_check_for_fiber_link_generic()
808 ctrl = E1000_READ_REG(hw, E1000_CTRL); in e1000_check_for_fiber_link_generic()
810 E1000_WRITE_REG(hw, E1000_CTRL, ctrl); in e1000_check_for_fiber_link_generic()
813 ret_val = e1000_config_fc_after_link_up_generic(hw); in e1000_check_for_fiber_link_generic()
825 E1000_WRITE_REG(hw, E1000_TXCW, mac->txcw); in e1000_check_for_fiber_link_generic()
826 E1000_WRITE_REG(hw, E1000_CTRL, (ctrl & ~E1000_CTRL_SLU)); in e1000_check_for_fiber_link_generic()
841 s32 e1000_check_for_serdes_link_generic(struct e1000_hw *hw) in e1000_check_for_serdes_link_generic() argument
843 struct e1000_mac_info *mac = &hw->mac; in e1000_check_for_serdes_link_generic()
851 ctrl = E1000_READ_REG(hw, E1000_CTRL); in e1000_check_for_serdes_link_generic()
852 status = E1000_READ_REG(hw, E1000_STATUS); in e1000_check_for_serdes_link_generic()
853 rxcw = E1000_READ_REG(hw, E1000_RXCW); in e1000_check_for_serdes_link_generic()
870 E1000_WRITE_REG(hw, E1000_TXCW, (mac->txcw & ~E1000_TXCW_ANE)); in e1000_check_for_serdes_link_generic()
873 ctrl = E1000_READ_REG(hw, E1000_CTRL); in e1000_check_for_serdes_link_generic()
875 E1000_WRITE_REG(hw, E1000_CTRL, ctrl); in e1000_check_for_serdes_link_generic()
878 ret_val = e1000_config_fc_after_link_up_generic(hw); in e1000_check_for_serdes_link_generic()
890 E1000_WRITE_REG(hw, E1000_TXCW, mac->txcw); in e1000_check_for_serdes_link_generic()
891 E1000_WRITE_REG(hw, E1000_CTRL, (ctrl & ~E1000_CTRL_SLU)); in e1000_check_for_serdes_link_generic()
894 } else if (!(E1000_TXCW_ANE & E1000_READ_REG(hw, E1000_TXCW))) { in e1000_check_for_serdes_link_generic()
901 rxcw = E1000_READ_REG(hw, E1000_RXCW); in e1000_check_for_serdes_link_generic()
913 if (E1000_TXCW_ANE & E1000_READ_REG(hw, E1000_TXCW)) { in e1000_check_for_serdes_link_generic()
914 status = E1000_READ_REG(hw, E1000_STATUS); in e1000_check_for_serdes_link_generic()
918 rxcw = E1000_READ_REG(hw, E1000_RXCW); in e1000_check_for_serdes_link_generic()
947 s32 e1000_set_default_fc_generic(struct e1000_hw *hw) in e1000_set_default_fc_generic() argument
963 if (hw->mac.type == e1000_i350) { in e1000_set_default_fc_generic()
964 nvm_offset = NVM_82580_LAN_FUNC_OFFSET(hw->bus.func); in e1000_set_default_fc_generic()
965 ret_val = hw->nvm.ops.read(hw, in e1000_set_default_fc_generic()
970 ret_val = hw->nvm.ops.read(hw, in e1000_set_default_fc_generic()
982 hw->fc.requested_mode = e1000_fc_none; in e1000_set_default_fc_generic()
985 hw->fc.requested_mode = e1000_fc_tx_pause; in e1000_set_default_fc_generic()
987 hw->fc.requested_mode = e1000_fc_full; in e1000_set_default_fc_generic()
1002 s32 e1000_setup_link_generic(struct e1000_hw *hw) in e1000_setup_link_generic() argument
1011 if (hw->phy.ops.check_reset_block && hw->phy.ops.check_reset_block(hw)) in e1000_setup_link_generic()
1017 if (hw->fc.requested_mode == e1000_fc_default) { in e1000_setup_link_generic()
1018 ret_val = e1000_set_default_fc_generic(hw); in e1000_setup_link_generic()
1026 hw->fc.current_mode = hw->fc.requested_mode; in e1000_setup_link_generic()
1029 hw->fc.current_mode); in e1000_setup_link_generic()
1032 ret_val = hw->mac.ops.setup_physical_interface(hw); in e1000_setup_link_generic()
1042 E1000_WRITE_REG(hw, E1000_FCT, FLOW_CONTROL_TYPE); in e1000_setup_link_generic()
1043 E1000_WRITE_REG(hw, E1000_FCAH, FLOW_CONTROL_ADDRESS_HIGH); in e1000_setup_link_generic()
1044 E1000_WRITE_REG(hw, E1000_FCAL, FLOW_CONTROL_ADDRESS_LOW); in e1000_setup_link_generic()
1046 E1000_WRITE_REG(hw, E1000_FCTTV, hw->fc.pause_time); in e1000_setup_link_generic()
1048 return e1000_set_fc_watermarks_generic(hw); in e1000_setup_link_generic()
1058 s32 e1000_commit_fc_settings_generic(struct e1000_hw *hw) in e1000_commit_fc_settings_generic() argument
1060 struct e1000_mac_info *mac = &hw->mac; in e1000_commit_fc_settings_generic()
1081 switch (hw->fc.current_mode) { in e1000_commit_fc_settings_generic()
1114 E1000_WRITE_REG(hw, E1000_TXCW, txcw); in e1000_commit_fc_settings_generic()
1127 s32 e1000_poll_fiber_serdes_link_generic(struct e1000_hw *hw) in e1000_poll_fiber_serdes_link_generic() argument
1129 struct e1000_mac_info *mac = &hw->mac; in e1000_poll_fiber_serdes_link_generic()
1143 status = E1000_READ_REG(hw, E1000_STATUS); in e1000_poll_fiber_serdes_link_generic()
1155 ret_val = mac->ops.check_for_link(hw); in e1000_poll_fiber_serdes_link_generic()
1176 s32 e1000_setup_fiber_serdes_link_generic(struct e1000_hw *hw) in e1000_setup_fiber_serdes_link_generic() argument
1183 ctrl = E1000_READ_REG(hw, E1000_CTRL); in e1000_setup_fiber_serdes_link_generic()
1188 hw->mac.ops.config_collision_dist(hw); in e1000_setup_fiber_serdes_link_generic()
1190 ret_val = e1000_commit_fc_settings_generic(hw); in e1000_setup_fiber_serdes_link_generic()
1202 E1000_WRITE_REG(hw, E1000_CTRL, ctrl); in e1000_setup_fiber_serdes_link_generic()
1203 E1000_WRITE_FLUSH(hw); in e1000_setup_fiber_serdes_link_generic()
1210 if (hw->phy.media_type == e1000_media_type_internal_serdes || in e1000_setup_fiber_serdes_link_generic()
1211 (E1000_READ_REG(hw, E1000_CTRL) & E1000_CTRL_SWDPIN1)) { in e1000_setup_fiber_serdes_link_generic()
1212 ret_val = e1000_poll_fiber_serdes_link_generic(hw); in e1000_setup_fiber_serdes_link_generic()
1227 static void e1000_config_collision_dist_generic(struct e1000_hw *hw) in e1000_config_collision_dist_generic() argument
1233 tctl = E1000_READ_REG(hw, E1000_TCTL); in e1000_config_collision_dist_generic()
1238 E1000_WRITE_REG(hw, E1000_TCTL, tctl); in e1000_config_collision_dist_generic()
1239 E1000_WRITE_FLUSH(hw); in e1000_config_collision_dist_generic()
1250 s32 e1000_set_fc_watermarks_generic(struct e1000_hw *hw) in e1000_set_fc_watermarks_generic() argument
1262 if (hw->fc.current_mode & e1000_fc_tx_pause) { in e1000_set_fc_watermarks_generic()
1267 fcrtl = hw->fc.low_water; in e1000_set_fc_watermarks_generic()
1268 if (hw->fc.send_xon) in e1000_set_fc_watermarks_generic()
1271 fcrth = hw->fc.high_water; in e1000_set_fc_watermarks_generic()
1273 E1000_WRITE_REG(hw, E1000_FCRTL, fcrtl); in e1000_set_fc_watermarks_generic()
1274 E1000_WRITE_REG(hw, E1000_FCRTH, fcrth); in e1000_set_fc_watermarks_generic()
1289 s32 e1000_force_mac_fc_generic(struct e1000_hw *hw) in e1000_force_mac_fc_generic() argument
1295 ctrl = E1000_READ_REG(hw, E1000_CTRL); in e1000_force_mac_fc_generic()
1314 DEBUGOUT1("hw->fc.current_mode = %u\n", hw->fc.current_mode); in e1000_force_mac_fc_generic()
1316 switch (hw->fc.current_mode) { in e1000_force_mac_fc_generic()
1336 E1000_WRITE_REG(hw, E1000_CTRL, ctrl); in e1000_force_mac_fc_generic()
1351 s32 e1000_config_fc_after_link_up_generic(struct e1000_hw *hw) in e1000_config_fc_after_link_up_generic() argument
1353 struct e1000_mac_info *mac = &hw->mac; in e1000_config_fc_after_link_up_generic()
1366 if (hw->phy.media_type == e1000_media_type_fiber || in e1000_config_fc_after_link_up_generic()
1367 hw->phy.media_type == e1000_media_type_internal_serdes) in e1000_config_fc_after_link_up_generic()
1368 ret_val = e1000_force_mac_fc_generic(hw); in e1000_config_fc_after_link_up_generic()
1370 if (hw->phy.media_type == e1000_media_type_copper) in e1000_config_fc_after_link_up_generic()
1371 ret_val = e1000_force_mac_fc_generic(hw); in e1000_config_fc_after_link_up_generic()
1384 if ((hw->phy.media_type == e1000_media_type_copper) && mac->autoneg) { in e1000_config_fc_after_link_up_generic()
1389 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &mii_status_reg); in e1000_config_fc_after_link_up_generic()
1392 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &mii_status_reg); in e1000_config_fc_after_link_up_generic()
1407 ret_val = hw->phy.ops.read_reg(hw, PHY_AUTONEG_ADV, in e1000_config_fc_after_link_up_generic()
1411 ret_val = hw->phy.ops.read_reg(hw, PHY_LP_ABILITY, in e1000_config_fc_after_link_up_generic()
1457 if (hw->fc.requested_mode == e1000_fc_full) { in e1000_config_fc_after_link_up_generic()
1458 hw->fc.current_mode = e1000_fc_full; in e1000_config_fc_after_link_up_generic()
1461 hw->fc.current_mode = e1000_fc_rx_pause; in e1000_config_fc_after_link_up_generic()
1476 hw->fc.current_mode = e1000_fc_tx_pause; in e1000_config_fc_after_link_up_generic()
1490 hw->fc.current_mode = e1000_fc_rx_pause; in e1000_config_fc_after_link_up_generic()
1496 hw->fc.current_mode = e1000_fc_none; in e1000_config_fc_after_link_up_generic()
1504 ret_val = mac->ops.get_link_up_info(hw, &speed, &duplex); in e1000_config_fc_after_link_up_generic()
1511 hw->fc.current_mode = e1000_fc_none; in e1000_config_fc_after_link_up_generic()
1516 ret_val = e1000_force_mac_fc_generic(hw); in e1000_config_fc_after_link_up_generic()
1528 if ((hw->phy.media_type == e1000_media_type_internal_serdes) && in e1000_config_fc_after_link_up_generic()
1533 pcs_status_reg = E1000_READ_REG(hw, E1000_PCS_LSTAT); in e1000_config_fc_after_link_up_generic()
1546 pcs_adv_reg = E1000_READ_REG(hw, E1000_PCS_ANADV); in e1000_config_fc_after_link_up_generic()
1547 pcs_lp_ability_reg = E1000_READ_REG(hw, E1000_PCS_LPAB); in e1000_config_fc_after_link_up_generic()
1590 if (hw->fc.requested_mode == e1000_fc_full) { in e1000_config_fc_after_link_up_generic()
1591 hw->fc.current_mode = e1000_fc_full; in e1000_config_fc_after_link_up_generic()
1594 hw->fc.current_mode = e1000_fc_rx_pause; in e1000_config_fc_after_link_up_generic()
1609 hw->fc.current_mode = e1000_fc_tx_pause; in e1000_config_fc_after_link_up_generic()
1623 hw->fc.current_mode = e1000_fc_rx_pause; in e1000_config_fc_after_link_up_generic()
1629 hw->fc.current_mode = e1000_fc_none; in e1000_config_fc_after_link_up_generic()
1636 pcs_ctrl_reg = E1000_READ_REG(hw, E1000_PCS_LCTL); in e1000_config_fc_after_link_up_generic()
1638 E1000_WRITE_REG(hw, E1000_PCS_LCTL, pcs_ctrl_reg); in e1000_config_fc_after_link_up_generic()
1640 ret_val = e1000_force_mac_fc_generic(hw); in e1000_config_fc_after_link_up_generic()
1659 s32 e1000_get_speed_and_duplex_copper_generic(struct e1000_hw *hw, u16 *speed, in e1000_get_speed_and_duplex_copper_generic() argument
1666 status = E1000_READ_REG(hw, E1000_STATUS); in e1000_get_speed_and_duplex_copper_generic()
1698 s32 e1000_get_speed_and_duplex_fiber_serdes_generic(struct e1000_hw E1000_UNUSEDARG *hw, in e1000_get_speed_and_duplex_fiber_serdes_generic() argument
1715 s32 e1000_get_hw_semaphore_generic(struct e1000_hw *hw) in e1000_get_hw_semaphore_generic() argument
1718 s32 timeout = hw->nvm.word_size + 1; in e1000_get_hw_semaphore_generic()
1725 swsm = E1000_READ_REG(hw, E1000_SWSM); in e1000_get_hw_semaphore_generic()
1740 swsm = E1000_READ_REG(hw, E1000_SWSM); in e1000_get_hw_semaphore_generic()
1741 E1000_WRITE_REG(hw, E1000_SWSM, swsm | E1000_SWSM_SWESMBI); in e1000_get_hw_semaphore_generic()
1744 if (E1000_READ_REG(hw, E1000_SWSM) & E1000_SWSM_SWESMBI) in e1000_get_hw_semaphore_generic()
1752 e1000_put_hw_semaphore_generic(hw); in e1000_get_hw_semaphore_generic()
1766 void e1000_put_hw_semaphore_generic(struct e1000_hw *hw) in e1000_put_hw_semaphore_generic() argument
1772 swsm = E1000_READ_REG(hw, E1000_SWSM); in e1000_put_hw_semaphore_generic()
1776 E1000_WRITE_REG(hw, E1000_SWSM, swsm); in e1000_put_hw_semaphore_generic()
1785 s32 e1000_get_auto_rd_done_generic(struct e1000_hw *hw) in e1000_get_auto_rd_done_generic() argument
1792 if (E1000_READ_REG(hw, E1000_EECD) & E1000_EECD_AUTO_RD) in e1000_get_auto_rd_done_generic()
1814 s32 e1000_valid_led_default_generic(struct e1000_hw *hw, u16 *data) in e1000_valid_led_default_generic() argument
1820 ret_val = hw->nvm.ops.read(hw, NVM_ID_LED_SETTINGS, 1, data); in e1000_valid_led_default_generic()
1837 s32 e1000_id_led_init_generic(struct e1000_hw *hw) in e1000_id_led_init_generic() argument
1839 struct e1000_mac_info *mac = &hw->mac; in e1000_id_led_init_generic()
1849 ret_val = hw->nvm.ops.valid_led_default(hw, &data); in e1000_id_led_init_generic()
1853 mac->ledctl_default = E1000_READ_REG(hw, E1000_LEDCTL); in e1000_id_led_init_generic()
1905 s32 e1000_setup_led_generic(struct e1000_hw *hw) in e1000_setup_led_generic() argument
1911 if (hw->mac.ops.setup_led != e1000_setup_led_generic) in e1000_setup_led_generic()
1914 if (hw->phy.media_type == e1000_media_type_fiber) { in e1000_setup_led_generic()
1915 ledctl = E1000_READ_REG(hw, E1000_LEDCTL); in e1000_setup_led_generic()
1916 hw->mac.ledctl_default = ledctl; in e1000_setup_led_generic()
1922 E1000_WRITE_REG(hw, E1000_LEDCTL, ledctl); in e1000_setup_led_generic()
1923 } else if (hw->phy.media_type == e1000_media_type_copper) { in e1000_setup_led_generic()
1924 E1000_WRITE_REG(hw, E1000_LEDCTL, hw->mac.ledctl_mode1); in e1000_setup_led_generic()
1937 s32 e1000_cleanup_led_generic(struct e1000_hw *hw) in e1000_cleanup_led_generic() argument
1941 E1000_WRITE_REG(hw, E1000_LEDCTL, hw->mac.ledctl_default); in e1000_cleanup_led_generic()
1951 s32 e1000_blink_led_generic(struct e1000_hw *hw) in e1000_blink_led_generic() argument
1958 if (hw->phy.media_type == e1000_media_type_fiber) { in e1000_blink_led_generic()
1969 ledctl_blink = hw->mac.ledctl_mode2; in e1000_blink_led_generic()
1971 u32 mode = (hw->mac.ledctl_mode2 >> i) & in e1000_blink_led_generic()
1973 u32 led_default = hw->mac.ledctl_default >> i; in e1000_blink_led_generic()
1987 E1000_WRITE_REG(hw, E1000_LEDCTL, ledctl_blink); in e1000_blink_led_generic()
1998 s32 e1000_led_on_generic(struct e1000_hw *hw) in e1000_led_on_generic() argument
2004 switch (hw->phy.media_type) { in e1000_led_on_generic()
2006 ctrl = E1000_READ_REG(hw, E1000_CTRL); in e1000_led_on_generic()
2009 E1000_WRITE_REG(hw, E1000_CTRL, ctrl); in e1000_led_on_generic()
2012 E1000_WRITE_REG(hw, E1000_LEDCTL, hw->mac.ledctl_mode2); in e1000_led_on_generic()
2027 s32 e1000_led_off_generic(struct e1000_hw *hw) in e1000_led_off_generic() argument
2033 switch (hw->phy.media_type) { in e1000_led_off_generic()
2035 ctrl = E1000_READ_REG(hw, E1000_CTRL); in e1000_led_off_generic()
2038 E1000_WRITE_REG(hw, E1000_CTRL, ctrl); in e1000_led_off_generic()
2041 E1000_WRITE_REG(hw, E1000_LEDCTL, hw->mac.ledctl_mode1); in e1000_led_off_generic()
2057 void e1000_set_pcie_no_snoop_generic(struct e1000_hw *hw, u32 no_snoop) in e1000_set_pcie_no_snoop_generic() argument
2063 if (hw->bus.type != e1000_bus_type_pci_express) in e1000_set_pcie_no_snoop_generic()
2067 gcr = E1000_READ_REG(hw, E1000_GCR); in e1000_set_pcie_no_snoop_generic()
2070 E1000_WRITE_REG(hw, E1000_GCR, gcr); in e1000_set_pcie_no_snoop_generic()
2085 s32 e1000_disable_pcie_master_generic(struct e1000_hw *hw) in e1000_disable_pcie_master_generic() argument
2092 if (hw->bus.type != e1000_bus_type_pci_express) in e1000_disable_pcie_master_generic()
2095 ctrl = E1000_READ_REG(hw, E1000_CTRL); in e1000_disable_pcie_master_generic()
2097 E1000_WRITE_REG(hw, E1000_CTRL, ctrl); in e1000_disable_pcie_master_generic()
2100 if (!(E1000_READ_REG(hw, E1000_STATUS) & in e1000_disable_pcie_master_generic()
2102 E1000_REMOVED(hw->hw_addr)) in e1000_disable_pcie_master_generic()
2122 void e1000_reset_adaptive_generic(struct e1000_hw *hw) in e1000_reset_adaptive_generic() argument
2124 struct e1000_mac_info *mac = &hw->mac; in e1000_reset_adaptive_generic()
2140 E1000_WRITE_REG(hw, E1000_AIT, 0); in e1000_reset_adaptive_generic()
2150 void e1000_update_adaptive_generic(struct e1000_hw *hw) in e1000_update_adaptive_generic() argument
2152 struct e1000_mac_info *mac = &hw->mac; in e1000_update_adaptive_generic()
2170 E1000_WRITE_REG(hw, E1000_AIT, in e1000_update_adaptive_generic()
2179 E1000_WRITE_REG(hw, E1000_AIT, 0); in e1000_update_adaptive_generic()
2191 static s32 e1000_validate_mdi_setting_generic(struct e1000_hw *hw) in e1000_validate_mdi_setting_generic() argument
2195 if (!hw->mac.autoneg && (hw->phy.mdix == 0 || hw->phy.mdix == 3)) { in e1000_validate_mdi_setting_generic()
2197 hw->phy.mdix = 1; in e1000_validate_mdi_setting_generic()
2211 s32 e1000_validate_mdi_setting_crossover_generic(struct e1000_hw E1000_UNUSEDARG *hw) in e1000_validate_mdi_setting_crossover_generic() argument
2229 s32 e1000_write_8bit_ctrl_reg_generic(struct e1000_hw *hw, u32 reg, in e1000_write_8bit_ctrl_reg_generic() argument
2238 E1000_WRITE_REG(hw, reg, regvalue); in e1000_write_8bit_ctrl_reg_generic()
2243 regvalue = E1000_READ_REG(hw, reg); in e1000_write_8bit_ctrl_reg_generic()