Lines Matching +full:10 +full:base +full:- +full:t1
28 * This file is part of the Chelsio T1 Ethernet driver.
30 * Copyright (C) 2003-2005 Chelsio Communications. All rights reserved.
123 t1_write_reg_4(sge->obj, A_SG_DOORBELL, control_reg); in sge_ring_doorbell()
146 * set default timeout value - 20 msec in t1_sge_create()
150 sge->ptimeout = 1; in t1_sge_create()
152 sge->obj = sa; in t1_sge_create()
157 p->cmdQ_size[0] = sge_cmdq0_cnt; in t1_sge_create()
158 p->cmdQ_size[1] = sge_cmdq1_cnt; in t1_sge_create()
162 p->freelQ_size[1] = sge_flq0_cnt; in t1_sge_create()
163 p->freelQ_size[0] = sge_flq1_cnt; in t1_sge_create()
165 p->freelQ_size[0] = sge_flq0_cnt; in t1_sge_create()
166 p->freelQ_size[1] = sge_flq1_cnt; in t1_sge_create()
172 cmn_err(CE_NOTE, "&sge->cmdQ[0]: %p\n", &sge->cmdQ[0]); in t1_sge_create()
173 cmn_err(CE_NOTE, "&sge->freelQ[0]: %p\n", &sge->freelQ[0]); in t1_sge_create()
174 cmn_err(CE_NOTE, "&sge->freelQ[1]: %p\n", &sge->freelQ[1]); in t1_sge_create()
175 cmn_err(CE_NOTE, "&sge->respQ: %p\n", &sge->respQ); in t1_sge_create()
176 cmn_err(CE_NOTE, "&sge->intr_cnt: %p\n", &sge->intr_cnt); in t1_sge_create()
197 if ((is_T2(sge->obj)) && (sge->pskb)) in t1_sge_destroy()
198 pe_free_fake_arp(sge->pskb); in t1_sge_destroy()
228 pesge *sge = adapter->sge; in t1_espi_workaround()
229 ch_t *chp = (ch_t *)sge->obj; in t1_espi_workaround()
232 if ((chp->ch_state == PERUNNING) && in t1_espi_workaround()
233 atomic_read(sge->cmdQ[0].cq_asleep)) { in t1_espi_workaround()
238 if (sge->pskb) { in t1_espi_workaround()
239 rv = pe_start(adapter, (mblk_t *)sge->pskb, in t1_espi_workaround()
242 sge->intr_cnt.arp_sent++; in t1_espi_workaround()
252 if (mutex_tryenter(&adapter->ch_intr)) { in t1_espi_workaround()
253 t1_sge_check_pause(sge, &sge->freelQ[0]); in t1_espi_workaround()
254 t1_sge_check_pause(sge, &sge->freelQ[1]); in t1_espi_workaround()
255 mutex_exit(&adapter->ch_intr); in t1_espi_workaround()
263 t1_write_reg_4(sge->obj, A_SG_CONTROL, sge->sge_control); in sge_start()
265 ch_init_cyclic(sge->obj, &sge->espi_wa_cyclic, in sge_start()
266 (void (*)(void *))t1_espi_workaround, sge->obj); in sge_start()
267 ch_start_cyclic(&sge->espi_wa_cyclic, sge->ptimeout); in sge_start()
283 t1_write_reg_4(sge->obj, A_SG_CONTROL, 0x0); in sge_stop()
288 status = t1_read_reg_4(sge->obj, A_SG_INT_CAUSE); in sge_stop()
289 t1_write_reg_4(sge->obj, A_SG_INT_CAUSE, status); in sge_stop()
294 ch_stop_cyclic(&sge->espi_wa_cyclic); in sge_stop()
305 struct cmdQ *Q = &sge->cmdQ[qid]; in sge_data_out()
306 ddi_dma_handle_t dh = (ddi_dma_handle_t)sge->cmdQ[qid].cq_dh; in sge_data_out()
307 spinlock_t *qlock = &Q->cq_qlock; in sge_data_out()
309 cmdQ_e *q = Q->cq_entries; in sge_data_out()
313 uint32_t entries_n = Q->cq_entries_n; in sge_data_out()
315 cmdQ_ce_t *cq = Q->cq_centries; in sge_data_out()
349 sge->do_udp_csum = 3; in sge_data_out()
350 } else if ((flg & CH_UDP) && (sge->do_udp_csum != 0)) { in sge_data_out()
357 csum_loc = (uint16_t *)(m0->b_rptr + in sge_data_out()
361 sge->intr_cnt.tx_soft_cksums++; in sge_data_out()
362 ((struct udphdr *)(csum_loc))->uh_sum = csum; in sge_data_out()
363 ((struct cpl_tx_pkt *)m0->b_rptr)->l4_csum_dis = 1; in sge_data_out()
365 sge->do_udp_csum--; in sge_data_out()
367 sge->do_tcp_csum = 3; in sge_data_out()
368 } else if (sge->do_tcp_csum != 0) { in sge_data_out()
370 sge->intr_cnt.tx_soft_cksums++; in sge_data_out()
375 sge->do_tcp_csum--; in sge_data_out()
379 reclaim_cnt = Q->cq_complete; in sge_data_out()
381 sge->intr_cnt.tx_reclaims[qid]++; in sge_data_out()
383 Q->cq_complete = 0; in sge_data_out()
386 genbit = Q->cq_genbit; in sge_data_out()
387 pidx = Q->cq_pidx; in sge_data_out()
388 credits = Q->cq_credits; in sge_data_out()
390 if ((credits - 1) < count) { in sge_data_out()
392 sge->intr_cnt.cmdQ_full[qid]++; in sge_data_out()
396 atomic_sub(count, &Q->cq_credits); in sge_data_out()
397 Q->cq_pidx += count; in sge_data_out()
398 if (Q->cq_pidx >= entries_n) { in sge_data_out()
399 Q->cq_pidx -= entries_n; in sge_data_out()
400 Q->cq_genbit ^= 1; in sge_data_out()
407 sge->intr_cnt.tx_descs[MBLK_MAX - 1]++; in sge_data_out()
409 sge->intr_cnt.tx_descs[count]++; in sge_data_out()
414 mapping = cmp->ce_pa; in sge_data_out()
419 offset = (caddr_t)e - (caddr_t)q; in sge_data_out()
421 e->Sop = 1; in sge_data_out()
422 e->DataValid = 1; in sge_data_out()
423 e->BufferLength = cmp->ce_len; in sge_data_out()
424 e->AddrHigh = ((u64)mapping >> 32); in sge_data_out()
425 e->AddrLow = ((u64)mapping & 0xffffffff); in sge_data_out()
427 --count; in sge_data_out()
431 e->Eop = 0; in sge_data_out()
433 e->GenerationBit = e->GenerationBit2 = genbit; in sge_data_out()
452 mapping = cmp->ce_pa; in sge_data_out()
454 e->Sop = 0; in sge_data_out()
455 e->DataValid = 1; in sge_data_out()
456 e->BufferLength = cmp->ce_len; in sge_data_out()
457 e->AddrHigh = ((u64)mapping >> 32); in sge_data_out()
458 e->AddrLow = ((u64)mapping & 0xffffffff); in sge_data_out()
460 if (i < (count - 1)) { in sge_data_out()
461 e->Eop = 0; in sge_data_out()
463 e->GenerationBit = e->GenerationBit2 = genbit; in sge_data_out()
468 ce->ce_mp = m0; in sge_data_out()
470 e->Eop = 1; in sge_data_out()
472 e->GenerationBit = e->GenerationBit2 = genbit; in sge_data_out()
487 if (atomic_read(Q->cq_asleep)) { in sge_data_out()
488 atomic_set(&Q->cq_asleep, 0); in sge_data_out()
490 atomic_set(&Q->cq_pio_pidx, Q->cq_pidx); in sge_data_out()
506 u32 val = t1_read_reg_4(sge->obj, A_PL_ENABLE); in t1_sge_intr_disable()
508 t1_write_reg_4(sge->obj, A_PL_ENABLE, val & ~SGE_PL_INTR_MASK); in t1_sge_intr_disable()
509 t1_write_reg_4(sge->obj, A_SG_INT_ENABLE, 0); in t1_sge_intr_disable()
523 u32 val = t1_read_reg_4(sge->obj, A_PL_ENABLE); in t1_sge_intr_enable()
525 t1_write_reg_4(sge->obj, A_PL_ENABLE, val | SGE_PL_INTR_MASK); in t1_sge_intr_enable()
527 if (sge->obj->ch_flags & TSO_CAPABLE) in t1_sge_intr_enable()
529 t1_write_reg_4(sge->obj, A_SG_INT_ENABLE, en); in t1_sge_intr_enable()
539 t1_write_reg_4(sge->obj, A_PL_CAUSE, SGE_PL_INTR_MASK); in t1_sge_intr_clear()
540 t1_write_reg_4(sge->obj, A_SG_INT_CAUSE, 0xffffffff); in t1_sge_intr_clear()
549 peobj *obj = sge->obj; in t1_sge_intr_error_handler()
553 sge->intr_cnt.respQ_empty++; in t1_sge_intr_error_handler()
555 sge->intr_cnt.respQ_overflow++; in t1_sge_intr_error_handler()
557 obj->ch_name); in t1_sge_intr_error_handler()
560 sge->intr_cnt.freelistQ_empty++; in t1_sge_intr_error_handler()
564 sge->intr_cnt.pkt_too_big++; in t1_sge_intr_error_handler()
566 obj->ch_name); in t1_sge_intr_error_handler()
569 sge->intr_cnt.pkt_mismatch++; in t1_sge_intr_error_handler()
571 obj->ch_name); in t1_sge_intr_error_handler()
582 * PARAM: sge - SGE instance pointer.
587 peobj *adapter = sge->obj; in sge_data_in()
588 struct respQ *Q = &sge->respQ; in sge_data_in()
590 respQ_e *q = Q->rq_entries; /* base response queue */ in sge_data_in()
591 uint32_t cidx = Q->rq_cidx; in sge_data_in()
592 uint32_t genbit = Q->rq_genbit; in sge_data_in()
593 uint32_t entries_n = Q->rq_entries_n; in sge_data_in()
594 uint32_t credits = Q->rq_credits; in sge_data_in()
595 uint32_t credits_thresh = Q->rq_credits_thresh; in sge_data_in()
602 ddi_dma_handle_t dh = (ddi_dma_handle_t)Q->rq_dh; in sge_data_in()
618 (void) ddi_dma_sync(dh, (off_t)((caddr_t)e - (caddr_t)q), in sge_data_in()
621 while (e->GenerationBit == genbit) { in sge_data_in()
622 if (--credits < credits_thresh) { in sge_data_in()
623 uint32_t n = entries_n - credits - 1; in sge_data_in()
627 if (likely(e->DataValid)) { in sge_data_in()
628 (void) t1_sge_rx(sge, &sge->freelQ[e->FreelistQid], in sge_data_in()
629 e->BufferLength, e->Offload); in sge_data_in()
630 if ((e->Sop != 1) || (e->Eop != 1)) { in sge_data_in()
631 sge->intr_cnt.rx_badEopSop++; in sge_data_in()
633 e->Sop, e->Eop, e->BufferLength); in sge_data_in()
636 flagt = e->Qsleeping; in sge_data_in()
639 sge->intr_cnt.rx_cmdq0++; in sge_data_in()
641 sge->intr_cnt.rx_cmdq1++; in sge_data_in()
643 sge->intr_cnt.rx_flq0++; in sge_data_in()
645 sge->intr_cnt.rx_flq1++; in sge_data_in()
647 spin_lock(&sge->cmdQ[0].cq_qlock); in sge_data_in()
648 sge->cmdQ[0].cq_complete += e->Cmdq0CreditReturn; in sge_data_in()
649 spin_unlock(&sge->cmdQ[0].cq_qlock); in sge_data_in()
650 spin_lock(&sge->cmdQ[1].cq_qlock); in sge_data_in()
651 sge->cmdQ[1].cq_complete += e->Cmdq1CreditReturn; in sge_data_in()
652 if ((adapter->ch_blked) && in sge_data_in()
653 (sge->cmdQ[0].cq_complete + in sge_data_in()
654 sge->cmdQ[1].cq_complete) > 16) { in sge_data_in()
655 adapter->ch_blked = 0; in sge_data_in()
658 spin_unlock(&sge->cmdQ[1].cq_qlock); in sge_data_in()
660 credits_pend[0] += e->Cmdq0CreditReturn; in sge_data_in()
661 credits_pend[1] += e->Cmdq1CreditReturn; in sge_data_in()
664 free_cmdQ_buffers(sge, &sge->cmdQ[0], credits_pend[0]); in sge_data_in()
668 free_cmdQ_buffers(sge, &sge->cmdQ[1], credits_pend[1]); in sge_data_in()
674 t1_sge_check_pause(sge, &sge->freelQ[e->FreelistQid]); in sge_data_in()
684 (void) ddi_dma_sync(dh, (off_t)((caddr_t)e - (caddr_t)q), in sge_data_in()
692 free_cmdQ_buffers(sge, &sge->cmdQ[0], credits_pend[0]); in sge_data_in()
694 free_cmdQ_buffers(sge, &sge->cmdQ[1], credits_pend[1]); in sge_data_in()
697 struct cmdQ *cmdQ = &sge->cmdQ[0]; in sge_data_in()
698 atomic_set(&cmdQ->cq_asleep, 1); in sge_data_in()
699 if (atomic_read(cmdQ->cq_pio_pidx) != cmdQ->cq_pidx) { in sge_data_in()
701 atomic_set(&cmdQ->cq_pio_pidx, cmdQ->cq_pidx); in sge_data_in()
710 if (adapter->ch_tx_overflow_mutex) in sge_data_in()
711 mutex_enter(adapter->ch_tx_overflow_mutex); in sge_data_in()
712 if (adapter->ch_blked && in sge_data_in()
713 (sge->cmdQ[0].cq_credits > (sge->cmdQ[0].cq_entries_n>>2)) && in sge_data_in()
714 (sge->cmdQ[1].cq_credits > (sge->cmdQ[1].cq_entries_n>>2))) { in sge_data_in()
715 adapter->ch_blked = 0; in sge_data_in()
716 if (adapter->ch_tx_overflow_cv) in sge_data_in()
717 cv_broadcast(adapter->ch_tx_overflow_cv); in sge_data_in()
720 if (adapter->ch_tx_overflow_mutex) in sge_data_in()
721 mutex_exit(adapter->ch_tx_overflow_mutex); in sge_data_in()
724 if (adapter->ch_blked && in sge_data_in()
725 (sge->cmdQ[0].cq_credits > (sge->cmdQ[0].cq_entries_n>>1)) && in sge_data_in()
726 (sge->cmdQ[1].cq_credits > (sge->cmdQ[1].cq_entries_n>>1))) { in sge_data_in()
727 adapter->ch_blked = 0; in sge_data_in()
733 Q->rq_genbit = genbit; in sge_data_in()
734 Q->rq_cidx = cidx; in sge_data_in()
735 Q->rq_credits = credits; in sge_data_in()
740 /* handle non-data interrupts */ in sge_data_in()
758 uint32_t rxoff = sa->sge->rx_offset; in os_freelist_buffer_alloc()
761 /* get pre-mapped buffer */ in os_freelist_buffer_alloc()
763 sa->norcvbuf++; in os_freelist_buffer_alloc()
767 *mb = desballoc((unsigned char *)rbp->cs_buf + rxoff, in os_freelist_buffer_alloc()
768 SGE_SM_BUF_SZ(sa)-rxoff, BPRI_MED, &rbp->cs_frtn); in os_freelist_buffer_alloc()
770 mutex_enter(&sa->ch_small_esbl); in os_freelist_buffer_alloc()
771 rbp->cs_next = sa->ch_small_esb_free; in os_freelist_buffer_alloc()
772 sa->ch_small_esb_free = rbp; in os_freelist_buffer_alloc()
773 mutex_exit(&sa->ch_small_esbl); in os_freelist_buffer_alloc()
776 *dh = rbp->cs_dh; in os_freelist_buffer_alloc()
778 return (rbp->cs_pa + rxoff); in os_freelist_buffer_alloc()
780 /* get pre-mapped buffer */ in os_freelist_buffer_alloc()
782 sa->norcvbuf++; in os_freelist_buffer_alloc()
786 *mb = desballoc((unsigned char *)rbp->cs_buf + rxoff, in os_freelist_buffer_alloc()
787 SGE_BG_BUF_SZ(sa)-rxoff, BPRI_MED, &rbp->cs_frtn); in os_freelist_buffer_alloc()
789 mutex_enter(&sa->ch_big_esbl); in os_freelist_buffer_alloc()
790 rbp->cs_next = sa->ch_big_esb_free; in os_freelist_buffer_alloc()
791 sa->ch_big_esb_free = rbp; in os_freelist_buffer_alloc()
792 mutex_exit(&sa->ch_big_esbl); in os_freelist_buffer_alloc()
795 *dh = rbp->cs_dh; in os_freelist_buffer_alloc()
797 return (rbp->cs_pa + rxoff); in os_freelist_buffer_alloc()
805 peobj *adapter = sge->obj; in t1_sge_rx()
806 struct freelQ_ce *cq = Q->fq_centries; in t1_sge_rx()
807 struct freelQ_ce *ce = &cq[Q->fq_cidx]; in t1_sge_rx()
808 ddi_dma_handle_t dh = (ddi_dma_handle_t)ce->fe_dh; in t1_sge_rx()
809 uint32_t cidx = Q->fq_cidx; in t1_sge_rx()
810 uint32_t entries_n = Q->fq_entries_n; in t1_sge_rx()
811 uint32_t sz = Q->fq_rx_buffer_size; in t1_sge_rx()
813 uint32_t rxoff = sge->rx_offset; in t1_sge_rx()
818 if (Q->fq_id) in t1_sge_rx()
819 sge->intr_cnt.rx_flq1_cnt++; in t1_sge_rx()
821 sge->intr_cnt.rx_flq0_cnt++; in t1_sge_rx()
826 * NOTE that rxoff is 2 for T1 adapters. We align the the start in t1_sge_rx()
827 * of the DMA buffer begin at rxoff offset for T1 cards instead of in t1_sge_rx()
842 if ((offload == 0) && adapter->pause_on) { in t1_sge_rx()
845 e = &Q->fq_entries[cidx]; in t1_sge_rx()
846 e->GenerationBit ^= 1; in t1_sge_rx()
847 e->GenerationBit2 ^= 1; in t1_sge_rx()
848 sge->intr_cnt.rx_pkt_drops++; in t1_sge_rx()
850 } else if (((adapter->pause_on || in t1_sge_rx()
859 char *src = (char *)((mblk_t *)ce->fe_mp)->b_rptr; in t1_sge_rx()
863 * Note that len does not include offset for T1. in t1_sge_rx()
878 src += sge->rx_pkt_pad; in t1_sge_rx()
880 memcpy(skb->b_rptr, src, len); in t1_sge_rx()
884 e = &Q->fq_entries[cidx]; in t1_sge_rx()
885 e->GenerationBit ^= 1; in t1_sge_rx()
886 e->GenerationBit2 ^= 1; in t1_sge_rx()
887 sge->intr_cnt.rx_pkt_copied++; in t1_sge_rx()
890 skb = ce->fe_mp; in t1_sge_rx()
891 ce->fe_mp = NULL; in t1_sge_rx()
898 if (!offload && sge->rx_pkt_pad) in t1_sge_rx()
903 * Note that len does not include offset for T1. in t1_sge_rx()
919 index = adapter->ch_sm_index; in t1_sge_rx()
921 index = adapter->ch_big_index; in t1_sge_rx()
924 if (adapter->toe_rcv) in t1_sge_rx()
925 adapter->toe_rcv(adapter->ch_toeinst, skb); in t1_sge_rx()
931 adapter->ch_name, *skb->b_rptr); in t1_sge_rx()
941 adapter->ch_name, *skb->b_rptr); in t1_sge_rx()
948 struct cpl_rx_pkt *p = (struct cpl_rx_pkt *)skb->b_rptr; in t1_sge_rx()
963 &buffers_in_use[adapter->ch_sm_index]); in t1_sge_rx()
966 &buffers_in_use[adapter->ch_big_index]); in t1_sge_rx()
974 if (adapter->toe_tunnel) { in t1_sge_rx()
975 rv = adapter->toe_tunnel(adapter->ch_toeinst, skb); in t1_sge_rx()
984 cksum = p->csum; in t1_sge_rx()
989 if (adapter->ch_config.cksum_enabled && in t1_sge_rx()
990 (ntohs(((struct ether_header *)skb->b_rptr)->ether_type) == in t1_sge_rx()
992 ((skb->b_rptr[14+9] == IPPROTO_TCP) || in t1_sge_rx()
993 (skb->b_rptr[14+9] == IPPROTO_UDP))) { in t1_sge_rx()
1005 Q->fq_cidx = cidx; in t1_sge_rx()
1007 if (unlikely(--Q->fq_credits < (entries_n>>2))) in t1_sge_rx()
1017 peobj *adapter = sge->obj; in t1_sge_check_pause()
1027 if (Q->fq_credits < Q->fq_pause_on_thresh) { in t1_sge_check_pause()
1029 sge->intr_cnt.rx_pause_on++; in t1_sge_check_pause()
1030 adapter->txxg_cfg1 |= in t1_sge_check_pause()
1034 adapter->txxg_cfg1); in t1_sge_check_pause()
1035 adapter->pause_on = 1; in t1_sge_check_pause()
1036 adapter->pause_time = gethrtime(); in t1_sge_check_pause()
1039 } else if ((adapter->pause_on) && in t1_sge_check_pause()
1040 (Q->fq_credits > Q->fq_pause_off_thresh)) { in t1_sge_check_pause()
1042 sge->intr_cnt.rx_pause_off++; in t1_sge_check_pause()
1043 adapter->txxg_cfg1 &= ~SUNI1x10GEXP_BITMSK_TXXG_HOSTPAUSE; in t1_sge_check_pause()
1046 adapter->txxg_cfg1); in t1_sge_check_pause()
1047 adapter->pause_on = 0; in t1_sge_check_pause()
1048 time = (gethrtime() - adapter->pause_time)/1000; in t1_sge_check_pause()
1049 sge->intr_cnt.rx_pause_ms += time; in t1_sge_check_pause()
1050 if (time > sge->intr_cnt.rx_pause_spike) in t1_sge_check_pause()
1051 sge->intr_cnt.rx_pause_spike = (uint32_t)time; in t1_sge_check_pause()
1053 sge->intr_cnt.rx_fl_credits = Q->fq_credits; in t1_sge_check_pause()
1060 uint32_t pidx = Q->fq_pidx; in alloc_freelQ_buffers()
1061 struct freelQ_ce *ce = &Q->fq_centries[pidx]; in alloc_freelQ_buffers()
1062 freelQ_e *fq = Q->fq_entries; /* base of freelist Q */ in alloc_freelQ_buffers()
1063 freelQ_e *e = &Q->fq_entries[pidx]; in alloc_freelQ_buffers()
1064 uint32_t sz = Q->fq_rx_buffer_size; in alloc_freelQ_buffers()
1065 uint32_t rxoff = sge->rx_offset; in alloc_freelQ_buffers()
1066 uint32_t credits = Q->fq_credits; in alloc_freelQ_buffers()
1067 uint32_t entries_n = Q->fq_entries_n; in alloc_freelQ_buffers()
1068 uint32_t genbit = Q->fq_genbit; in alloc_freelQ_buffers()
1069 ddi_dma_handle_t th = (ddi_dma_handle_t)Q->fq_dh; in alloc_freelQ_buffers()
1072 off_t offset = (off_t)((caddr_t)e - (caddr_t)fq); in alloc_freelQ_buffers()
1076 if (e->GenerationBit != genbit) { in alloc_freelQ_buffers()
1079 mapping = os_freelist_buffer_alloc(sge->obj, sz, in alloc_freelQ_buffers()
1082 sge->intr_cnt.rx_flbuf_fails++; in alloc_freelQ_buffers()
1085 sge->intr_cnt.rx_flbuf_allocs++; in alloc_freelQ_buffers()
1087 ce->fe_mp = skb; in alloc_freelQ_buffers()
1088 ce->fe_dh = dh; in alloc_freelQ_buffers()
1091 * Note that for T1, we've started the beginning of in alloc_freelQ_buffers()
1095 e->AddrLow = (u32)mapping; in alloc_freelQ_buffers()
1096 e->AddrHigh = (u64)mapping >> 32; in alloc_freelQ_buffers()
1097 e->BufferLength = sz - rxoff; in alloc_freelQ_buffers()
1099 e->GenerationBit = e->GenerationBit2 = genbit; in alloc_freelQ_buffers()
1119 ce = Q->fq_centries; in alloc_freelQ_buffers()
1120 e = Q->fq_entries; in alloc_freelQ_buffers()
1128 Q->fq_genbit = genbit; in alloc_freelQ_buffers()
1129 Q->fq_pidx = pidx; in alloc_freelQ_buffers()
1130 Q->fq_credits = credits; in alloc_freelQ_buffers()
1136 u32 irq_reg = t1_read_reg_4(sge->obj, A_SG_INT_ENABLE); in freelQs_empty()
1139 alloc_freelQ_buffers(sge, &sge->freelQ[0]); in freelQs_empty()
1140 alloc_freelQ_buffers(sge, &sge->freelQ[1]); in freelQs_empty()
1142 if ((sge->freelQ[0].fq_credits > sge->freelQ[0].fq_entries_n >> 2) && in freelQs_empty()
1143 (sge->freelQ[1].fq_credits > sge->freelQ[1].fq_entries_n >> 2)) { in freelQs_empty()
1145 irqholdoff_reg = sge->intrtimer[sge->currIndex]; in freelQs_empty()
1149 irqholdoff_reg = sge->intrtimer_nres; in freelQs_empty()
1151 t1_write_reg_4(sge->obj, A_SG_INTRTIMER, irqholdoff_reg); in freelQs_empty()
1152 t1_write_reg_4(sge->obj, A_SG_INT_ENABLE, irq_reg); in freelQs_empty()
1159 * Frees 'credits_pend' TX buffers and returns the credits to Q->credits.
1167 struct cmdQ_ce *cq = Q->cq_centries; in free_cmdQ_buffers()
1168 uint32_t entries_n = Q->cq_entries_n; in free_cmdQ_buffers()
1169 uint32_t cidx = Q->cq_cidx; in free_cmdQ_buffers()
1172 ch_t *chp = sge->obj; in free_cmdQ_buffers()
1176 while (i--) { in free_cmdQ_buffers()
1179 switch (ce->ce_flg & 0x7) { in free_cmdQ_buffers()
1181 if (ce->ce_dh) { in free_cmdQ_buffers()
1182 ch_unbind_dma_handle(sge->obj, ce->ce_dh); in free_cmdQ_buffers()
1183 ce->ce_dh = NULL; /* may not be needed */ in free_cmdQ_buffers()
1185 skb = ce->ce_mp; in free_cmdQ_buffers()
1186 if (skb && ((ce->ce_flg & CH_ARP) == 0)) { in free_cmdQ_buffers()
1189 ce->ce_mp = NULL; in free_cmdQ_buffers()
1194 if (ce->ce_dh) { in free_cmdQ_buffers()
1195 ch_unbind_dvma_handle(sge->obj, ce->ce_dh); in free_cmdQ_buffers()
1196 ce->ce_dh = NULL; /* may not be needed */ in free_cmdQ_buffers()
1198 skb = ce->ce_mp; in free_cmdQ_buffers()
1199 if (skb && ((ce->ce_flg & CH_ARP) == 0)) { in free_cmdQ_buffers()
1202 ce->ce_mp = NULL; in free_cmdQ_buffers()
1207 chp->toe_free(chp->ch_toeinst, (tbuf_t *)(ce->ce_mp)); in free_cmdQ_buffers()
1208 ce->ce_mp = NULL; in free_cmdQ_buffers()
1212 if (ce->ce_dh) { in free_cmdQ_buffers()
1213 if ((ce->ce_flg & 7) == DH_DMA) { in free_cmdQ_buffers()
1214 ch_unbind_dma_handle(sge->obj, ce->ce_dh); in free_cmdQ_buffers()
1218 ch_unbind_dvma_handle(sge->obj, ce->ce_dh); in free_cmdQ_buffers()
1221 ce->ce_dh = NULL; /* may not be needed */ in free_cmdQ_buffers()
1224 skb = ce->ce_mp; in free_cmdQ_buffers()
1225 if (skb && ((ce->ce_flg & CH_ARP) == 0)) { in free_cmdQ_buffers()
1228 ce->ce_mp = NULL; in free_cmdQ_buffers()
1238 Q->cq_cidx = cidx; in free_cmdQ_buffers()
1239 atomic_add(credits_pend, &Q->cq_credits); in free_cmdQ_buffers()
1245 return (&sge->intr_cnt); in sge_get_stat()
1252 * rx_pkt_pad is set, if the hardware supports aligning non-offload traffic.
1258 sge->rx_pkt_pad = t1_is_T1B(sge->obj) ? 0 : SGE_RX_OFFSET; in t1_sge_configure()
1259 sge->jumbo_fl = t1_is_T1B(sge->obj) ? 1 : 0; in t1_sge_configure()
1261 sge->rx_offset = t1_is_T1B(sge->obj) ? SGE_RX_OFFSET: 0; in t1_sge_configure()
1264 return (-ENOMEM); in t1_sge_configure()
1267 return (-ENOMEM); in t1_sge_configure()
1277 p->large_buf_capacity = jumbo_payload_capacity(sge); in t1_sge_configure()
1291 struct freelQ *Q = &sge->freelQ[i]; in alloc_rx_resources()
1293 Q->fq_id = i; in alloc_rx_resources()
1294 Q->fq_genbit = 1; in alloc_rx_resources()
1295 Q->fq_entries_n = p->freelQ_size[i]; in alloc_rx_resources()
1297 Q->fq_pause_on_thresh = flq_pause_window; in alloc_rx_resources()
1298 Q->fq_pause_off_thresh = Q->fq_entries_n >> 1; in alloc_rx_resources()
1300 size = sizeof (freelQ_e) * Q->fq_entries_n; in alloc_rx_resources()
1302 Q->fq_entries = pe_os_malloc_contig_wait_zero(sge->obj, in alloc_rx_resources()
1303 size, &Q->fq_pa, &Q->fq_dh, &Q->fq_ah, DMA_OUT); in alloc_rx_resources()
1306 if (!Q->fq_entries) in alloc_rx_resources()
1308 memset(Q->fq_entries, 0, size); in alloc_rx_resources()
1309 size = sizeof (struct freelQ_ce) * Q->fq_entries_n; in alloc_rx_resources()
1310 Q->fq_centries = t1_os_malloc_wait_zero(size); in alloc_rx_resources()
1311 if (!Q->fq_centries) in alloc_rx_resources()
1313 memset(Q->fq_centries, 0, size); in alloc_rx_resources()
1323 sge->freelQ[1 ^ sge->jumbo_fl].fq_rx_buffer_size = SGE_RX_SM_BUF_SIZE + in alloc_rx_resources()
1325 SGE_RX_OFFSET - sge->rx_pkt_pad; in alloc_rx_resources()
1327 sge->freelQ[1 ^ sge->jumbo_fl].fq_rx_buffer_size = in alloc_rx_resources()
1328 sge->obj->ch_sm_buf_sz; in alloc_rx_resources()
1329 if (is_T2(sge->obj)) in alloc_rx_resources()
1330 sge->intr_cnt.rx_flq1_sz = sge->obj->ch_sm_buf_sz; in alloc_rx_resources()
1332 sge->intr_cnt.rx_flq0_sz = sge->obj->ch_sm_buf_sz; in alloc_rx_resources()
1335 sge->freelQ[sge->jumbo_fl].fq_rx_buffer_size = (16 * 1024) - in alloc_rx_resources()
1338 sge->freelQ[sge->jumbo_fl].fq_rx_buffer_size = sge->obj->ch_bg_buf_sz; in alloc_rx_resources()
1339 if (is_T2(sge->obj)) in alloc_rx_resources()
1340 sge->intr_cnt.rx_flq0_sz = sge->obj->ch_bg_buf_sz; in alloc_rx_resources()
1342 sge->intr_cnt.rx_flq1_sz = sge->obj->ch_bg_buf_sz; in alloc_rx_resources()
1345 sge->respQ.rq_genbit = 1; in alloc_rx_resources()
1346 sge->respQ.rq_entries_n = sge_respq_cnt; in alloc_rx_resources()
1347 sge->respQ.rq_credits = sge_respq_cnt; in alloc_rx_resources()
1348 sge->respQ.rq_credits_thresh = sge_respq_cnt - (sge_respq_cnt >> 2); in alloc_rx_resources()
1349 size = sizeof (respQ_e) * sge->respQ.rq_entries_n; in alloc_rx_resources()
1351 sge->respQ.rq_entries = pe_os_malloc_contig_wait_zero(sge->obj, in alloc_rx_resources()
1352 size, &(sge->respQ.rq_pa), &(sge->respQ.rq_dh), in alloc_rx_resources()
1353 &(sge->respQ.rq_ah), 0); in alloc_rx_resources()
1355 if (!sge->respQ.rq_entries) in alloc_rx_resources()
1357 memset(sge->respQ.rq_entries, 0, size); in alloc_rx_resources()
1374 struct cmdQ *Q = &sge->cmdQ[i]; in alloc_tx_resources()
1376 Q->cq_genbit = 1; in alloc_tx_resources()
1377 Q->cq_entries_n = p->cmdQ_size[i]; in alloc_tx_resources()
1378 atomic_set(&Q->cq_credits, Q->cq_entries_n); in alloc_tx_resources()
1379 atomic_set(&Q->cq_asleep, 1); in alloc_tx_resources()
1381 mutex_init(&Q->cq_qlock, NULL, MUTEX_DRIVER, in alloc_tx_resources()
1382 sge->obj->ch_icookp); in alloc_tx_resources()
1384 size = sizeof (cmdQ_e) * Q->cq_entries_n; in alloc_tx_resources()
1385 Q->cq_entries = pe_os_malloc_contig_wait_zero(sge->obj, in alloc_tx_resources()
1386 size, &Q->cq_pa, &Q->cq_dh, &Q->cq_ah, DMA_OUT); in alloc_tx_resources()
1388 if (!Q->cq_entries) in alloc_tx_resources()
1390 memset(Q->cq_entries, 0, size); in alloc_tx_resources()
1391 size = sizeof (struct cmdQ_ce) * Q->cq_entries_n; in alloc_tx_resources()
1392 Q->cq_centries = t1_os_malloc_wait_zero(size); in alloc_tx_resources()
1393 if (!Q->cq_centries) in alloc_tx_resources()
1395 memset(Q->cq_centries, 0, size); in alloc_tx_resources()
1397 /* allocate pre-mapped dma headers */ in alloc_tx_resources()
1398 pe_dma_handle_init(sge->obj, Q->cq_entries_n); in alloc_tx_resources()
1413 * the adaptive policy in adapter->sge_params before calling it.
1418 if (!p->coalesce_enable) { in t1_sge_set_coalesce_params()
1419 u32 newTimer = p->rx_coalesce_usecs * in t1_sge_set_coalesce_params()
1420 (board_info(sge->obj)->clock_core / 1000000); in t1_sge_set_coalesce_params()
1422 t1_write_reg_4(sge->obj, A_SG_INTRTIMER, newTimer); in t1_sge_set_coalesce_params()
1429 * but sge->sge_control is setup and ready to go.
1434 ch_t *ap = sge->obj; in configure_sge()
1439 setup_ring_params(ap, sge->cmdQ[0].cq_pa, sge->cmdQ[0].cq_entries_n, in configure_sge()
1441 setup_ring_params(ap, sge->cmdQ[1].cq_pa, sge->cmdQ[1].cq_entries_n, in configure_sge()
1443 setup_ring_params(ap, sge->freelQ[0].fq_pa, in configure_sge()
1444 sge->freelQ[0].fq_entries_n, A_SG_FL0BASELWR, in configure_sge()
1446 setup_ring_params(ap, sge->freelQ[1].fq_pa, in configure_sge()
1447 sge->freelQ[1].fq_entries_n, A_SG_FL1BASELWR, in configure_sge()
1451 t1_write_reg_4(ap, A_SG_FLTHRESHOLD, SGE_RX_SM_BUF_SIZE(ap) - in configure_sge()
1452 SZ_CPL_RX_PKT - sge->rx_pkt_pad - sge->rx_offset + 1); in configure_sge()
1453 setup_ring_params(ap, sge->respQ.rq_pa, sge->respQ.rq_entries_n, in configure_sge()
1455 t1_write_reg_4(ap, A_SG_RSPQUEUECREDIT, (u32)sge->respQ.rq_entries_n); in configure_sge()
1456 sge->sge_control = F_CMDQ0_ENABLE | F_CMDQ1_ENABLE | F_FL0_ENABLE | in configure_sge()
1467 V_RX_PKT_OFFSET(sge->rx_pkt_pad); in configure_sge()
1470 sge->sge_control |= F_ENABLE_BIG_ENDIAN; in configure_sge()
1476 * intrtimer[0<i<10] = (SGE_INTRTIMER0 + 2*i) usec in configure_sge()
1477 * intrtimer[10] = (SGE_INTRTIMER1) usec in configure_sge()
1480 sge->intrtimer[0] = board_info(sge->obj)->clock_core / 1000000; in configure_sge()
1481 for (i = 1; i < SGE_INTR_MAXBUCKETS - 1; ++i) { in configure_sge()
1482 sge->intrtimer[i] = SGE_INTRTIMER0 + (2 * i); in configure_sge()
1483 sge->intrtimer[i] *= sge->intrtimer[0]; in configure_sge()
1485 sge->intrtimer[SGE_INTR_MAXBUCKETS - 1] = in configure_sge()
1486 sge->intrtimer[0] * SGE_INTRTIMER1; in configure_sge()
1488 sge->intrtimer_nres = (uint32_t)(sge->intrtimer[0] * in configure_sge()
1491 sge->intrtimer[0] = (uint32_t)(sge->intrtimer[0] * SGE_INTRTIMER0); in configure_sge()
1493 sge->currIndex = SGE_INTR_MAXBUCKETS - 1; in configure_sge()
1495 if (p->coalesce_enable) in configure_sge()
1497 sge->intrtimer[sge->currIndex]); in configure_sge()
1519 if (sge->respQ.rq_entries) { in free_rx_resources()
1520 size = sizeof (respQ_e) * sge->respQ.rq_entries_n; in free_rx_resources()
1522 pe_os_free_contig(sge->obj, size, sge->respQ.rq_entries, in free_rx_resources()
1523 sge->respQ.rq_pa, sge->respQ.rq_dh, sge->respQ.rq_ah); in free_rx_resources()
1527 struct freelQ *Q = &sge->freelQ[i]; in free_rx_resources()
1529 if (Q->fq_centries) { in free_rx_resources()
1532 t1_os_free(Q->fq_centries, in free_rx_resources()
1533 Q->fq_entries_n * sizeof (freelQ_ce_t)); in free_rx_resources()
1535 if (Q->fq_entries) { in free_rx_resources()
1536 size = sizeof (freelQ_e) * Q->fq_entries_n; in free_rx_resources()
1539 pe_os_free_contig(sge->obj, size, Q->fq_entries, in free_rx_resources()
1540 Q->fq_pa, Q->fq_dh, Q->fq_ah); in free_rx_resources()
1554 struct freelQ_ce *cq = Q->fq_centries; in free_freelQ_buffers()
1555 uint32_t credits = Q->fq_credits; in free_freelQ_buffers()
1556 uint32_t entries_n = Q->fq_entries_n; in free_freelQ_buffers()
1557 uint32_t cidx = Q->fq_cidx; in free_freelQ_buffers()
1558 uint32_t i = Q->fq_id; in free_freelQ_buffers()
1563 while (credits--) { in free_freelQ_buffers()
1565 if ((mp = ce->fe_mp) != NULL) { in free_freelQ_buffers()
1566 /* bump in-use count of receive buffers */ in free_freelQ_buffers()
1567 if (i != sge->jumbo_fl) { in free_freelQ_buffers()
1569 &buffers_in_use[sge->obj->ch_sm_index]); in free_freelQ_buffers()
1572 &buffers_in_use[sge->obj->ch_big_index]); in free_freelQ_buffers()
1576 * note. freeb() callback of esb-alloced mblk will in free_freelQ_buffers()
1580 ce->fe_mp = NULL; in free_freelQ_buffers()
1590 Q->fq_cidx = cidx; in free_freelQ_buffers()
1591 Q->fq_credits = credits; in free_freelQ_buffers()
1606 struct cmdQ *Q = &sge->cmdQ[i]; in free_tx_resources()
1608 if (Q->cq_centries) { in free_tx_resources()
1609 unsigned int pending = Q->cq_entries_n - in free_tx_resources()
1610 atomic_read(Q->cq_credits); in free_tx_resources()
1612 mutex_destroy(&Q->cq_qlock); in free_tx_resources()
1617 size = sizeof (struct cmdQ_ce) * Q->cq_entries_n; in free_tx_resources()
1618 t1_os_free(Q->cq_centries, size); in free_tx_resources()
1621 if (Q->cq_entries) { in free_tx_resources()
1622 size = sizeof (cmdQ_e) * Q->cq_entries_n; in free_tx_resources()
1623 pe_os_free_contig(sge->obj, size, Q->cq_entries, in free_tx_resources()
1624 Q->cq_pa, Q->cq_dh, Q->cq_ah); in free_tx_resources()
1630 * Return the payload capacity of the jumbo free-list buffers.
1634 return (sge->freelQ[sge->jumbo_fl].fq_rx_buffer_size - in jumbo_payload_capacity()
1635 sizeof (struct cpl_rx_data) - sge->rx_pkt_pad - sge->rx_offset); in jumbo_payload_capacity()
1642 pesge *sge = adapter->sge; in t1_sge_set_ptimeout()
1645 sge->ptimeout = max(val, 1); in t1_sge_set_ptimeout()
1652 pesge *sge = adapter->sge; in t1_sge_get_ptimeout()
1654 return (is_T2(adapter) ? sge->ptimeout : 0); in t1_sge_get_ptimeout()
1660 sge->pskb = bp; in sge_add_fake_arp()
1675 status = -1; in sge_kstat_setup()
1677 instance = ddi_get_instance(sge->obj->ch_dip); in sge_kstat_setup()
1682 chkp = (p_ch_kstat_t)ksp->ks_data; in sge_kstat_setup()
1683 kstat_named_init(&chkp->respQ_empty, "respQ_empty", in sge_kstat_setup()
1685 kstat_named_init(&chkp->respQ_overflow, "respQ_overflow", in sge_kstat_setup()
1687 kstat_named_init(&chkp->freelistQ_empty, "freelistQ_empty", in sge_kstat_setup()
1689 kstat_named_init(&chkp->pkt_too_big, "pkt_too_big", in sge_kstat_setup()
1691 kstat_named_init(&chkp->pkt_mismatch, "pkt_mismatch", in sge_kstat_setup()
1693 kstat_named_init(&chkp->cmdQ_full[0], "cmdQ_full[0]", in sge_kstat_setup()
1695 kstat_named_init(&chkp->cmdQ_full[1], "cmdQ_full[1]", in sge_kstat_setup()
1697 kstat_named_init(&chkp->tx_reclaims[0], "tx_reclaims[0]", in sge_kstat_setup()
1699 kstat_named_init(&chkp->tx_reclaims[1], "tx_reclaims[1]", in sge_kstat_setup()
1701 kstat_named_init(&chkp->tx_msg_pullups, "tx_msg_pullups", in sge_kstat_setup()
1703 kstat_named_init(&chkp->tx_hdr_pullups, "tx_hdr_pullups", in sge_kstat_setup()
1705 kstat_named_init(&chkp->tx_tcp_ip_frag, "tx_tcp_ip_frag", in sge_kstat_setup()
1707 kstat_named_init(&chkp->tx_udp_ip_frag, "tx_udp_ip_frag", in sge_kstat_setup()
1709 kstat_named_init(&chkp->tx_soft_cksums, "tx_soft_cksums", in sge_kstat_setup()
1711 kstat_named_init(&chkp->tx_need_cpl_space, "tx_need_cpl_space", in sge_kstat_setup()
1713 kstat_named_init(&chkp->tx_multi_mblks, "tx_multi_mblks", in sge_kstat_setup()
1715 kstat_named_init(&chkp->tx_no_dvma1, "tx_num_multi_dvma_fails", in sge_kstat_setup()
1717 kstat_named_init(&chkp->tx_no_dvma2, "tx_num_single_dvma_fails", in sge_kstat_setup()
1719 kstat_named_init(&chkp->tx_no_dma1, "tx_num_multi_dma_fails", in sge_kstat_setup()
1721 kstat_named_init(&chkp->tx_no_dma2, "tx_num_single_dma_fails", in sge_kstat_setup()
1723 kstat_named_init(&chkp->rx_cmdq0, "rx_cmdq0", in sge_kstat_setup()
1725 kstat_named_init(&chkp->rx_cmdq1, "rx_cmdq1", in sge_kstat_setup()
1727 kstat_named_init(&chkp->rx_flq0, "rx_flq0", in sge_kstat_setup()
1729 kstat_named_init(&chkp->rx_flq1, "rx_flq1", in sge_kstat_setup()
1731 kstat_named_init(&chkp->rx_flq0_sz, "rx_flq0_buffer_sz", in sge_kstat_setup()
1733 kstat_named_init(&chkp->rx_flq1_sz, "rx_flq1_buffer_sz", in sge_kstat_setup()
1735 kstat_named_init(&chkp->rx_pkt_drops, "rx_pkt_drops", in sge_kstat_setup()
1737 kstat_named_init(&chkp->rx_pkt_copied, "rx_pkt_copied", in sge_kstat_setup()
1739 kstat_named_init(&chkp->rx_pause_on, "rx_pause_on", in sge_kstat_setup()
1741 kstat_named_init(&chkp->rx_pause_off, "rx_pause_off", in sge_kstat_setup()
1743 kstat_named_init(&chkp->rx_pause_ms, "rx_pause_ms", in sge_kstat_setup()
1745 kstat_named_init(&chkp->rx_pause_spike, "rx_pause_spike", in sge_kstat_setup()
1747 kstat_named_init(&chkp->rx_fl_credits, "rx_fl_credits", in sge_kstat_setup()
1749 kstat_named_init(&chkp->rx_flbuf_fails, "rx_flbuf_fails", in sge_kstat_setup()
1751 kstat_named_init(&chkp->rx_flbuf_allocs, "rx_flbuf_allocs", in sge_kstat_setup()
1753 kstat_named_init(&chkp->rx_badEopSop, "rx_badEopSop", in sge_kstat_setup()
1755 kstat_named_init(&chkp->rx_flq0_cnt, "rx_flq0_cnt", in sge_kstat_setup()
1757 kstat_named_init(&chkp->rx_flq1_cnt, "rx_flq1_cnt", in sge_kstat_setup()
1759 kstat_named_init(&chkp->arp_sent, "arp_sent", in sge_kstat_setup()
1761 kstat_named_init(&chkp->tx_doorbells, "tx_doorbells", in sge_kstat_setup()
1763 kstat_named_init(&chkp->intr_doorbells, "intr_doorbells", in sge_kstat_setup()
1765 kstat_named_init(&chkp->intr1_doorbells, "intr1_doorbells", in sge_kstat_setup()
1767 kstat_named_init(&chkp->sleep_cnt, "sleep_cnt", in sge_kstat_setup()
1769 kstat_named_init(&chkp->pe_allocb_cnt, "pe_allocb_cnt", in sge_kstat_setup()
1773 kstat_named_init(&chkp->tx_descs[i], in sge_kstat_setup()
1776 ksp->ks_update = sge_kstat_update; in sge_kstat_setup()
1777 ksp->ks_private = (void *)sge; in sge_kstat_setup()
1778 sge->ksp = ksp; in sge_kstat_setup()
1789 if (sge->ksp) in sge_kstat_remove()
1790 kstat_delete(sge->ksp); in sge_kstat_remove()
1801 sge = (pesge *)ksp->ks_private; in sge_kstat_update()
1802 statsp = (p_ch_stats_t)&sge->intr_cnt; in sge_kstat_update()
1803 chkp = (p_ch_kstat_t)ksp->ks_data; in sge_kstat_update()
1805 statsp->respQ_empty = chkp->respQ_empty.value.ui32; in sge_kstat_update()
1806 statsp->respQ_overflow = chkp->respQ_overflow.value.ui32; in sge_kstat_update()
1807 statsp->freelistQ_empty = chkp->freelistQ_empty.value.ui32; in sge_kstat_update()
1808 statsp->pkt_too_big = chkp->pkt_too_big.value.ui32; in sge_kstat_update()
1809 statsp->pkt_mismatch = chkp->pkt_mismatch.value.ui32; in sge_kstat_update()
1810 statsp->cmdQ_full[0] = chkp->cmdQ_full[0].value.ui32; in sge_kstat_update()
1811 statsp->cmdQ_full[1] = chkp->cmdQ_full[1].value.ui32; in sge_kstat_update()
1812 statsp->tx_reclaims[0] = chkp->tx_reclaims[0].value.ui32; in sge_kstat_update()
1813 statsp->tx_reclaims[1] = chkp->tx_reclaims[1].value.ui32; in sge_kstat_update()
1814 statsp->tx_msg_pullups = chkp->tx_msg_pullups.value.ui32; in sge_kstat_update()
1815 statsp->tx_hdr_pullups = chkp->tx_hdr_pullups.value.ui32; in sge_kstat_update()
1816 statsp->tx_tcp_ip_frag = chkp->tx_tcp_ip_frag.value.ui32; in sge_kstat_update()
1817 statsp->tx_udp_ip_frag = chkp->tx_udp_ip_frag.value.ui32; in sge_kstat_update()
1818 statsp->tx_soft_cksums = chkp->tx_soft_cksums.value.ui32; in sge_kstat_update()
1819 statsp->tx_need_cpl_space in sge_kstat_update()
1820 = chkp->tx_need_cpl_space.value.ui32; in sge_kstat_update()
1821 statsp->tx_multi_mblks = chkp->tx_multi_mblks.value.ui32; in sge_kstat_update()
1822 statsp->tx_no_dvma1 = chkp->tx_no_dvma1.value.ui32; in sge_kstat_update()
1823 statsp->tx_no_dvma2 = chkp->tx_no_dvma2.value.ui32; in sge_kstat_update()
1824 statsp->tx_no_dma1 = chkp->tx_no_dma1.value.ui32; in sge_kstat_update()
1825 statsp->tx_no_dma2 = chkp->tx_no_dma2.value.ui32; in sge_kstat_update()
1826 statsp->rx_cmdq0 = chkp->rx_cmdq0.value.ui32; in sge_kstat_update()
1827 statsp->rx_cmdq1 = chkp->rx_cmdq1.value.ui32; in sge_kstat_update()
1828 statsp->rx_flq0 = chkp->rx_flq0.value.ui32; in sge_kstat_update()
1829 statsp->rx_flq1 = chkp->rx_flq1.value.ui32; in sge_kstat_update()
1830 statsp->rx_flq0_sz = chkp->rx_flq0_sz.value.ui32; in sge_kstat_update()
1831 statsp->rx_flq1_sz = chkp->rx_flq1_sz.value.ui32; in sge_kstat_update()
1832 statsp->rx_pkt_drops = chkp->rx_pkt_drops.value.ui32; in sge_kstat_update()
1833 statsp->rx_pkt_copied = chkp->rx_pkt_copied.value.ui32; in sge_kstat_update()
1834 statsp->rx_pause_on = chkp->rx_pause_on.value.ui32; in sge_kstat_update()
1835 statsp->rx_pause_off = chkp->rx_pause_off.value.ui32; in sge_kstat_update()
1836 statsp->rx_pause_ms = chkp->rx_pause_ms.value.ui32; in sge_kstat_update()
1837 statsp->rx_pause_spike = chkp->rx_pause_spike.value.ui32; in sge_kstat_update()
1838 statsp->rx_fl_credits = chkp->rx_fl_credits.value.ui32; in sge_kstat_update()
1839 statsp->rx_flbuf_fails = chkp->rx_flbuf_fails.value.ui32; in sge_kstat_update()
1840 statsp->rx_flbuf_allocs = chkp->rx_flbuf_allocs.value.ui32; in sge_kstat_update()
1841 statsp->rx_badEopSop = chkp->rx_badEopSop.value.ui32; in sge_kstat_update()
1842 statsp->rx_flq0_cnt = chkp->rx_flq0_cnt.value.ui32; in sge_kstat_update()
1843 statsp->rx_flq1_cnt = chkp->rx_flq1_cnt.value.ui32; in sge_kstat_update()
1844 statsp->arp_sent = chkp->arp_sent.value.ui32; in sge_kstat_update()
1845 statsp->tx_doorbells = chkp->tx_doorbells.value.ui32; in sge_kstat_update()
1846 statsp->intr_doorbells = chkp->intr_doorbells.value.ui32; in sge_kstat_update()
1847 statsp->intr1_doorbells = chkp->intr1_doorbells.value.ui32; in sge_kstat_update()
1848 statsp->sleep_cnt = chkp->sleep_cnt.value.ui32; in sge_kstat_update()
1849 statsp->pe_allocb_cnt = chkp->pe_allocb_cnt.value.ui32; in sge_kstat_update()
1851 statsp->tx_descs[i] = chkp->tx_descs[i].value.ui32; in sge_kstat_update()
1854 chkp->respQ_empty.value.ui32 = statsp->respQ_empty; in sge_kstat_update()
1855 chkp->respQ_overflow.value.ui32 = statsp->respQ_overflow; in sge_kstat_update()
1856 chkp->freelistQ_empty.value.ui32 in sge_kstat_update()
1857 = statsp->freelistQ_empty; in sge_kstat_update()
1858 chkp->pkt_too_big.value.ui32 = statsp->pkt_too_big; in sge_kstat_update()
1859 chkp->pkt_mismatch.value.ui32 = statsp->pkt_mismatch; in sge_kstat_update()
1860 chkp->cmdQ_full[0].value.ui32 = statsp->cmdQ_full[0]; in sge_kstat_update()
1861 chkp->cmdQ_full[1].value.ui32 = statsp->cmdQ_full[1]; in sge_kstat_update()
1862 chkp->tx_reclaims[0].value.ui32 = statsp->tx_reclaims[0]; in sge_kstat_update()
1863 chkp->tx_reclaims[1].value.ui32 = statsp->tx_reclaims[1]; in sge_kstat_update()
1864 chkp->tx_msg_pullups.value.ui32 = statsp->tx_msg_pullups; in sge_kstat_update()
1865 chkp->tx_hdr_pullups.value.ui32 = statsp->tx_hdr_pullups; in sge_kstat_update()
1866 chkp->tx_tcp_ip_frag.value.ui32 = statsp->tx_tcp_ip_frag; in sge_kstat_update()
1867 chkp->tx_udp_ip_frag.value.ui32 = statsp->tx_udp_ip_frag; in sge_kstat_update()
1868 chkp->tx_soft_cksums.value.ui32 = statsp->tx_soft_cksums; in sge_kstat_update()
1869 chkp->tx_need_cpl_space.value.ui32 in sge_kstat_update()
1870 = statsp->tx_need_cpl_space; in sge_kstat_update()
1871 chkp->tx_multi_mblks.value.ui32 = statsp->tx_multi_mblks; in sge_kstat_update()
1872 chkp->tx_no_dvma1.value.ui32 = statsp->tx_no_dvma1; in sge_kstat_update()
1873 chkp->tx_no_dvma2.value.ui32 = statsp->tx_no_dvma2; in sge_kstat_update()
1874 chkp->tx_no_dma1.value.ui32 = statsp->tx_no_dma1; in sge_kstat_update()
1875 chkp->tx_no_dma2.value.ui32 = statsp->tx_no_dma2; in sge_kstat_update()
1876 chkp->rx_cmdq0.value.ui32 = statsp->rx_cmdq0; in sge_kstat_update()
1877 chkp->rx_cmdq1.value.ui32 = statsp->rx_cmdq1; in sge_kstat_update()
1878 chkp->rx_flq0.value.ui32 = statsp->rx_flq0; in sge_kstat_update()
1879 chkp->rx_flq1.value.ui32 = statsp->rx_flq1; in sge_kstat_update()
1880 chkp->rx_flq0_sz.value.ui32 = statsp->rx_flq0_sz; in sge_kstat_update()
1881 chkp->rx_flq1_sz.value.ui32 = statsp->rx_flq1_sz; in sge_kstat_update()
1882 chkp->rx_pkt_drops.value.ui32 = statsp->rx_pkt_drops; in sge_kstat_update()
1883 chkp->rx_pkt_copied.value.ui32 = statsp->rx_pkt_copied; in sge_kstat_update()
1884 chkp->rx_pause_on.value.ui32 = statsp->rx_pause_on; in sge_kstat_update()
1885 chkp->rx_pause_off.value.ui32 = statsp->rx_pause_off; in sge_kstat_update()
1886 chkp->rx_pause_ms.value.ui32 = statsp->rx_pause_ms; in sge_kstat_update()
1887 chkp->rx_pause_spike.value.ui32 = statsp->rx_pause_spike; in sge_kstat_update()
1888 chkp->rx_fl_credits.value.ui32 = statsp->rx_fl_credits; in sge_kstat_update()
1889 chkp->rx_flbuf_fails.value.ui32 in sge_kstat_update()
1890 = statsp->rx_flbuf_fails; in sge_kstat_update()
1891 chkp->rx_flbuf_allocs.value.ui32 in sge_kstat_update()
1892 = statsp->rx_flbuf_allocs; in sge_kstat_update()
1893 chkp->rx_badEopSop.value.ui32 = statsp->rx_badEopSop; in sge_kstat_update()
1894 chkp->rx_flq0_cnt.value.ui32 = statsp->rx_flq0_cnt; in sge_kstat_update()
1895 chkp->rx_flq1_cnt.value.ui32 = statsp->rx_flq1_cnt; in sge_kstat_update()
1896 chkp->arp_sent.value.ui32 = statsp->arp_sent; in sge_kstat_update()
1897 chkp->tx_doorbells.value.ui32 = statsp->tx_doorbells; in sge_kstat_update()
1898 chkp->intr_doorbells.value.ui32 = statsp->intr_doorbells; in sge_kstat_update()
1899 chkp->intr1_doorbells.value.ui32 in sge_kstat_update()
1900 = statsp->intr1_doorbells; in sge_kstat_update()
1901 chkp->sleep_cnt.value.ui32 = statsp->sleep_cnt; in sge_kstat_update()
1902 chkp->pe_allocb_cnt.value.ui32 = statsp->pe_allocb_cnt; in sge_kstat_update()
1904 chkp->tx_descs[i].value.ui32 = statsp->tx_descs[i]; in sge_kstat_update()
1918 ipha_t *ihdr = (ipha_t *)(mp->b_rptr + offset); in calc_ocsum()
1921 struct udphdr *udpp = (struct udphdr *)(mp->b_rptr + offset + iplen); in calc_ocsum()
1925 addrp = (uint8_t *)&ihdr->ipha_src; in calc_ocsum()
1929 addrp = (uint8_t *)&ihdr->ipha_dst; in calc_ocsum()
1936 (uint16_t)(dst) + (udpp->uh_ulen + htons(IPPROTO_UDP)); in calc_ocsum()
1941 sum -= 0xffff; in calc_ocsum()
1943 udpp->uh_sum = 0; in calc_ocsum()
1944 byte = mp->b_rptr + offset + iplen; in calc_ocsum()
1946 len = (mp->b_wptr - byte); in calc_ocsum()
1949 sum -= 0xffff; in calc_ocsum()
1950 mp = mp->b_cont; in calc_ocsum()
1952 byte = mp->b_rptr; in calc_ocsum()