946 	pci_regspec_t *regs;  in pci_resource_setup()  local
1032 	    "available", (caddr_t)&regs, &rlen) == DDI_SUCCESS) {  in pci_resource_setup()
1046 			switch (PCI_REG_ADDR_G(regs[i].pci_phys_hi)) {  in pci_resource_setup()
1049 				    (uint64_t)regs[i].pci_phys_low,  in pci_resource_setup()
1050 				    (uint64_t)regs[i].pci_size_low,  in pci_resource_setup()
1051 				    (regs[i].pci_phys_hi & PCI_REG_PF_M) ?  in pci_resource_setup()
1058 				    ((uint64_t)(regs[i].pci_phys_mid) << 32) |  in pci_resource_setup()
1059 				    ((uint64_t)(regs[i].pci_phys_low)),  in pci_resource_setup()
1060 				    ((uint64_t)(regs[i].pci_size_hi) << 32) |  in pci_resource_setup()
1061 				    ((uint64_t)(regs[i].pci_size_low)),  in pci_resource_setup()
1062 				    (regs[i].pci_phys_hi & PCI_REG_PF_M) ?  in pci_resource_setup()
1069 				    (uint64_t)regs[i].pci_phys_low,  in pci_resource_setup()
1070 				    (uint64_t)regs[i].pci_size_low,  in pci_resource_setup()
1079 				    PCI_REG_ADDR_G(regs[i].pci_phys_hi));  in pci_resource_setup()
1083 		kmem_free(regs, rlen);  in pci_resource_setup()
1331 	pci_regspec_t	*regs, *newregs;  in pci_get_available_prop()  local
1349 	    "available", (caddr_t)&regs, &rlen);  in pci_get_available_prop()
1364 		if (type == (regs[i].pci_phys_hi & PCI_ADDR_TYPE_MASK)) {  in pci_get_available_prop()
1367 			range_base = ((uint64_t)(regs[i].pci_phys_mid) << 32) |  in pci_get_available_prop()
1368 			    ((uint64_t)(regs[i].pci_phys_low));  in pci_get_available_prop()
1369 			range_len = ((uint64_t)(regs[i].pci_size_hi) << 32) |  in pci_get_available_prop()
1370 			    ((uint64_t)(regs[i].pci_size_low));  in pci_get_available_prop()
1394 				newregs[j].pci_phys_hi = regs[i].pci_phys_hi;  in pci_get_available_prop()
1406 				newregs[j].pci_phys_hi = regs[i].pci_phys_hi;  in pci_get_available_prop()
1423 				newregs[j] = regs[k];  in pci_get_available_prop()
1431 			newregs[j] = regs[i];  in pci_get_available_prop()
1447 		kmem_free(regs, rlen);  in pci_get_available_prop()
1470 	kmem_free(regs, rlen);  in pci_get_available_prop()
1482 	pci_regspec_t	*regs, *newregs;  in pci_put_available_prop()  local
1501 	    "available", (caddr_t)&regs, &rlen);  in pci_put_available_prop()
1526 		if (type == (regs[i].pci_phys_hi & PCI_ADDR_TYPE_MASK)) {  in pci_put_available_prop()
1529 			range_base = ((uint64_t)(regs[i].pci_phys_mid) << 32) |  in pci_put_available_prop()
1530 			    ((uint64_t)(regs[i].pci_phys_low));  in pci_put_available_prop()
1531 			range_len = ((uint64_t)(regs[i].pci_size_hi) << 32) |  in pci_put_available_prop()
1532 			    ((uint64_t)(regs[i].pci_size_low));  in pci_put_available_prop()
1608 				newregs[j].pci_phys_hi = regs[i].pci_phys_hi;  in pci_put_available_prop()
1622 				newregs[k].pci_phys_hi = regs[i].pci_phys_hi;  in pci_put_available_prop()
1633 			newregs[j] = regs[i];  in pci_put_available_prop()
1662 	kmem_free(regs, rlen);  in pci_put_available_prop()
1691 	kmem_free(regs, rlen);  in pci_put_available_prop()