182 	uint16_t regval;  in bge_cfg_clr16()  local
187 	regval = pci_config_get16(bgep->cfg_handle, regno);  in bge_cfg_clr16()
190 	    (void *)bgep, regno, bits, regval, regval & ~bits));  in bge_cfg_clr16()
192 	regval &= ~bits;  in bge_cfg_clr16()
193 	pci_config_put16(bgep->cfg_handle, regno, regval);  in bge_cfg_clr16()
204 	uint32_t regval;  in bge_cfg_clr32()  local
209 	regval = pci_config_get32(bgep->cfg_handle, regno);  in bge_cfg_clr32()
212 	    (void *)bgep, regno, bits, regval, regval & ~bits));  in bge_cfg_clr32()
214 	regval &= ~bits;  in bge_cfg_clr32()
215 	pci_config_put32(bgep->cfg_handle, regno, regval);  in bge_cfg_clr32()
638 	uint32_t regval;  in bge_reg_set32()  local
643 	regval = bge_reg_get32(bgep, regno);  in bge_reg_set32()
644 	regval |= bits;  in bge_reg_set32()
645 	bge_reg_put32(bgep, regno, regval);  in bge_reg_set32()
654 	uint32_t regval;  in bge_reg_clr32()  local
659 	regval = bge_reg_get32(bgep, regno);  in bge_reg_clr32()
660 	regval &= ~bits;  in bge_reg_clr32()
661 	bge_reg_put32(bgep, regno, regval);  in bge_reg_clr32()
670 	uint64_t regval;  in bge_reg_get64()  local
678 		regval = ddi_get32(bgep->io_handle, PIO_ADDR(bgep, regno + 4));  in bge_reg_get64()
679 		regval <<= 32;  in bge_reg_get64()
680 		regval |= ddi_get32(bgep->io_handle, PIO_ADDR(bgep, regno));  in bge_reg_get64()
682 		regval = ddi_get64(bgep->io_handle, PIO_ADDR(bgep, regno));  in bge_reg_get64()
689 		regval = ddi_get32(bgep->io_handle, PIO_ADDR(bgep, regno));  in bge_reg_get64()
690 		regval <<= 32;  in bge_reg_get64()
691 		regval |= ddi_get32(bgep->io_handle, PIO_ADDR(bgep, regno + 4));  in bge_reg_get64()
693 		regval = ddi_get64(bgep->io_handle, PIO_ADDR(bgep, regno));  in bge_reg_get64()
696 	regval = ddi_get64(bgep->io_handle, PIO_ADDR(bgep, regno));  in bge_reg_get64()
700 	regval = (regval >> 32) | (regval << 32);  in bge_reg_get64()
704 	    (void *)bgep, regno, regval));  in bge_reg_get64()
706 	return (regval);  in bge_reg_get64()
1378 	uint32_t regval;  in bge_seeprom_access()  local
1417 	regval = bge_reg_get32(bgep, SERIAL_EEPROM_ADDRESS_REG);  in bge_seeprom_access()
1418 	if (regval & SEEPROM_ACCESS_START)  in bge_seeprom_access()
1420 	if (regval & SEEPROM_ACCESS_COMPLETE)  in bge_seeprom_access()
1432 	cmd |= regval & SEEPROM_ACCESS_HALFCLOCK_MASK;  in bge_seeprom_access()
1446 		regval = bge_reg_get32(bgep, SERIAL_EEPROM_ADDRESS_REG);  in bge_seeprom_access()
1447 		if (regval & SEEPROM_ACCESS_COMPLETE)  in bge_seeprom_access()
1452 	if (regval & SEEPROM_ACCESS_COMPLETE) {  in bge_seeprom_access()
1461 		bge_reg_put32(bgep, SERIAL_EEPROM_ADDRESS_REG, regval);  in bge_seeprom_access()
1505 	uint32_t regval;  in bge_flash_access()  local
1548 		regval = bge_reg_get32(bgep, NVM_FLASH_CMD_REG);  in bge_flash_access()
1549 		if (regval & NVM_FLASH_CMD_DONE)  in bge_flash_access()
1554 	if (regval & NVM_FLASH_CMD_DONE) {  in bge_flash_access()
1659 	uint32_t regval;  in bge_nvmem_acquire()  local
1716 	regval = bge_reg_get32(bgep, NVM_SW_ARBITRATION_REG);  in bge_nvmem_acquire()
1720 		regval = bge_reg_get32(bgep, NVM_SW_ARBITRATION_REG);  in bge_nvmem_acquire()
1721 		if (regval & NVM_WON_REQ1)  in bge_nvmem_acquire()
1726 	if (regval & NVM_WON_REQ1) {  in bge_nvmem_acquire()
1767 	uint32_t regval;  in bge_nvmem_protect()  local
1771 	regval = bge_reg_get32(bgep, MISC_LOCAL_CONTROL_REG);  in bge_nvmem_protect()
1773 		regval |= MLCR_MISC_PINS_OUTPUT_1;  in bge_nvmem_protect()
1774 		regval &= ~MLCR_MISC_PINS_OUTPUT_ENABLE_1;  in bge_nvmem_protect()
1776 		regval &= ~MLCR_MISC_PINS_OUTPUT_1;  in bge_nvmem_protect()
1777 		regval |= MLCR_MISC_PINS_OUTPUT_ENABLE_1;  in bge_nvmem_protect()
1779 	bge_reg_put32(bgep, MISC_LOCAL_CONTROL_REG, regval);  in bge_nvmem_protect()
3177 	uint32_t	regval;  in bge_chip_msi_trig()  local
3179 	regval = bgep->param_msi_cnt<<4;  in bge_chip_msi_trig()
3180 	bge_reg_set32(bgep, HOST_COALESCE_MODE_REG, regval);  in bge_chip_msi_trig()
3181 	BGE_DEBUG(("bge_chip_msi_trig:data = %d", regval));  in bge_chip_msi_trig()
3212 	uint32_t regval;  in bge_chip_poll_engine()  local
3219 		regval = bge_reg_get32(bgep, regno);  in bge_chip_poll_engine()
3220 		if ((regval & mask) == val)  in bge_chip_poll_engine()
3252 	uint32_t regval;  in bge_chip_reset_engine()  local
3257 	regval = bge_reg_get32(bgep, regno);  in bge_chip_reset_engine()
3262 	    regno, regval));  in bge_chip_reset_engine()
3264 	regval |= STATE_MACHINE_RESET_BIT;  in bge_chip_reset_engine()
3283 			regval |= MISC_CONFIG_GPHY_POWERDOWN_OVERRIDE;  in bge_chip_reset_engine()
3307 				regval |= MISC_CONFIG_GRC_RESET_DISABLE;  in bge_chip_reset_engine()
3322 		ddi_put32(bgep->io_handle, PIO_ADDR(bgep, regno), regval);  in bge_chip_reset_engine()
3385 		bge_reg_put32(bgep, regno, regval);  in bge_chip_reset_engine()
3408 	uint32_t regval;  in bge_chip_disable_engine()  local
3450 	regval = bge_reg_get32(bgep, regno);  in bge_chip_disable_engine()
3451 	regval &= ~STATE_MACHINE_ENABLE_BIT;  in bge_chip_disable_engine()
3452 	regval &= ~morebits;  in bge_chip_disable_engine()
3453 	bge_reg_put32(bgep, regno, regval);  in bge_chip_disable_engine()
3475 	uint32_t regval;  in bge_chip_enable_engine()  local
3499 		regval = bge_reg_get32(bgep, regno);  in bge_chip_enable_engine()
3500 		regval |= STATE_MACHINE_ENABLE_BIT;  in bge_chip_enable_engine()
3501 		regval |= morebits;  in bge_chip_enable_engine()
3502 		bge_reg_put32(bgep, regno, regval);  in bge_chip_enable_engine()
3519 	uint32_t regval;  in bge_sync_mac_modes()  local
3526 	macmode = regval = bge_reg_get32(bgep, ETHERNET_MAC_MODE_REG);  in bge_sync_mac_modes()
3553 	    (void *)bgep, regval, macmode));  in bge_sync_mac_modes()
3558 	macmode = regval = bge_reg_get32(bgep, TRANSMIT_MAC_MODE_REG);  in bge_sync_mac_modes()
3565 	    (void *)bgep, regval, macmode));  in bge_sync_mac_modes()
3570 	macmode = regval = bge_reg_get32(bgep, RECEIVE_MAC_MODE_REG);  in bge_sync_mac_modes()
3577 	    (void *)bgep, regval, macmode));  in bge_sync_mac_modes()
4377 	uint32_t regval;  in bge_chip_start()  local
4396 		regval = pci_config_get32(bgep->cfg_handle,  in bge_chip_start()
4398 		regval |= PCISTATE_ALLOW_APE_CTLSPC_WR |  in bge_chip_start()
4401 		    PCI_CONF_BGE_PCISTATE, regval);  in bge_chip_start()
4444 		regval = bge_reg_get32(bgep, reg);  in bge_chip_start()
4448 			regval &= ~(RDMA_RSRV_CTRL_TXMRGN_MASK |  in bge_chip_start()
4451 			regval |= (RDMA_RSRV_CTRL_TXMRGN_320B |  in bge_chip_start()
4457 		    (regval | RDMA_RSRV_CTRL_FIFO_OFLW_FIX));  in bge_chip_start()
4464 			regval = bge_reg_get32(bgep, reg);  in bge_chip_start()
4465 			bge_reg_put32(bgep, reg, (regval |  in bge_chip_start()
4487 	regval = bge_reg_get32(bgep, MISC_CONFIG_REG);  in bge_chip_start()
4488 	regval = (regval & 0xffffff00) | MISC_CONFIG_DEFAULT;  in bge_chip_start()
4489 	bge_reg_put32(bgep, MISC_CONFIG_REG, regval);  in bge_chip_start()
4543 	regval = STATE_MACHINE_ATTN_ENABLE_BIT;  in bge_chip_start()
4545 		regval |= BUFFER_MANAGER_MODE_NO_TX_UNDERRUN;  in bge_chip_start()
4549 		regval |= BUFFER_MANAGER_MODE_MBLOW_ATTN_ENABLE;  in bge_chip_start()
4550 	if (!bge_chip_enable_engine(bgep, BUFFER_MANAGER_MODE_REG, regval))  in bge_chip_start()
4756 			regval = bge_reg_get32(bgep, RDMA_CORR_CTRL_REG);  in bge_chip_start()
4757 			regval |= RDMA_CORR_CTRL_TX_LENGTH_WA;  in bge_chip_start()
4758 			bge_reg_put32(bgep, RDMA_CORR_CTRL_REG, regval);  in bge_chip_start()
4897 	regval = 0;  in bge_chip_start()
4900 		regval |= TRANSMIT_MODE_MBUF_LOCKUP_FIX;  in bge_chip_start()
4902 	if (!bge_chip_enable_engine(bgep, TRANSMIT_MAC_MODE_REG, regval))  in bge_chip_start()
5153 	uint32_t regval;  in bge_intr()  local
5177 		regval = bge_reg_get32(bgep, MISC_LOCAL_CONTROL_REG);  in bge_intr()
5181 		    (regval & MLCR_INTA_STATE)) {  in bge_intr()
5199 		regval = bge_reg_get32(bgep, MSI_STATUS_REG);  in bge_intr()
5200 		if (regval & MSI_ERROR_ATTENTION) {  in bge_intr()
5202 			    " status=0x%x", regval));  in bge_intr()
5203 			bge_reg_put32(bgep, MSI_STATUS_REG, regval);  in bge_intr()
5209 	BGE_DEBUG(("bge_intr($%p) ($%p) regval 0x%08x", arg1, arg2, regval));  in bge_intr()
5602 	uint32_t regval;  in bge_chip_cyclic()  local
5638 			regval = bge_reg_get32(bgep, RDMA_CORR_CTRL_REG);  in bge_chip_cyclic()
5639 			regval &= ~RDMA_CORR_CTRL_TX_LENGTH_WA;  in bge_chip_cyclic()
5640 			bge_reg_put32(bgep, RDMA_CORR_CTRL_REG, regval);  in bge_chip_cyclic()
5667 	uint64_t regval;  in bge_chip_peek_cfg()  local
5677 		regval = pci_config_get8(bgep->cfg_handle, regno);  in bge_chip_peek_cfg()
5681 		regval = pci_config_get16(bgep->cfg_handle, regno);  in bge_chip_peek_cfg()
5685 		regval = pci_config_get32(bgep->cfg_handle, regno);  in bge_chip_peek_cfg()
5689 		regval = pci_config_get64(bgep->cfg_handle, regno);  in bge_chip_peek_cfg()
5693 	ppd->pp_acc_data = regval;  in bge_chip_peek_cfg()
5702 	uint64_t regval;  in bge_chip_poke_cfg()  local
5709 	regval = ppd->pp_acc_data;  in bge_chip_poke_cfg()
5713 		pci_config_put8(bgep->cfg_handle, regno, regval);  in bge_chip_poke_cfg()
5717 		pci_config_put16(bgep->cfg_handle, regno, regval);  in bge_chip_poke_cfg()
5721 		pci_config_put32(bgep->cfg_handle, regno, regval);  in bge_chip_poke_cfg()
5725 		pci_config_put64(bgep->cfg_handle, regno, regval);  in bge_chip_poke_cfg()
5736 	uint64_t regval;  in bge_chip_peek_reg()  local
5746 		regval = ddi_get8(bgep->io_handle, regaddr);  in bge_chip_peek_reg()
5750 		regval = ddi_get16(bgep->io_handle, regaddr);  in bge_chip_peek_reg()
5754 		regval = ddi_get32(bgep->io_handle, regaddr);  in bge_chip_peek_reg()
5758 		regval = ddi_get64(bgep->io_handle, regaddr);  in bge_chip_peek_reg()
5762 	ppd->pp_acc_data = regval;  in bge_chip_peek_reg()
5771 	uint64_t regval;  in bge_chip_poke_reg()  local
5778 	regval = ppd->pp_acc_data;  in bge_chip_poke_reg()
5782 		ddi_put8(bgep->io_handle, regaddr, regval);  in bge_chip_poke_reg()
5786 		ddi_put16(bgep->io_handle, regaddr, regval);  in bge_chip_poke_reg()
5790 		ddi_put32(bgep->io_handle, regaddr, regval);  in bge_chip_poke_reg()
5794 		ddi_put64(bgep->io_handle, regaddr, regval);  in bge_chip_poke_reg()
5807 	uint64_t regval;  in bge_chip_peek_nic()  local
5821 		regval = ddi_get8(bgep->io_handle, regaddr);  in bge_chip_peek_nic()
5825 		regval = ddi_get16(bgep->io_handle, regaddr);  in bge_chip_peek_nic()
5829 		regval = ddi_get32(bgep->io_handle, regaddr);  in bge_chip_peek_nic()
5833 		regval = ddi_get64(bgep->io_handle, regaddr);  in bge_chip_peek_nic()
5837 	ppd->pp_acc_data = regval;  in bge_chip_peek_nic()
5847 	uint64_t regval;  in bge_chip_poke_nic()  local
5858 	regval = ppd->pp_acc_data;  in bge_chip_poke_nic()
5862 		ddi_put8(bgep->io_handle, regaddr, regval);  in bge_chip_poke_nic()
5866 		ddi_put16(bgep->io_handle, regaddr, regval);  in bge_chip_poke_nic()
5870 		ddi_put32(bgep->io_handle, regaddr, regval);  in bge_chip_poke_nic()
5874 		ddi_put64(bgep->io_handle, regaddr, regval);  in bge_chip_poke_nic()
5979 	uint64_t regval;  in bge_chip_peek_mem()  local
5989 		regval = *(uint8_t *)vaddr;  in bge_chip_peek_mem()
5993 		regval = *(uint16_t *)vaddr;  in bge_chip_peek_mem()
5997 		regval = *(uint32_t *)vaddr;  in bge_chip_peek_mem()
6001 		regval = *(uint64_t *)vaddr;  in bge_chip_peek_mem()
6006 	    (void *)bgep, (void *)ppd, regval, vaddr));  in bge_chip_peek_mem()
6008 	ppd->pp_acc_data = regval;  in bge_chip_peek_mem()
6017 	uint64_t regval;  in bge_chip_poke_mem()  local
6024 	regval = ppd->pp_acc_data;  in bge_chip_poke_mem()
6027 	    (void *)bgep, (void *)ppd, regval, vaddr));  in bge_chip_poke_mem()
6031 		*(uint8_t *)vaddr = (uint8_t)regval;  in bge_chip_poke_mem()
6035 		*(uint16_t *)vaddr = (uint16_t)regval;  in bge_chip_poke_mem()
6039 		*(uint32_t *)vaddr = (uint32_t)regval;  in bge_chip_poke_mem()
6043 		*(uint64_t *)vaddr = (uint64_t)regval;  in bge_chip_poke_mem()