Lines Matching refs:sc
252 struct arn_softc *sc = ah->ah_sc; in arn_iowrite32() local
254 mutex_enter(&sc->sc_serial_rw); in arn_iowrite32()
255 ddi_put32(sc->sc_io_handle, in arn_iowrite32()
256 (uint32_t *)((uintptr_t)(sc->mem) + (reg_offset)), val); in arn_iowrite32()
257 mutex_exit(&sc->sc_serial_rw); in arn_iowrite32()
259 ddi_put32(sc->sc_io_handle, in arn_iowrite32()
260 (uint32_t *)((uintptr_t)(sc->mem) + (reg_offset)), val); in arn_iowrite32()
268 struct arn_softc *sc = ah->ah_sc; in arn_ioread32() local
270 mutex_enter(&sc->sc_serial_rw); in arn_ioread32()
271 val = ddi_get32(sc->sc_io_handle, in arn_ioread32()
272 (uint32_t *)((uintptr_t)(sc->mem) + (reg_offset))); in arn_ioread32()
273 mutex_exit(&sc->sc_serial_rw); in arn_ioread32()
275 val = ddi_get32(sc->sc_io_handle, in arn_ioread32()
276 (uint32_t *)((uintptr_t)(sc->mem) + (reg_offset))); in arn_ioread32()
349 struct arn_softc *sc, in arn_buflist_setup() argument
365 bf->bf_daddr = sc->sc_desc_dma.cookie.dmac_address + in arn_buflist_setup()
366 ((uintptr_t)ds - (uintptr_t)sc->sc_desc); in arn_buflist_setup()
412 arn_desc_free(struct arn_softc *sc) in arn_desc_free() argument
414 arn_buflist_cleanup(&sc->sc_txbuf_list); in arn_desc_free()
415 arn_buflist_cleanup(&sc->sc_rxbuf_list); in arn_desc_free()
417 arn_buflist_cleanup(&sc->sc_bcbuf_list); in arn_desc_free()
421 arn_free_dma_mem(&sc->sc_desc_dma); in arn_desc_free()
423 kmem_free((void *)sc->sc_vbufptr, sc->sc_vbuflen); in arn_desc_free()
424 sc->sc_vbufptr = NULL; in arn_desc_free()
428 arn_desc_alloc(dev_info_t *devinfo, struct arn_softc *sc) in arn_desc_alloc() argument
443 DDI_DMA_RDWR | DDI_DMA_CONSISTENT, &sc->sc_desc_dma); in arn_desc_alloc()
446 sc->sc_desc = (struct ath_desc *)sc->sc_desc_dma.mem_va; in arn_desc_alloc()
448 ds = sc->sc_desc; in arn_desc_alloc()
451 sc->sc_desc, sc->sc_desc_dma.alength, in arn_desc_alloc()
452 sc->sc_desc_dma.cookie.dmac_address)); in arn_desc_alloc()
456 sc->sc_vbuflen = sizeof (struct ath_buf) * (ATH_TXBUF + ATH_RXBUF + in arn_desc_alloc()
459 sc->sc_vbuflen = sizeof (struct ath_buf) * (ATH_TXBUF + ATH_RXBUF); in arn_desc_alloc()
461 bf = (struct ath_buf *)kmem_zalloc(sc->sc_vbuflen, KM_SLEEP); in arn_desc_alloc()
462 sc->sc_vbufptr = bf; in arn_desc_alloc()
466 sc->tx_dmabuf_size = in arn_desc_alloc()
468 min(sc->sc_cachelsz, (uint16_t)64)); in arn_desc_alloc()
470 sc->tx_dmabuf_size = in arn_desc_alloc()
471 roundup(IEEE80211_MAX_MPDU_LEN, min(sc->sc_cachelsz, (uint16_t)64)); in arn_desc_alloc()
473 sc->rx_dmabuf_size = in arn_desc_alloc()
474 roundup(IEEE80211_MAX_MPDU_LEN, min(sc->sc_cachelsz, (uint16_t)64)); in arn_desc_alloc()
477 err = arn_buflist_setup(devinfo, sc, &sc->sc_rxbuf_list, &bf, &ds, in arn_desc_alloc()
478 ATH_RXBUF, DDI_DMA_READ | DDI_DMA_STREAMING, sc->rx_dmabuf_size); in arn_desc_alloc()
480 arn_desc_free(sc); in arn_desc_alloc()
485 err = arn_buflist_setup(devinfo, sc, &sc->sc_txbuf_list, &bf, &ds, in arn_desc_alloc()
486 ATH_TXBUF, DDI_DMA_STREAMING, sc->tx_dmabuf_size); in arn_desc_alloc()
488 arn_desc_free(sc); in arn_desc_alloc()
494 err = arn_buflist_setup(devinfo, sc, &sc->sc_bcbuf_list, &bf, &ds, in arn_desc_alloc()
497 arn_desc_free(sc); in arn_desc_alloc()
506 arn_setcurmode(struct arn_softc *sc, enum wireless_mode mode) in arn_setcurmode() argument
511 for (i = 0; i < sizeof (sc->asc_rixmap); i++) in arn_setcurmode()
512 sc->asc_rixmap[i] = 0xff; in arn_setcurmode()
514 rt = sc->hw_rate_table[mode]; in arn_setcurmode()
518 sc->asc_rixmap[rt->info[i].dot11rate & in arn_setcurmode()
521 sc->sc_currates = rt; in arn_setcurmode()
522 sc->sc_curmode = mode; in arn_setcurmode()
529 sc->sc_protrix = (mode == ATH9K_MODE_11G ? 1 : 0); in arn_setcurmode()
558 arn_update_txpow(struct arn_softc *sc) in arn_update_txpow() argument
560 struct ath_hal *ah = sc->sc_ah; in arn_update_txpow()
563 if (sc->sc_curtxpow != sc->sc_config.txpowlimit) { in arn_update_txpow()
564 (void) ath9k_hw_set_txpowerlimit(ah, sc->sc_config.txpowlimit); in arn_update_txpow()
567 sc->sc_curtxpow = (uint32_t)txpow; in arn_update_txpow()
610 arn_setup_rates(struct arn_softc *sc, uint32_t mode) in arn_setup_rates() argument
615 ieee80211com_t *ic = (ieee80211com_t *)sc; in arn_setup_rates()
620 rate_table = sc->hw_rate_table[ATH9K_MODE_11A]; in arn_setup_rates()
623 rate_table = sc->hw_rate_table[ATH9K_MODE_11B]; in arn_setup_rates()
626 rate_table = sc->hw_rate_table[ATH9K_MODE_11G]; in arn_setup_rates()
630 rate_table = sc->hw_rate_table[ATH9K_MODE_11NA_HT20]; in arn_setup_rates()
633 rate_table = sc->hw_rate_table[ATH9K_MODE_11NG_HT20]; in arn_setup_rates()
636 rate_table = sc->hw_rate_table[ATH9K_MODE_11NA_HT40PLUS]; in arn_setup_rates()
639 rate_table = sc->hw_rate_table[ATH9K_MODE_11NA_HT40MINUS]; in arn_setup_rates()
642 rate_table = sc->hw_rate_table[ATH9K_MODE_11NG_HT40PLUS]; in arn_setup_rates()
645 rate_table = sc->hw_rate_table[ATH9K_MODE_11NG_HT40MINUS]; in arn_setup_rates()
676 arn_setup_channels(struct arn_softc *sc) in arn_setup_channels() argument
678 struct ath_hal *ah = sc->sc_ah; in arn_setup_channels()
679 ieee80211com_t *ic = (ieee80211com_t *)sc; in arn_setup_channels()
743 sc->sc_have11g = 1; in arn_setup_channels()
801 arn_chan_change(struct arn_softc *sc, struct ieee80211_channel *chan) in arn_chan_change() argument
803 struct ieee80211com *ic = &sc->sc_isc; in arn_chan_change()
825 if (wlmode != sc->sc_curmode) in arn_chan_change()
826 arn_setcurmode(sc, wlmode); in arn_chan_change()
836 arn_set_channel(struct arn_softc *sc, struct ath9k_channel *hchan) in arn_set_channel() argument
838 struct ath_hal *ah = sc->sc_ah; in arn_set_channel()
839 ieee80211com_t *ic = &sc->sc_isc; in arn_set_channel()
845 if (sc->sc_flags & SC_OP_INVALID) in arn_set_channel()
848 if (hchan->channel != sc->sc_ah->ah_curchan->channel || in arn_set_channel()
849 hchan->channelFlags != sc->sc_ah->ah_curchan->channelFlags || in arn_set_channel()
850 (sc->sc_flags & SC_OP_CHAINMASK_UPDATE) || in arn_set_channel()
851 (sc->sc_flags & SC_OP_FULL_RESET)) { in arn_set_channel()
864 arn_draintxq(sc, B_FALSE); /* clear pending tx frames */ in arn_set_channel()
865 stopped = arn_stoprecv(sc); /* turn off frame recv */ in arn_set_channel()
873 if (!stopped || (sc->sc_flags & SC_OP_FULL_RESET)) in arn_set_channel()
878 sc->sc_ah->ah_curchan->channel, in arn_set_channel()
879 hchan->channel, hchan->channelFlags, sc->tx_chan_width)); in arn_set_channel()
881 if (!ath9k_hw_reset(ah, hchan, sc->tx_chan_width, in arn_set_channel()
882 sc->sc_tx_chainmask, sc->sc_rx_chainmask, in arn_set_channel()
883 sc->sc_ht_extprotspacing, fastcc, &status)) { in arn_set_channel()
893 sc->sc_curchan = *hchan; in arn_set_channel()
895 sc->sc_flags &= ~SC_OP_CHAINMASK_UPDATE; in arn_set_channel()
896 sc->sc_flags &= ~SC_OP_FULL_RESET; in arn_set_channel()
898 if (arn_startrecv(sc) != 0) { in arn_set_channel()
913 if (curmode != sc->sc_curmode) in arn_set_channel()
914 arn_setcurmode(sc, arn_chan2mode(hchan)); in arn_set_channel()
916 arn_update_txpow(sc); in arn_set_channel()
918 (void) ath9k_hw_set_interrupts(ah, sc->sc_imask); in arn_set_channel()
935 struct arn_softc *sc = (struct arn_softc *)ic; in arn_ani_calibrate() local
936 struct ath_hal *ah = sc->sc_ah; in arn_ani_calibrate()
951 if ((timestamp - sc->sc_ani.sc_longcal_timer) >= ATH_LONG_CALINTERVAL) { in arn_ani_calibrate()
955 sc->sc_ani.sc_longcal_timer = timestamp; in arn_ani_calibrate()
959 if (!sc->sc_ani.sc_caldone) { in arn_ani_calibrate()
960 if ((timestamp - sc->sc_ani.sc_shortcal_timer) >= in arn_ani_calibrate()
966 sc->sc_ani.sc_shortcal_timer = timestamp; in arn_ani_calibrate()
967 sc->sc_ani.sc_resetcal_timer = timestamp; in arn_ani_calibrate()
970 if ((timestamp - sc->sc_ani.sc_resetcal_timer) >= in arn_ani_calibrate()
973 &sc->sc_ani.sc_caldone); in arn_ani_calibrate()
974 if (sc->sc_ani.sc_caldone) in arn_ani_calibrate()
975 sc->sc_ani.sc_resetcal_timer = timestamp; in arn_ani_calibrate()
980 if ((timestamp - sc->sc_ani.sc_checkani_timer) >= in arn_ani_calibrate()
983 sc->sc_ani.sc_checkani_timer = timestamp; in arn_ani_calibrate()
990 ath9k_hw_ani_monitor(ah, &sc->sc_halstats, in arn_ani_calibrate()
998 sc->sc_rx_chainmask, longcal, &iscaldone)) { in arn_ani_calibrate()
1000 sc->sc_ani.sc_noise_floor = in arn_ani_calibrate()
1009 sc->sc_ani.sc_noise_floor)); in arn_ani_calibrate()
1017 sc->sc_ani.sc_caldone = iscaldone; in arn_ani_calibrate()
1028 if (sc->sc_ah->ah_config.enable_ani) in arn_ani_calibrate()
1032 if (!sc->sc_ani.sc_caldone) in arn_ani_calibrate()
1036 sc->sc_scan_timer = 0; in arn_ani_calibrate()
1037 sc->sc_scan_timer = timeout(arn_ani_calibrate, (void *)sc, in arn_ani_calibrate()
1042 arn_stop_caltimer(struct arn_softc *sc) in arn_stop_caltimer() argument
1046 while ((sc->sc_cal_timer != 0) && (tmp_id != sc->sc_cal_timer)) { in arn_stop_caltimer()
1047 tmp_id = sc->sc_cal_timer; in arn_stop_caltimer()
1050 sc->sc_cal_timer = 0; in arn_stop_caltimer()
1057 struct arn_softc *sc = (struct arn_softc *)arg; in arn_isr() local
1058 struct ath_hal *ah = sc->sc_ah; in arn_isr()
1060 ieee80211com_t *ic = (ieee80211com_t *)sc; in arn_isr()
1062 ARN_LOCK(sc); in arn_isr()
1064 if (sc->sc_flags & SC_OP_INVALID) { in arn_isr()
1070 ARN_UNLOCK(sc); in arn_isr()
1074 ARN_UNLOCK(sc); in arn_isr()
1086 status &= sc->sc_imask; /* discard unasked-for bits */ in arn_isr()
1093 ARN_UNLOCK(sc); in arn_isr()
1097 sc->sc_intrstatus = status; in arn_isr()
1118 sc->sc_rxlink = NULL; in arn_isr()
1130 sc->sc_rx_pend = 1; in arn_isr()
1131 ddi_trigger_softintr(sc->sc_softint_id); in arn_isr()
1136 if (ddi_taskq_dispatch(sc->sc_tq, in arn_isr()
1137 arn_tx_int_proc, sc, DDI_NOSLEEP) != in arn_isr()
1156 ath9k_hw_procmibevent(ah, &sc->sc_halstats); in arn_isr()
1157 (void) ath9k_hw_set_interrupts(ah, sc->sc_imask); in arn_isr()
1185 if (ddi_taskq_dispatch(sc->sc_tq, arn_bmiss_proc, in arn_isr()
1186 sc, DDI_NOSLEEP) != DDI_SUCCESS) { in arn_isr()
1196 ARN_UNLOCK(sc); in arn_isr()
1219 ARN_UNLOCK(sc); in arn_isr()
1224 arn_get_channel(struct arn_softc *sc, struct ieee80211_channel *chan) in arn_get_channel() argument
1228 for (i = 0; i < sc->sc_ah->ah_nchan; i++) { in arn_get_channel()
1229 if (sc->sc_ah->ah_channels[i].channel == chan->ich_freq) in arn_get_channel()
1239 struct arn_softc *sc = (struct arn_softc *)ic; in arn_reset() local
1240 struct ath_hal *ah = sc->sc_ah; in arn_reset()
1245 arn_draintxq(sc, 0); in arn_reset()
1246 (void) arn_stoprecv(sc); in arn_reset()
1248 if (!ath9k_hw_reset(ah, sc->sc_ah->ah_curchan, sc->tx_chan_width, in arn_reset()
1249 sc->sc_tx_chainmask, sc->sc_rx_chainmask, in arn_reset()
1250 sc->sc_ht_extprotspacing, B_FALSE, &status)) { in arn_reset()
1256 if (arn_startrecv(sc) != 0) in arn_reset()
1265 arn_setcurmode(sc, arn_chan2mode(sc->sc_ah->ah_curchan)); in arn_reset()
1267 arn_update_txpow(sc); in arn_reset()
1269 if (sc->sc_flags & SC_OP_BEACONS) in arn_reset()
1270 arn_beacon_config(sc); /* restart beacons */ in arn_reset()
1272 (void) ath9k_hw_set_interrupts(ah, sc->sc_imask); in arn_reset()
1278 arn_get_hal_qnum(uint16_t queue, struct arn_softc *sc) in arn_get_hal_qnum() argument
1284 qnum = sc->sc_haltype2q[ATH9K_WME_AC_VO]; in arn_get_hal_qnum()
1287 qnum = sc->sc_haltype2q[ATH9K_WME_AC_VI]; in arn_get_hal_qnum()
1290 qnum = sc->sc_haltype2q[ATH9K_WME_AC_BE]; in arn_get_hal_qnum()
1293 qnum = sc->sc_haltype2q[ATH9K_WME_AC_BK]; in arn_get_hal_qnum()
1296 qnum = sc->sc_haltype2q[ATH9K_WME_AC_BE]; in arn_get_hal_qnum()
1366 struct arn_softc *sc = (struct arn_softc *)ic; in arn_next_scan() local
1368 sc->sc_scan_timer = 0; in arn_next_scan()
1370 sc->sc_scan_timer = timeout(arn_next_scan, (void *)sc, in arn_next_scan()
1377 arn_stop_scantimer(struct arn_softc *sc) in arn_stop_scantimer() argument
1381 while ((sc->sc_scan_timer != 0) && (tmp_id != sc->sc_scan_timer)) { in arn_stop_scantimer()
1382 tmp_id = sc->sc_scan_timer; in arn_stop_scantimer()
1385 sc->sc_scan_timer = 0; in arn_stop_scantimer()
1391 struct arn_softc *sc = (struct arn_softc *)ic; in arn_newstate() local
1392 struct ath_hal *ah = sc->sc_ah; in arn_newstate()
1403 if (sc->sc_flags & SC_OP_INVALID) in arn_newstate()
1410 ARN_LOCK(sc); in arn_newstate()
1413 arn_stop_scantimer(sc); in arn_newstate()
1415 arn_stop_caltimer(sc); in arn_newstate()
1420 sc->sc_imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS); in arn_newstate()
1425 (ah, sc->sc_imask &~ ATH9K_INT_GLOBAL); in arn_newstate()
1429 (void) ath9k_hw_stoptxdma(ah, sc->sc_beaconq); in arn_newstate()
1430 arn_beacon_return(sc); in arn_newstate()
1433 ARN_UNLOCK(sc); in arn_newstate()
1439 pos = arn_get_channel(sc, ic->ic_curchan); in arn_newstate()
1445 ARN_UNLOCK(sc); in arn_newstate()
1450 arn_update_chainmask(sc); in arn_newstate()
1451 sc->tx_chan_width = ATH9K_HT_MACMODE_2040; in arn_newstate()
1453 sc->tx_chan_width = ATH9K_HT_MACMODE_20; in arn_newstate()
1455 sc->sc_ah->ah_channels[pos].chanmode = in arn_newstate()
1457 channel = &sc->sc_ah->ah_channels[pos]; in arn_newstate()
1460 ARN_UNLOCK(sc); in arn_newstate()
1463 error = arn_set_channel(sc, channel); in arn_newstate()
1466 ARN_UNLOCK(sc); in arn_newstate()
1476 rfilt = arn_calcrxfilter(sc); in arn_newstate()
1507 (void) ath9k_hw_stoptxdma(ah, sc->sc_beaconq); in arn_newstate()
1508 arn_beacon_return(sc); in arn_newstate()
1509 error = arn_beacon_alloc(sc, in); in arn_newstate()
1511 ARN_UNLOCK(sc); in arn_newstate()
1522 sc->sc_bsync = 1; in arn_newstate()
1524 arn_beacon_config(sc); in arn_newstate()
1536 sc->sc_bsync = 1; in arn_newstate()
1539 arn_beacon_config(sc); in arn_newstate()
1541 sc->sc_halstats.ns_avgbrssi = in arn_newstate()
1543 sc->sc_halstats.ns_avgrssi = in arn_newstate()
1545 sc->sc_halstats.ns_avgtxrssi = in arn_newstate()
1547 sc->sc_halstats.ns_avgtxrate = in arn_newstate()
1558 sc->sc_imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS); in arn_newstate()
1559 (void) ath9k_hw_set_interrupts(ah, sc->sc_imask); in arn_newstate()
1565 arn_rate_ctl_reset(sc, nstate); in arn_newstate()
1567 ARN_UNLOCK(sc); in arn_newstate()
1572 error = sc->sc_newstate(ic, nstate, arg); in arn_newstate()
1579 ASSERT(sc->sc_cal_timer == 0); in arn_newstate()
1580 sc->sc_cal_timer = timeout(arn_ani_calibrate, (void *)sc, in arn_newstate()
1585 if (sc->sc_scan_timer != 0) { in arn_newstate()
1586 (void) untimeout(sc->sc_scan_timer); in arn_newstate()
1587 sc->sc_scan_timer = 0; in arn_newstate()
1589 sc->sc_scan_timer = timeout(arn_next_scan, (void *)sc, in arn_newstate()
1600 struct arn_softc *sc = arg; in arn_watchdog() local
1601 ieee80211com_t *ic = &sc->sc_isc; in arn_watchdog()
1604 ARN_LOCK(sc); in arn_watchdog()
1606 if (sc->sc_flags & SC_OP_INVALID) { in arn_watchdog()
1607 ARN_UNLOCK(sc); in arn_watchdog()
1618 sc->sc_stats.ast_rate_calls ++; in arn_watchdog()
1623 arn_rate_ctl, sc); in arn_watchdog()
1635 ARN_UNLOCK(sc); in arn_watchdog()
1643 ARN_UNLOCK(sc); in arn_watchdog()
1656 struct arn_softc *sc = (struct arn_softc *)ic; in arn_node_alloc() local
1663 arn_rate_update(sc, &an->an_node, 0); in arn_node_alloc()
1667 if (sc->sc_flags & SC_OP_TXAGGR) { in arn_node_alloc()
1668 arn_tx_node_init(sc, an); in arn_node_alloc()
1681 struct arn_softc *sc = (struct arn_softc *)ic; in arn_node_free() local
1687 if (sc->sc_flags & SC_OP_TXAGGR) in arn_node_free()
1688 arn_tx_node_cleanup(sc, in); in arn_node_free()
1692 if (ARN_TXQ_SETUP(sc, i)) { in arn_node_free()
1693 txq = &sc->sc_txq[i]; in arn_node_free()
1725 arn_key_alloc_pair(struct arn_softc *sc, ieee80211_keyix *txkeyix, in arn_key_alloc_pair() argument
1730 ASSERT(!sc->sc_splitmic); in arn_key_alloc_pair()
1731 for (i = 0; i < ARRAY_SIZE(sc->sc_keymap)/4; i++) { in arn_key_alloc_pair()
1732 uint8_t b = sc->sc_keymap[i]; in arn_key_alloc_pair()
1737 if ((b & 1) || is_set(keyix+64, sc->sc_keymap)) { in arn_key_alloc_pair()
1741 set_bit(keyix, sc->sc_keymap); in arn_key_alloc_pair()
1742 set_bit(keyix+64, sc->sc_keymap); in arn_key_alloc_pair()
1761 arn_key_alloc_2pair(struct arn_softc *sc, ieee80211_keyix *txkeyix, in arn_key_alloc_2pair() argument
1766 ASSERT(sc->sc_splitmic); in arn_key_alloc_2pair()
1767 for (i = 0; i < ARRAY_SIZE(sc->sc_keymap)/4; i++) { in arn_key_alloc_2pair()
1768 uint8_t b = sc->sc_keymap[i]; in arn_key_alloc_2pair()
1780 if (is_set(keyix+32, sc->sc_keymap) || in arn_key_alloc_2pair()
1781 is_set(keyix+64, sc->sc_keymap) || in arn_key_alloc_2pair()
1782 is_set(keyix+32+64, sc->sc_keymap)) { in arn_key_alloc_2pair()
1790 set_bit(keyix, sc->sc_keymap); in arn_key_alloc_2pair()
1791 set_bit(keyix+64, sc->sc_keymap); in arn_key_alloc_2pair()
1792 set_bit(keyix+32, sc->sc_keymap); in arn_key_alloc_2pair()
1793 set_bit(keyix+32+64, sc->sc_keymap); in arn_key_alloc_2pair()
1811 arn_key_alloc_single(struct arn_softc *sc, ieee80211_keyix *txkeyix, in arn_key_alloc_single() argument
1817 for (i = 0; i < ARRAY_SIZE(sc->sc_keymap); i++) { in arn_key_alloc_single()
1818 uint8_t b = sc->sc_keymap[i]; in arn_key_alloc_single()
1827 set_bit(keyix, sc->sc_keymap); in arn_key_alloc_single()
1851 struct arn_softc *sc = (struct arn_softc *)ic; in arn_key_alloc() local
1862 return (arn_key_alloc_single(sc, keyix, rxkeyix)); in arn_key_alloc()
1865 if (sc->sc_splitmic) in arn_key_alloc()
1866 return (arn_key_alloc_2pair(sc, keyix, rxkeyix)); in arn_key_alloc()
1868 return (arn_key_alloc_pair(sc, keyix, rxkeyix)); in arn_key_alloc()
1870 return (arn_key_alloc_single(sc, keyix, rxkeyix)); in arn_key_alloc()
1880 struct arn_softc *sc = (struct arn_softc *)ic; in arn_key_delete() local
1881 struct ath_hal *ah = sc->sc_ah; in arn_key_delete()
1893 (k->wk_flags & IEEE80211_KEY_SWMIC) == 0 && sc->sc_splitmic) in arn_key_delete()
1901 clr_bit(keyix, sc->sc_keymap); in arn_key_delete()
1908 clr_bit(keyix+64, sc->sc_keymap); in arn_key_delete()
1909 if (sc->sc_splitmic) { in arn_key_delete()
1911 clr_bit(keyix+32, sc->sc_keymap); in arn_key_delete()
1913 clr_bit(keyix+32+64, sc->sc_keymap); in arn_key_delete()
1926 arn_keyset_tkip(struct arn_softc *sc, const struct ieee80211_key *k, in arn_keyset_tkip() argument
1932 struct ath_hal *ah = sc->sc_ah; in arn_keyset_tkip()
1943 if (!sc->sc_splitmic) { in arn_keyset_tkip()
1977 struct arn_softc *sc = (struct arn_softc *)ic; in arn_key_set() local
2009 return (arn_keyset_tkip(sc, k, &hk, mac)); in arn_key_set()
2011 return (ath9k_hw_set_keycache_entry(sc->sc_ah, in arn_key_set()
2031 arn_open(struct arn_softc *sc) in arn_open() argument
2033 ieee80211com_t *ic = (ieee80211com_t *)sc; in arn_open()
2038 ARN_LOCK_ASSERT(sc); in arn_open()
2040 pos = arn_get_channel(sc, curchan); in arn_open()
2048 sc->tx_chan_width = ATH9K_HT_MACMODE_20; in arn_open()
2050 if (sc->sc_curmode == ATH9K_MODE_11A) { in arn_open()
2051 sc->sc_ah->ah_channels[pos].chanmode = CHANNEL_A; in arn_open()
2053 sc->sc_ah->ah_channels[pos].chanmode = CHANNEL_G; in arn_open()
2056 init_channel = &sc->sc_ah->ah_channels[pos]; in arn_open()
2059 ath9k_hw_configpcipowersave(sc->sc_ah, 0); in arn_open()
2068 if (!ath9k_hw_reset(sc->sc_ah, init_channel, in arn_open()
2069 sc->tx_chan_width, sc->sc_tx_chainmask, in arn_open()
2070 sc->sc_rx_chainmask, sc->sc_ht_extprotspacing, in arn_open()
2085 arn_update_txpow(sc); in arn_open()
2094 if (arn_startrecv(sc) != 0) { in arn_open()
2102 sc->sc_imask = ATH9K_INT_RX | ATH9K_INT_TX | in arn_open()
2106 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_GTT) in arn_open()
2107 sc->sc_imask |= ATH9K_INT_GTT; in arn_open()
2111 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT) in arn_open()
2112 sc->sc_imask |= ATH9K_INT_CST; in arn_open()
2120 if (ath9k_hw_phycounters(sc->sc_ah) && in arn_open()
2121 ((sc->sc_ah->ah_opmode == ATH9K_M_STA) || in arn_open()
2122 (sc->sc_ah->ah_opmode == ATH9K_M_IBSS))) in arn_open()
2123 sc->sc_imask |= ATH9K_INT_MIB; in arn_open()
2132 if ((sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_ENHANCEDPM) && in arn_open()
2133 (sc->sc_ah->ah_opmode == ATH9K_M_STA) && in arn_open()
2134 !sc->sc_config.swBeaconProcess) in arn_open()
2135 sc->sc_imask |= ATH9K_INT_TIM; in arn_open()
2137 if (arn_chan2mode(init_channel) != sc->sc_curmode) in arn_open()
2138 arn_setcurmode(sc, arn_chan2mode(init_channel)); in arn_open()
2141 __func__, sc->sc_curmode)); in arn_open()
2143 sc->sc_isrunning = 1; in arn_open()
2146 sc->sc_imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS); in arn_open()
2147 (void) ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_imask); in arn_open()
2156 arn_close(struct arn_softc *sc) in arn_close() argument
2158 ieee80211com_t *ic = (ieee80211com_t *)sc; in arn_close()
2159 struct ath_hal *ah = sc->sc_ah; in arn_close()
2161 ARN_LOCK_ASSERT(sc); in arn_close()
2163 if (!sc->sc_isrunning) in arn_close()
2171 ARN_UNLOCK(sc); in arn_close()
2174 ARN_LOCK(sc); in arn_close()
2182 if (!(sc->sc_flags & SC_OP_INVALID)) { in arn_close()
2183 arn_draintxq(sc, 0); in arn_close()
2184 (void) arn_stoprecv(sc); in arn_close()
2187 sc->sc_rxlink = NULL; in arn_close()
2190 sc->sc_isrunning = 0; in arn_close()
2199 struct arn_softc *sc = arg; in arn_m_stat() local
2200 ieee80211com_t *ic = (ieee80211com_t *)sc; in arn_m_stat()
2204 ARN_LOCK(sc); in arn_m_stat()
2213 *val = sc->sc_stats.ast_tx_nobuf + in arn_m_stat()
2214 sc->sc_stats.ast_tx_nobufmgt; in arn_m_stat()
2217 *val = sc->sc_stats.ast_rx_tooshort; in arn_m_stat()
2233 *val = sc->sc_stats.ast_tx_fifoerr + in arn_m_stat()
2234 sc->sc_stats.ast_tx_xretries + in arn_m_stat()
2235 sc->sc_stats.ast_tx_discard; in arn_m_stat()
2238 *val = sc->sc_stats.ast_tx_xretries; in arn_m_stat()
2241 *val = sc->sc_stats.ast_rx_crcerr; in arn_m_stat()
2244 *val = sc->sc_stats.ast_rx_badcrypt; in arn_m_stat()
2254 ARN_UNLOCK(sc); in arn_m_stat()
2257 ARN_UNLOCK(sc); in arn_m_stat()
2260 ARN_UNLOCK(sc); in arn_m_stat()
2268 struct arn_softc *sc = arg; in arn_m_start() local
2271 ARN_LOCK(sc); in arn_m_start()
2278 arn_close(sc); in arn_m_start()
2280 if ((err = arn_open(sc)) != 0) { in arn_m_start()
2281 ARN_UNLOCK(sc); in arn_m_start()
2286 sc->sc_flags &= ~SC_OP_INVALID; in arn_m_start()
2288 ARN_UNLOCK(sc); in arn_m_start()
2296 struct arn_softc *sc = arg; in arn_m_stop() local
2298 ARN_LOCK(sc); in arn_m_stop()
2299 arn_close(sc); in arn_m_stop()
2302 (void) ath9k_hw_disable(sc->sc_ah); in arn_m_stop()
2303 ath9k_hw_configpcipowersave(sc->sc_ah, 1); in arn_m_stop()
2306 sc->sc_flags |= SC_OP_INVALID; in arn_m_stop()
2307 ARN_UNLOCK(sc); in arn_m_stop()
2313 struct arn_softc *sc = arg; in arn_m_promisc() local
2314 struct ath_hal *ah = sc->sc_ah; in arn_m_promisc()
2317 ARN_LOCK(sc); in arn_m_promisc()
2324 sc->sc_promisc = on; in arn_m_promisc()
2327 ARN_UNLOCK(sc); in arn_m_promisc()
2335 struct arn_softc *sc = arg; in arn_m_multicst() local
2336 struct ath_hal *ah = sc->sc_ah; in arn_m_multicst()
2339 uint32_t *mfilt = sc->sc_mcast_hash; in arn_m_multicst()
2341 ARN_LOCK(sc); in arn_m_multicst()
2353 sc->sc_mcast_refs[pos]++; in arn_m_multicst()
2356 if (--sc->sc_mcast_refs[pos] == 0) in arn_m_multicst()
2361 ARN_UNLOCK(sc); in arn_m_multicst()
2368 struct arn_softc *sc = arg; in arn_m_unicst() local
2369 struct ath_hal *ah = sc->sc_ah; in arn_m_unicst()
2370 ieee80211com_t *ic = (ieee80211com_t *)sc; in arn_m_unicst()
2377 ARN_LOCK(sc); in arn_m_unicst()
2378 IEEE80211_ADDR_COPY(sc->sc_isc.ic_macaddr, macaddr); in arn_m_unicst()
2379 (void) ath9k_hw_setmac(ah, sc->sc_isc.ic_macaddr); in arn_m_unicst()
2381 ARN_UNLOCK(sc); in arn_m_unicst()
2388 struct arn_softc *sc = arg; in arn_m_tx() local
2391 ieee80211com_t *ic = (ieee80211com_t *)sc; in arn_m_tx()
2401 sc->sc_stats.ast_tx_discard++; in arn_m_tx()
2428 struct arn_softc *sc = arg; in arn_m_ioctl() local
2431 err = ieee80211_ioctl(&sc->sc_isc, wq, mp); in arn_m_ioctl()
2433 ARN_LOCK(sc); in arn_m_ioctl()
2435 if (!(sc->sc_flags & SC_OP_INVALID)) { in arn_m_ioctl()
2436 ARN_UNLOCK(sc); in arn_m_ioctl()
2438 (void) arn_m_start(sc); in arn_m_ioctl()
2440 (void) ieee80211_new_state(&sc->sc_isc, in arn_m_ioctl()
2442 ARN_LOCK(sc); in arn_m_ioctl()
2445 ARN_UNLOCK(sc); in arn_m_ioctl()
2452 struct arn_softc *sc = arg; in arn_m_setprop() local
2455 err = ieee80211_setprop(&sc->sc_isc, pr_name, wldp_pr_num, in arn_m_setprop()
2458 ARN_LOCK(sc); in arn_m_setprop()
2461 if (!(sc->sc_flags & SC_OP_INVALID)) { in arn_m_setprop()
2462 ARN_UNLOCK(sc); in arn_m_setprop()
2463 (void) arn_m_start(sc); in arn_m_setprop()
2464 (void) ieee80211_new_state(&sc->sc_isc, in arn_m_setprop()
2466 ARN_LOCK(sc); in arn_m_setprop()
2471 ARN_UNLOCK(sc); in arn_m_setprop()
2481 struct arn_softc *sc = arg; in arn_m_getprop() local
2484 err = ieee80211_getprop(&sc->sc_isc, pr_name, wldp_pr_num, in arn_m_getprop()
2494 struct arn_softc *sc = arg; in arn_m_propinfo() local
2496 ieee80211_propinfo(&sc->sc_isc, pr_name, wldp_pr_num, prh); in arn_m_propinfo()
2501 arn_pci_config_cachesize(struct arn_softc *sc) in arn_pci_config_cachesize() argument
2509 csz = pci_config_get8(sc->sc_cfg_handle, PCI_CONF_CACHE_LINESZ); in arn_pci_config_cachesize()
2517 pci_config_put8(sc->sc_cfg_handle, PCI_CONF_CACHE_LINESZ, in arn_pci_config_cachesize()
2520 sc->sc_cachelsz = csz << 2; in arn_pci_config_cachesize()
2524 arn_pci_setup(struct arn_softc *sc) in arn_pci_setup() argument
2531 ASSERT(sc != NULL); in arn_pci_setup()
2532 command = pci_config_get16(sc->sc_cfg_handle, PCI_CONF_COMM); in arn_pci_setup()
2534 pci_config_put16(sc->sc_cfg_handle, PCI_CONF_COMM, command); in arn_pci_setup()
2535 command = pci_config_get16(sc->sc_cfg_handle, PCI_CONF_COMM); in arn_pci_setup()
2553 arn_get_hw_encap(struct arn_softc *sc) in arn_get_hw_encap() argument
2558 ic = (ieee80211com_t *)sc; in arn_get_hw_encap()
2559 ah = sc->sc_ah; in arn_get_hw_encap()
2579 arn_setup_ht_cap(struct arn_softc *sc) in arn_setup_ht_cap() argument
2586 arn_ht_conf *ht_info = &sc->sc_ht_conf; in arn_setup_ht_cap()
2600 rx_streams = ISP2(sc->sc_ah->ah_caps.rx_chainmask) ? 1 : 2; in arn_setup_ht_cap()
2609 arn_overwrite_11n_rateset(struct arn_softc *sc) in arn_overwrite_11n_rateset() argument
2611 uint8_t *ht_rs = sc->sc_ht_conf.rx_mcs_mask; in arn_overwrite_11n_rateset()
2648 arn_tx_queue_update(struct arn_softc *sc, int ac) in arn_tx_queue_update() argument
2652 ieee80211com_t *ic = (ieee80211com_t *)sc; in arn_tx_queue_update()
2655 struct ath_hal *ah = sc->sc_ah; in arn_tx_queue_update()
2658 txq = &sc->sc_txq[arn_get_hal_qnum(ac, sc)]; in arn_tx_queue_update()
2722 struct arn_softc *sc = (struct arn_softc *)ic; in arn_wme_update() local
2725 return (!arn_tx_queue_update(sc, WME_AC_BE) || in arn_wme_update()
2726 !arn_tx_queue_update(sc, WME_AC_BK) || in arn_wme_update()
2727 !arn_tx_queue_update(sc, WME_AC_VI) || in arn_wme_update()
2728 !arn_tx_queue_update(sc, WME_AC_VO) ? EIO : 0); in arn_wme_update()
2737 arn_update_chainmask(struct arn_softc *sc) in arn_update_chainmask() argument
2740 sc->sc_flags |= SC_OP_CHAINMASK_UPDATE; in arn_update_chainmask()
2742 is_ht = sc->sc_ht_conf.ht_supported; in arn_update_chainmask()
2744 sc->sc_tx_chainmask = sc->sc_ah->ah_caps.tx_chainmask; in arn_update_chainmask()
2745 sc->sc_rx_chainmask = sc->sc_ah->ah_caps.rx_chainmask; in arn_update_chainmask()
2747 sc->sc_tx_chainmask = 1; in arn_update_chainmask()
2748 sc->sc_rx_chainmask = 1; in arn_update_chainmask()
2753 sc->sc_tx_chainmask, sc->sc_rx_chainmask)); in arn_update_chainmask()
2759 struct arn_softc *sc; in arn_resume() local
2762 sc = ddi_get_soft_state(arn_soft_state_p, ddi_get_instance(devinfo)); in arn_resume()
2763 if (sc == NULL) { in arn_resume()
2769 ARN_LOCK(sc); in arn_resume()
2774 if (arn_pci_setup(sc) != 0) { in arn_resume()
2777 ARN_UNLOCK(sc); in arn_resume()
2781 if (!(sc->sc_flags & SC_OP_INVALID)) in arn_resume()
2782 ret = arn_open(sc); in arn_resume()
2783 ARN_UNLOCK(sc); in arn_resume()
2791 struct arn_softc *sc; in arn_attach() local
2821 sc = ddi_get_soft_state(arn_soft_state_p, ddi_get_instance(devinfo)); in arn_attach()
2822 ic = (ieee80211com_t *)sc; in arn_attach()
2823 sc->sc_dev = devinfo; in arn_attach()
2825 mutex_init(&sc->sc_genlock, NULL, MUTEX_DRIVER, NULL); in arn_attach()
2826 mutex_init(&sc->sc_serial_rw, NULL, MUTEX_DRIVER, NULL); in arn_attach()
2827 mutex_init(&sc->sc_txbuflock, NULL, MUTEX_DRIVER, NULL); in arn_attach()
2828 mutex_init(&sc->sc_rxbuflock, NULL, MUTEX_DRIVER, NULL); in arn_attach()
2829 mutex_init(&sc->sc_resched_lock, NULL, MUTEX_DRIVER, NULL); in arn_attach()
2831 mutex_init(&sc->sc_bcbuflock, NULL, MUTEX_DRIVER, NULL); in arn_attach()
2834 sc->sc_flags |= SC_OP_INVALID; in arn_attach()
2836 err = pci_config_setup(devinfo, &sc->sc_cfg_handle); in arn_attach()
2843 if (arn_pci_setup(sc) != 0) in arn_attach()
2847 arn_pci_config_cachesize(sc); in arn_attach()
2849 vendor_id = pci_config_get16(sc->sc_cfg_handle, PCI_CONF_VENID); in arn_attach()
2850 device_id = pci_config_get16(sc->sc_cfg_handle, PCI_CONF_DEVID); in arn_attach()
2854 pci_config_get8(sc->sc_cfg_handle, PCI_CONF_CACHE_LINESZ))); in arn_attach()
2856 pci_config_put8(sc->sc_cfg_handle, PCI_CONF_LATENCY_TIMER, 0xa8); in arn_attach()
2857 val = pci_config_get32(sc->sc_cfg_handle, 0x40); in arn_attach()
2859 pci_config_put32(sc->sc_cfg_handle, 0x40, val & 0xffff00ff); in arn_attach()
2862 &sc->mem, 0, 0, &arn_reg_accattr, &sc->sc_io_handle); in arn_attach()
2864 "regs map1 = %x err=%d\n", sc->mem, err)); in arn_attach()
2871 ah = ath9k_hw_attach(device_id, sc, sc->mem, &status); in arn_attach()
2878 sc->sc_ah = ah; in arn_attach()
2883 sc->sc_keymax = ah->ah_caps.keycache_size; in arn_attach()
2884 if (sc->sc_keymax > ATH_KEYMAX) { in arn_attach()
2887 ATH_KEYMAX, sc->sc_keymax)); in arn_attach()
2888 sc->sc_keymax = ATH_KEYMAX; in arn_attach()
2895 for (i = 0; i < sc->sc_keymax; i++) in arn_attach()
2904 set_bit(i, sc->sc_keymap); in arn_attach()
2905 set_bit(i + 32, sc->sc_keymap); in arn_attach()
2906 set_bit(i + 64, sc->sc_keymap); in arn_attach()
2907 set_bit(i + 32 + 64, sc->sc_keymap); in arn_attach()
2911 err = arn_setup_channels(sc); in arn_attach()
2919 sc->sc_ah->ah_opmode = ATH9K_M_STA; in arn_attach()
2922 arn_rate_attach(sc); in arn_attach()
2923 arn_setup_rates(sc, IEEE80211_MODE_11A); in arn_attach()
2924 arn_setup_rates(sc, IEEE80211_MODE_11B); in arn_attach()
2925 arn_setup_rates(sc, IEEE80211_MODE_11G); in arn_attach()
2928 arn_setcurmode(sc, ATH9K_MODE_11G); in arn_attach()
2931 if (sc->sc_have11g) in arn_attach()
2936 sc->sc_mrretry = 1; in arn_attach()
2937 sc->sc_config.ath_aggr_prot = 0; in arn_attach()
2940 err = arn_desc_alloc(devinfo, sc); in arn_attach()
2947 if ((sc->sc_tq = ddi_taskq_create(devinfo, "ath_taskq", 1, in arn_attach()
2961 sc->sc_beaconq = arn_beaconq_setup(ah); in arn_attach()
2962 if (sc->sc_beaconq == (-1)) { in arn_attach()
2969 sc->sc_cabq = arn_txq_setup(sc, ATH9K_TX_QUEUE_CAB, 0); in arn_attach()
2970 if (sc->sc_cabq == NULL) { in arn_attach()
2976 sc->sc_config.cabqReadytime = ATH_CABQ_READY_TIME; in arn_attach()
2977 ath_cabq_update(sc); in arn_attach()
2980 for (i = 0; i < ARRAY_SIZE(sc->sc_haltype2q); i++) in arn_attach()
2981 sc->sc_haltype2q[i] = -1; in arn_attach()
2985 if (!arn_tx_setup(sc, ATH9K_WME_AC_BK)) { in arn_attach()
2990 if (!arn_tx_setup(sc, ATH9K_WME_AC_BE)) { in arn_attach()
2995 if (!arn_tx_setup(sc, ATH9K_WME_AC_VI)) { in arn_attach()
3000 if (!arn_tx_setup(sc, ATH9K_WME_AC_VO)) { in arn_attach()
3011 sc->sc_ani.sc_noise_floor = ATH_DEFAULT_NOISE_FLOOR; in arn_attach()
3022 (void) ath9k_hw_setcapability(sc->sc_ah, ATH9K_CAP_TKIP_MIC, in arn_attach()
3027 arn_get_hw_encap(sc); in arn_attach()
3041 sc->sc_splitmic = 1; in arn_attach()
3048 sc->sc_config.txpowlimit = ATH_TXPOWER_MAX; in arn_attach()
3049 sc->sc_config.txpowlimit_override = 0; in arn_attach()
3053 sc->sc_flags |= SC_OP_TXAGGR; in arn_attach()
3054 sc->sc_flags |= SC_OP_RXAGGR; in arn_attach()
3055 arn_setup_ht_cap(sc); in arn_attach()
3056 arn_overwrite_11n_rateset(sc); in arn_attach()
3059 sc->sc_tx_chainmask = 1; in arn_attach()
3060 sc->sc_rx_chainmask = 1; in arn_attach()
3063 sc->sc_tx_chainmask, sc->sc_rx_chainmask)); in arn_attach()
3068 sc->sc_defant = ath9k_hw_getdefantenna(ah); in arn_attach()
3070 ath9k_hw_getmac(ah, sc->sc_myaddr); in arn_attach()
3072 ath9k_hw_getbssidmask(ah, sc->sc_bssidmask); in arn_attach()
3073 ATH_SET_VAP_BSSID_MASK(sc->sc_bssidmask); in arn_attach()
3074 (void) ath9k_hw_setbssidmask(ah, sc->sc_bssidmask); in arn_attach()
3078 sc->sc_slottime = ATH9K_SLOT_TIME_9; in arn_attach()
3082 for (i = 0; i < ARRAY_SIZE(sc->sc_bslot); i++) in arn_attach()
3083 sc->sc_bslot[i] = ATH_IF_ID_ANY; in arn_attach()
3086 sc->sc_config.swBeaconProcess = 1; in arn_attach()
3093 if (sc->sc_ht_conf.ht_supported) { in arn_attach()
3132 if (sc->sc_ht_conf.ht_supported) { in arn_attach()
3133 sc->sc_recv_action = ic->ic_recv_action; in arn_attach()
3138 ic->ic_ampdu_rxmax = sc->sc_ht_conf.ampdu_factor; in arn_attach()
3139 ic->ic_ampdu_density = sc->sc_ht_conf.ampdu_density; in arn_attach()
3144 sc->sc_newstate = ic->ic_newstate; in arn_attach()
3147 sc->sc_recv_mgmt = ic->ic_recv_mgmt; in arn_attach()
3164 sc->sc_rx_pend = 0; in arn_attach()
3165 (void) ath9k_hw_set_interrupts(sc->sc_ah, 0); in arn_attach()
3167 &sc->sc_softint_id, NULL, 0, arn_softint_handler, (caddr_t)sc); in arn_attach()
3174 if (ddi_get_iblock_cookie(devinfo, 0, &sc->sc_iblock) in arn_attach()
3182 (caddr_t)sc) != DDI_SUCCESS) { in arn_attach()
3209 macp->m_driver = sc; in arn_attach()
3238 sc->sc_promisc = B_FALSE; in arn_attach()
3239 bzero(sc->sc_mcast_refs, sizeof (sc->sc_mcast_refs)); in arn_attach()
3240 bzero(sc->sc_mcast_hash, sizeof (sc->sc_mcast_hash)); in arn_attach()
3249 (unsigned long)sc->mem)); in arn_attach()
3252 sc->sc_flags |= SC_OP_INVALID; in arn_attach()
3253 sc->sc_isrunning = 0; in arn_attach()
3258 ddi_remove_intr(devinfo, 0, sc->sc_iblock); in arn_attach()
3260 ddi_remove_softintr(sc->sc_softint_id); in arn_attach()
3264 arn_desc_free(sc); in arn_attach()
3265 if (sc->sc_tq) in arn_attach()
3266 ddi_taskq_destroy(sc->sc_tq); in arn_attach()
3270 ddi_regs_map_free(&sc->sc_io_handle); in arn_attach()
3272 pci_config_teardown(&sc->sc_cfg_handle); in arn_attach()
3274 sc->sc_flags |= SC_OP_INVALID; in arn_attach()
3276 mutex_destroy(&sc->sc_txbuflock); in arn_attach()
3278 if (ARN_TXQ_SETUP(sc, i)) { in arn_attach()
3280 mutex_destroy(&((&sc->sc_txq[i])->axq_lock)); in arn_attach()
3283 mutex_destroy(&sc->sc_rxbuflock); in arn_attach()
3284 mutex_destroy(&sc->sc_serial_rw); in arn_attach()
3285 mutex_destroy(&sc->sc_genlock); in arn_attach()
3286 mutex_destroy(&sc->sc_resched_lock); in arn_attach()
3288 mutex_destroy(&sc->sc_bcbuflock); in arn_attach()
3301 arn_suspend(struct arn_softc *sc) in arn_suspend() argument
3303 ARN_LOCK(sc); in arn_suspend()
3304 arn_close(sc); in arn_suspend()
3305 ARN_UNLOCK(sc); in arn_suspend()
3313 struct arn_softc *sc; in arn_detach() local
3316 sc = ddi_get_soft_state(arn_soft_state_p, ddi_get_instance(devinfo)); in arn_detach()
3317 ASSERT(sc != NULL); in arn_detach()
3324 return (arn_suspend(sc)); in arn_detach()
3330 if (mac_disable(sc->sc_isc.ic_mach) != 0) in arn_detach()
3333 arn_stop_scantimer(sc); in arn_detach()
3334 arn_stop_caltimer(sc); in arn_detach()
3337 (void) ath9k_hw_set_interrupts(sc->sc_ah, 0); in arn_detach()
3342 (void) mac_unregister(sc->sc_isc.ic_mach); in arn_detach()
3345 ddi_remove_intr(devinfo, 0, sc->sc_iblock); in arn_detach()
3346 ddi_remove_softintr(sc->sc_softint_id); in arn_detach()
3359 ieee80211_detach(&sc->sc_isc); in arn_detach()
3361 arn_desc_free(sc); in arn_detach()
3363 ddi_taskq_destroy(sc->sc_tq); in arn_detach()
3365 if (!(sc->sc_flags & SC_OP_INVALID)) in arn_detach()
3366 (void) ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE); in arn_detach()
3369 mutex_destroy(&sc->sc_txbuflock); in arn_detach()
3371 if (ARN_TXQ_SETUP(sc, i)) { in arn_detach()
3372 arn_tx_cleanupq(sc, &sc->sc_txq[i]); in arn_detach()
3373 mutex_destroy(&((&sc->sc_txq[i])->axq_lock)); in arn_detach()
3377 ath9k_hw_detach(sc->sc_ah); in arn_detach()
3380 ddi_regs_map_free(&sc->sc_io_handle); in arn_detach()
3381 pci_config_teardown(&sc->sc_cfg_handle); in arn_detach()
3384 mutex_destroy(&sc->sc_genlock); in arn_detach()
3385 mutex_destroy(&sc->sc_serial_rw); in arn_detach()
3386 mutex_destroy(&sc->sc_rxbuflock); in arn_detach()
3387 mutex_destroy(&sc->sc_resched_lock); in arn_detach()
3389 mutex_destroy(&sc->sc_bcbuflock); in arn_detach()
3411 struct arn_softc *sc; in arn_quiesce() local
3415 sc = ddi_get_soft_state(arn_soft_state_p, ddi_get_instance(devinfo)); in arn_quiesce()
3417 if (sc == NULL || (ah = sc->sc_ah) == NULL) in arn_quiesce()
3429 if (ARN_TXQ_SETUP(sc, i)) in arn_quiesce()
3430 (void) ath9k_hw_stoptxdma(ah, sc->sc_txq[i].axq_qnum); in arn_quiesce()