Lines Matching refs:ds
258 ath9k_hw_filltxdesc(struct ath_hal *ah, struct ath_desc *ds, in ath9k_hw_filltxdesc() argument
262 struct ar5416_desc *ads = AR5416DESC(ds); in ath9k_hw_filltxdesc()
288 ath9k_hw_cleartxdesc(struct ath_hal *ah, struct ath_desc *ds) in ath9k_hw_cleartxdesc() argument
290 struct ar5416_desc *ads = AR5416DESC(ds); in ath9k_hw_cleartxdesc()
300 ath9k_hw_txprocdesc(struct ath_hal *ah, struct ath_desc *ds) in ath9k_hw_txprocdesc() argument
302 struct ar5416_desc *ads = AR5416DESC(ds); in ath9k_hw_txprocdesc()
307 ds->ds_txstat.ts_seqnum = MS(ads->ds_txstatus9, AR_SeqNum); in ath9k_hw_txprocdesc()
308 ds->ds_txstat.ts_tstamp = ads->AR_SendTimestamp; in ath9k_hw_txprocdesc()
309 ds->ds_txstat.ts_status = 0; in ath9k_hw_txprocdesc()
310 ds->ds_txstat.ts_flags = 0; in ath9k_hw_txprocdesc()
314 ds->ds_txstat.ts_status |= ATH9K_TXERR_XRETRY; in ath9k_hw_txprocdesc()
318 ds->ds_txstat.ts_status |= ATH9K_TXERR_FILT; in ath9k_hw_txprocdesc()
322 ds->ds_txstat.ts_status |= ATH9K_TXERR_FIFO; in ath9k_hw_txprocdesc()
327 ds->ds_txstat.ts_status |= ATH9K_TXERR_XTXOP; in ath9k_hw_txprocdesc()
332 ds->ds_txstat.ts_status |= ATH9K_TXERR_TIMER_EXPIRED; in ath9k_hw_txprocdesc()
337 ds->ds_txstat.ts_flags |= ATH9K_TX_DESC_CFG_ERR; in ath9k_hw_txprocdesc()
340 ds->ds_txstat.ts_flags |= ATH9K_TX_DATA_UNDERRUN; in ath9k_hw_txprocdesc()
344 ds->ds_txstat.ts_flags |= ATH9K_TX_DELIM_UNDERRUN; in ath9k_hw_txprocdesc()
348 ds->ds_txstat.ts_flags |= ATH9K_TX_BA; in ath9k_hw_txprocdesc()
349 ds->ds_txstat.ba_low = ads->AR_BaBitmapLow; in ath9k_hw_txprocdesc()
350 ds->ds_txstat.ba_high = ads->AR_BaBitmapHigh; in ath9k_hw_txprocdesc()
353 ds->ds_txstat.ts_rateindex = MS(ads->ds_txstatus9, AR_FinalTxIdx); in ath9k_hw_txprocdesc()
354 switch (ds->ds_txstat.ts_rateindex) { in ath9k_hw_txprocdesc()
356 ds->ds_txstat.ts_ratecode = MS(ads->ds_ctl3, AR_XmitRate0); in ath9k_hw_txprocdesc()
359 ds->ds_txstat.ts_ratecode = MS(ads->ds_ctl3, AR_XmitRate1); in ath9k_hw_txprocdesc()
362 ds->ds_txstat.ts_ratecode = MS(ads->ds_ctl3, AR_XmitRate2); in ath9k_hw_txprocdesc()
365 ds->ds_txstat.ts_ratecode = MS(ads->ds_ctl3, AR_XmitRate3); in ath9k_hw_txprocdesc()
369 ds->ds_txstat.ts_rssi = MS(ads->ds_txstatus5, AR_TxRSSICombined); in ath9k_hw_txprocdesc()
370 ds->ds_txstat.ts_rssi_ctl0 = MS(ads->ds_txstatus0, AR_TxRSSIAnt00); in ath9k_hw_txprocdesc()
371 ds->ds_txstat.ts_rssi_ctl1 = MS(ads->ds_txstatus0, AR_TxRSSIAnt01); in ath9k_hw_txprocdesc()
372 ds->ds_txstat.ts_rssi_ctl2 = MS(ads->ds_txstatus0, AR_TxRSSIAnt02); in ath9k_hw_txprocdesc()
373 ds->ds_txstat.ts_rssi_ext0 = MS(ads->ds_txstatus5, AR_TxRSSIAnt10); in ath9k_hw_txprocdesc()
374 ds->ds_txstat.ts_rssi_ext1 = MS(ads->ds_txstatus5, AR_TxRSSIAnt11); in ath9k_hw_txprocdesc()
375 ds->ds_txstat.ts_rssi_ext2 = MS(ads->ds_txstatus5, AR_TxRSSIAnt12); in ath9k_hw_txprocdesc()
376 ds->ds_txstat.evm0 = ads->AR_TxEVM0; in ath9k_hw_txprocdesc()
377 ds->ds_txstat.evm1 = ads->AR_TxEVM1; in ath9k_hw_txprocdesc()
378 ds->ds_txstat.evm2 = ads->AR_TxEVM2; in ath9k_hw_txprocdesc()
379 ds->ds_txstat.ts_shortretry = MS(ads->ds_txstatus1, AR_RTSFailCnt); in ath9k_hw_txprocdesc()
380 ds->ds_txstat.ts_longretry = MS(ads->ds_txstatus1, AR_DataFailCnt); in ath9k_hw_txprocdesc()
381 ds->ds_txstat.ts_virtcol = MS(ads->ds_txstatus1, AR_VirtRetryCnt); in ath9k_hw_txprocdesc()
382 ds->ds_txstat.ts_antenna = 1; in ath9k_hw_txprocdesc()
388 ath9k_hw_set11n_txdesc(struct ath_hal *ah, struct ath_desc *ds, in ath9k_hw_set11n_txdesc() argument
392 struct ar5416_desc *ads = AR5416DESC(ds); in ath9k_hw_set11n_txdesc()
427 ath9k_hw_set11n_ratescenario(struct ath_hal *ah, struct ath_desc *ds, in ath9k_hw_set11n_ratescenario() argument
434 struct ar5416_desc *ads = AR5416DESC(ds); in ath9k_hw_set11n_ratescenario()
487 ath9k_hw_set11n_aggr_first(struct ath_hal *ah, struct ath_desc *ds, in ath9k_hw_set11n_aggr_first() argument
490 struct ar5416_desc *ads = AR5416DESC(ds); in ath9k_hw_set11n_aggr_first()
499 ath9k_hw_set11n_aggr_middle(struct ath_hal *ah, struct ath_desc *ds, in ath9k_hw_set11n_aggr_middle() argument
502 struct ar5416_desc *ads = AR5416DESC(ds); in ath9k_hw_set11n_aggr_middle()
515 ath9k_hw_set11n_aggr_last(struct ath_hal *ah, struct ath_desc *ds) in ath9k_hw_set11n_aggr_last() argument
517 struct ar5416_desc *ads = AR5416DESC(ds); in ath9k_hw_set11n_aggr_last()
526 ath9k_hw_clr11n_aggr(struct ath_hal *ah, struct ath_desc *ds) in ath9k_hw_clr11n_aggr() argument
528 struct ar5416_desc *ads = AR5416DESC(ds); in ath9k_hw_clr11n_aggr()
535 ath9k_hw_set11n_burstduration(struct ath_hal *ah, struct ath_desc *ds, in ath9k_hw_set11n_burstduration() argument
538 struct ar5416_desc *ads = AR5416DESC(ds); in ath9k_hw_set11n_burstduration()
546 ath9k_hw_set11n_virtualmorefrag(struct ath_hal *ah, struct ath_desc *ds, in ath9k_hw_set11n_virtualmorefrag() argument
549 struct ar5416_desc *ads = AR5416DESC(ds); in ath9k_hw_set11n_virtualmorefrag()
948 ath9k_hw_rxprocdesc(struct ath_hal *ah, struct ath_desc *ds, in ath9k_hw_rxprocdesc() argument
954 struct ar5416_desc *adsp = AR5416DESC(ds); in ath9k_hw_rxprocdesc()
962 ds->ds_rxstat.rs_status = 0; in ath9k_hw_rxprocdesc()
963 ds->ds_rxstat.rs_flags = 0; in ath9k_hw_rxprocdesc()
965 ds->ds_rxstat.rs_datalen = ads.ds_rxstatus1 & AR_DataLen; in ath9k_hw_rxprocdesc()
966 ds->ds_rxstat.rs_tstamp = ads.AR_RcvTimestamp; in ath9k_hw_rxprocdesc()
968 ds->ds_rxstat.rs_rssi = MS(ads.ds_rxstatus4, AR_RxRSSICombined); in ath9k_hw_rxprocdesc()
969 ds->ds_rxstat.rs_rssi_ctl0 = MS(ads.ds_rxstatus0, AR_RxRSSIAnt00); in ath9k_hw_rxprocdesc()
970 ds->ds_rxstat.rs_rssi_ctl1 = MS(ads.ds_rxstatus0, AR_RxRSSIAnt01); in ath9k_hw_rxprocdesc()
971 ds->ds_rxstat.rs_rssi_ctl2 = MS(ads.ds_rxstatus0, AR_RxRSSIAnt02); in ath9k_hw_rxprocdesc()
972 ds->ds_rxstat.rs_rssi_ext0 = MS(ads.ds_rxstatus4, AR_RxRSSIAnt10); in ath9k_hw_rxprocdesc()
973 ds->ds_rxstat.rs_rssi_ext1 = MS(ads.ds_rxstatus4, AR_RxRSSIAnt11); in ath9k_hw_rxprocdesc()
974 ds->ds_rxstat.rs_rssi_ext2 = MS(ads.ds_rxstatus4, AR_RxRSSIAnt12); in ath9k_hw_rxprocdesc()
976 ds->ds_rxstat.rs_keyix = MS(ads.ds_rxstatus8, AR_KeyIdx); in ath9k_hw_rxprocdesc()
978 ds->ds_rxstat.rs_keyix = ATH9K_RXKEYIX_INVALID; in ath9k_hw_rxprocdesc()
980 ds->ds_rxstat.rs_rate = RXSTATUS_RATE(ah, (&ads)); in ath9k_hw_rxprocdesc()
981 ds->ds_rxstat.rs_more = (ads.ds_rxstatus1 & AR_RxMore) ? 1 : 0; in ath9k_hw_rxprocdesc()
983 ds->ds_rxstat.rs_isaggr = (ads.ds_rxstatus8 & AR_RxAggr) ? 1 : 0; in ath9k_hw_rxprocdesc()
984 ds->ds_rxstat.rs_moreaggr = in ath9k_hw_rxprocdesc()
986 ds->ds_rxstat.rs_antenna = MS(ads.ds_rxstatus3, AR_RxAntenna); in ath9k_hw_rxprocdesc()
987 ds->ds_rxstat.rs_flags = in ath9k_hw_rxprocdesc()
989 ds->ds_rxstat.rs_flags |= in ath9k_hw_rxprocdesc()
993 ds->ds_rxstat.rs_flags |= ATH9K_RX_DELIM_CRC_PRE; in ath9k_hw_rxprocdesc()
995 ds->ds_rxstat.rs_flags |= ATH9K_RX_DELIM_CRC_POST; in ath9k_hw_rxprocdesc()
997 ds->ds_rxstat.rs_flags |= ATH9K_RX_DECRYPT_BUSY; in ath9k_hw_rxprocdesc()
1001 ds->ds_rxstat.rs_status |= ATH9K_RXERR_CRC; in ath9k_hw_rxprocdesc()
1003 ds->ds_rxstat.rs_status |= ATH9K_RXERR_PHY; in ath9k_hw_rxprocdesc()
1005 ds->ds_rxstat.rs_phyerr = (uint8_t)phyerr; /* LINT */ in ath9k_hw_rxprocdesc()
1007 ds->ds_rxstat.rs_status |= ATH9K_RXERR_DECRYPT; in ath9k_hw_rxprocdesc()
1009 ds->ds_rxstat.rs_status |= ATH9K_RXERR_MIC; in ath9k_hw_rxprocdesc()
1016 ath9k_hw_setuprxdesc(struct ath_hal *ah, struct ath_desc *ds, in ath9k_hw_setuprxdesc() argument
1019 struct ar5416_desc *ads = AR5416DESC(ds); in ath9k_hw_setuprxdesc()