Lines Matching refs:cfgCtl
1276 uint16_t cfgCtl, in ath9k_hw_set_def_power_per_rate_table() argument
1443 i, cfgCtl, pCtlMode[ctlMode], in ath9k_hw_set_def_power_per_rate_table()
1446 if ((((cfgCtl & ~CTL_MODE_M) | in ath9k_hw_set_def_power_per_rate_table()
1449 (((cfgCtl & ~CTL_MODE_M) | in ath9k_hw_set_def_power_per_rate_table()
1468 if ((cfgCtl & ~CTL_MODE_M) == SD_NO_CTL) { in ath9k_hw_set_def_power_per_rate_table()
1581 uint16_t cfgCtl, in ath9k_hw_set_4k_power_per_rate_table() argument
1692 i, cfgCtl, pCtlMode[ctlMode], in ath9k_hw_set_4k_power_per_rate_table()
1695 if ((((cfgCtl & ~CTL_MODE_M) | in ath9k_hw_set_4k_power_per_rate_table()
1698 (((cfgCtl & ~CTL_MODE_M) | in ath9k_hw_set_4k_power_per_rate_table()
1718 if ((cfgCtl & ~CTL_MODE_M) == SD_NO_CTL) { in ath9k_hw_set_4k_power_per_rate_table()
1816 uint16_t cfgCtl, uint8_t twiceAntennaReduction, in ath9k_hw_def_set_txpower() argument
1836 &ratesArray[0], cfgCtl, in ath9k_hw_def_set_txpower()
1950 uint16_t cfgCtl, in ath9k_hw_4k_set_txpower() argument
1971 &ratesArray[0], cfgCtl, in ath9k_hw_4k_set_txpower()
2080 uint16_t cfgCtl, in ath9k_hw_set_txpower() argument
2089 val = ath9k_hw_def_set_txpower(ah, chan, cfgCtl, in ath9k_hw_set_txpower()
2093 val = ath9k_hw_4k_set_txpower(ah, chan, cfgCtl, in ath9k_hw_set_txpower()