Lines Matching refs:ah
60 ath9k_hw_analog_shift_rmw(struct ath_hal *ah, in ath9k_hw_analog_shift_rmw() argument
66 regVal = REG_READ(ah, reg) & ~mask; in ath9k_hw_analog_shift_rmw()
69 REG_WRITE(ah, reg, regVal); in ath9k_hw_analog_shift_rmw()
71 if (ah->ah_config.analog_shiftreg) in ath9k_hw_analog_shift_rmw()
131 ath9k_hw_eeprom_read(struct ath_hal *ah, uint32_t off, uint16_t *data) in ath9k_hw_eeprom_read() argument
133 (void) REG_READ(ah, AR5416_EEPROM_OFFSET + (off << AR5416_EEPROM_S)); in ath9k_hw_eeprom_read()
135 if (!ath9k_hw_wait(ah, AR_EEPROM_STATUS_DATA, in ath9k_hw_eeprom_read()
141 *data = MS(REG_READ(ah, AR_EEPROM_STATUS_DATA), in ath9k_hw_eeprom_read()
149 ath9k_hw_flash_map(struct ath_hal *ah) in ath9k_hw_flash_map() argument
158 ath9k_hw_flash_read(struct ath_hal *ah, uint32_t off, uint16_t *data) in ath9k_hw_flash_read() argument
160 *data = FLASH_READ(ah, off); in ath9k_hw_flash_read()
166 ath9k_hw_nvram_read(struct ath_hal *ah, uint32_t off, uint16_t *data) in ath9k_hw_nvram_read() argument
168 if (ath9k_hw_use_flash(ah)) in ath9k_hw_nvram_read()
169 return (ath9k_hw_flash_read(ah, off, data)); in ath9k_hw_nvram_read()
171 return (ath9k_hw_eeprom_read(ah, off, data)); in ath9k_hw_nvram_read()
175 ath9k_hw_fill_4k_eeprom(struct ath_hal *ah) in ath9k_hw_fill_4k_eeprom() argument
178 struct ath_hal_5416 *ahp = AH5416(ah); in ath9k_hw_fill_4k_eeprom()
185 if (!ath9k_hw_use_flash(ah)) { in ath9k_hw_fill_4k_eeprom()
193 if (!ath9k_hw_nvram_read(ah, addr + eep_start_loc, eep_data)) { in ath9k_hw_fill_4k_eeprom()
205 ath9k_hw_fill_def_eeprom(struct ath_hal *ah) in ath9k_hw_fill_def_eeprom() argument
208 struct ath_hal_5416 *ahp = AH5416(ah); in ath9k_hw_fill_def_eeprom()
216 if (!ath9k_hw_nvram_read(ah, addr + ar5416_eep_start_loc, in ath9k_hw_fill_def_eeprom()
234 ath9k_hw_fill_eeprom(struct ath_hal *ah) in ath9k_hw_fill_eeprom() argument
236 struct ath_hal_5416 *ahp = AH5416(ah); in ath9k_hw_fill_eeprom()
238 return (ath9k_fill_eeprom[ahp->ah_eep_map](ah)); in ath9k_hw_fill_eeprom()
242 ath9k_hw_check_def_eeprom(struct ath_hal *ah) in ath9k_hw_check_def_eeprom() argument
244 struct ath_hal_5416 *ahp = AH5416(ah); in ath9k_hw_check_def_eeprom()
251 if (!ath9k_hw_nvram_read(ah, AR5416_EEPROM_MAGIC_OFFSET, &magic)) { in ath9k_hw_check_def_eeprom()
257 if (!ath9k_hw_use_flash(ah)) { in ath9k_hw_check_def_eeprom()
371 ath9k_hw_check_4k_eeprom(struct ath_hal *ah) in ath9k_hw_check_4k_eeprom() argument
374 struct ath_hal_5416 *ahp = AH5416(ah); in ath9k_hw_check_4k_eeprom()
383 if (!ath9k_hw_use_flash(ah)) { in ath9k_hw_check_4k_eeprom()
385 if (!ath9k_hw_nvram_read(ah, AR5416_EEPROM_MAGIC_OFFSET, in ath9k_hw_check_4k_eeprom()
504 ath9k_hw_check_eeprom(struct ath_hal *ah) in ath9k_hw_check_eeprom() argument
506 struct ath_hal_5416 *ahp = AH5416(ah); in ath9k_hw_check_eeprom()
508 return (ath9k_check_eeprom[ahp->ah_eep_map](ah)); in ath9k_hw_check_eeprom()
541 ath9k_hw_get_4k_gain_boundaries_pdadcs(struct ath_hal *ah, in ath9k_hw_get_4k_gain_boundaries_pdadcs() argument
572 ath9k_hw_get_channel_centers(ah, chan, ¢ers); in ath9k_hw_get_4k_gain_boundaries_pdadcs()
645 if ((i == 0) && !AR_SREV_5416_V20_OR_LATER(ah)) { in ath9k_hw_get_4k_gain_boundaries_pdadcs()
653 if (AR_SREV_9280_10_OR_LATER(ah)) in ath9k_hw_get_4k_gain_boundaries_pdadcs()
712 ath9k_hw_get_def_gain_boundaries_pdadcs(struct ath_hal *ah, in ath9k_hw_get_def_gain_boundaries_pdadcs() argument
740 ath9k_hw_get_channel_centers(ah, chan, ¢ers); in ath9k_hw_get_def_gain_boundaries_pdadcs()
813 if ((i == 0) && !AR_SREV_5416_V20_OR_LATER(ah)) { in ath9k_hw_get_def_gain_boundaries_pdadcs()
821 if (AR_SREV_9280_10_OR_LATER(ah)) in ath9k_hw_get_def_gain_boundaries_pdadcs()
881 ath9k_hw_get_legacy_target_powers(struct ath_hal *ah, in ath9k_hw_get_legacy_target_powers() argument
894 ath9k_hw_get_channel_centers(ah, chan, ¢ers); in ath9k_hw_get_legacy_target_powers()
938 ath9k_hw_get_target_powers(struct ath_hal *ah, in ath9k_hw_get_target_powers() argument
951 ath9k_hw_get_channel_centers(ah, chan, ¢ers); in ath9k_hw_get_target_powers()
1028 ath9k_hw_set_def_power_cal_table(struct ath_hal *ah, in ath9k_hw_set_def_power_cal_table() argument
1031 struct ath_hal_5416 *ahp = AH5416(ah); in ath9k_hw_set_def_power_cal_table()
1054 (uint16_t)(MS(REG_READ(ah, AR_PHY_TPCRG5), in ath9k_hw_set_def_power_cal_table()
1078 REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_NUM_PD_GAIN, in ath9k_hw_set_def_power_cal_table()
1080 REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_1, in ath9k_hw_set_def_power_cal_table()
1082 REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_2, in ath9k_hw_set_def_power_cal_table()
1084 REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_3, in ath9k_hw_set_def_power_cal_table()
1088 if (AR_SREV_5416_V20_OR_LATER(ah) && in ath9k_hw_set_def_power_cal_table()
1101 ath9k_hw_get_def_gain_boundaries_pdadcs(ah, chan, in ath9k_hw_set_def_power_cal_table()
1107 if ((i == 0) || AR_SREV_5416_V20_OR_LATER(ah)) { in ath9k_hw_set_def_power_cal_table()
1108 REG_WRITE(ah, in ath9k_hw_set_def_power_cal_table()
1128 REG_WRITE(ah, regOffset, reg32); in ath9k_hw_set_def_power_cal_table()
1156 ath9k_hw_set_4k_power_cal_table(struct ath_hal *ah, in ath9k_hw_set_4k_power_cal_table() argument
1159 struct ath_hal_5416 *ahp = AH5416(ah); in ath9k_hw_set_4k_power_cal_table()
1179 pdGainOverlap_t2 = (uint16_t)(MS(REG_READ(ah, AR_PHY_TPCRG5), in ath9k_hw_set_4k_power_cal_table()
1198 REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_NUM_PD_GAIN, in ath9k_hw_set_4k_power_cal_table()
1200 REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_1, in ath9k_hw_set_4k_power_cal_table()
1202 REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_2, in ath9k_hw_set_4k_power_cal_table()
1204 REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_3, in ath9k_hw_set_4k_power_cal_table()
1208 if (AR_SREV_5416_V20_OR_LATER(ah) && in ath9k_hw_set_4k_power_cal_table()
1218 ath9k_hw_get_4k_gain_boundaries_pdadcs(ah, chan, in ath9k_hw_set_4k_power_cal_table()
1224 if ((i == 0) || AR_SREV_5416_V20_OR_LATER(ah)) { in ath9k_hw_set_4k_power_cal_table()
1225 REG_WRITE(ah, AR_PHY_TPCRG5 + regChainOffset, in ath9k_hw_set_4k_power_cal_table()
1244 REG_WRITE(ah, regOffset, reg32); in ath9k_hw_set_4k_power_cal_table()
1273 ath9k_hw_set_def_power_per_rate_table(struct ath_hal *ah, in ath9k_hw_set_def_power_per_rate_table() argument
1283 struct ath_hal_5416 *ahp = AH5416(ah); in ath9k_hw_set_def_power_per_rate_table()
1316 ath9k_hw_get_channel_centers(ah, chan, ¢ers); in ath9k_hw_set_def_power_per_rate_table()
1335 if (ah->ah_tpScale != ATH9K_TP_SCALE_MAX) { in ath9k_hw_set_def_power_per_rate_table()
1337 (tpScaleReductionTable[(ah->ah_tpScale)] * 2); in ath9k_hw_set_def_power_per_rate_table()
1360 ath9k_hw_get_legacy_target_powers(ah, chan, in ath9k_hw_set_def_power_per_rate_table()
1364 ath9k_hw_get_legacy_target_powers(ah, chan, in ath9k_hw_set_def_power_per_rate_table()
1368 ath9k_hw_get_target_powers(ah, chan, in ath9k_hw_set_def_power_per_rate_table()
1375 ath9k_hw_get_target_powers(ah, chan, in ath9k_hw_set_def_power_per_rate_table()
1379 ath9k_hw_get_legacy_target_powers(ah, chan, in ath9k_hw_set_def_power_per_rate_table()
1383 ath9k_hw_get_legacy_target_powers(ah, chan, in ath9k_hw_set_def_power_per_rate_table()
1393 ath9k_hw_get_legacy_target_powers(ah, chan, in ath9k_hw_set_def_power_per_rate_table()
1397 ath9k_hw_get_target_powers(ah, chan, in ath9k_hw_set_def_power_per_rate_table()
1404 ath9k_hw_get_target_powers(ah, chan, in ath9k_hw_set_def_power_per_rate_table()
1408 ath9k_hw_get_legacy_target_powers(ah, chan, in ath9k_hw_set_def_power_per_rate_table()
1578 ath9k_hw_set_4k_power_per_rate_table(struct ath_hal *ah, in ath9k_hw_set_4k_power_per_rate_table() argument
1586 struct ath_hal_5416 *ahp = AH5416(ah); in ath9k_hw_set_4k_power_per_rate_table()
1617 ath9k_hw_get_channel_centers(ah, chan, ¢ers); in ath9k_hw_set_4k_power_per_rate_table()
1626 if (ah->ah_tpScale != ATH9K_TP_SCALE_MAX) { in ath9k_hw_set_4k_power_per_rate_table()
1628 (tpScaleReductionTable[(ah->ah_tpScale)] * 2); in ath9k_hw_set_4k_power_per_rate_table()
1637 ath9k_hw_get_legacy_target_powers(ah, chan, in ath9k_hw_set_4k_power_per_rate_table()
1641 ath9k_hw_get_legacy_target_powers(ah, chan, in ath9k_hw_set_4k_power_per_rate_table()
1645 ath9k_hw_get_target_powers(ah, chan, in ath9k_hw_set_4k_power_per_rate_table()
1652 ath9k_hw_get_target_powers(ah, chan, in ath9k_hw_set_4k_power_per_rate_table()
1656 ath9k_hw_get_legacy_target_powers(ah, chan, in ath9k_hw_set_4k_power_per_rate_table()
1660 ath9k_hw_get_legacy_target_powers(ah, chan, in ath9k_hw_set_4k_power_per_rate_table()
1815 ath9k_hw_def_set_txpower(struct ath_hal *ah, struct ath9k_channel *chan, in ath9k_hw_def_set_txpower() argument
1819 struct ath_hal_5416 *ahp = AH5416(ah); in ath9k_hw_def_set_txpower()
1835 if (!ath9k_hw_set_def_power_per_rate_table(ah, chan, in ath9k_hw_def_set_txpower()
1848 if (!ath9k_hw_set_def_power_cal_table(ah, chan, &txPowerIndexOffset)) { in ath9k_hw_def_set_txpower()
1860 if (AR_SREV_9280_10_OR_LATER(ah)) { in ath9k_hw_def_set_txpower()
1865 REG_WRITE(ah, AR_PHY_POWER_TX_RATE1, in ath9k_hw_def_set_txpower()
1870 REG_WRITE(ah, AR_PHY_POWER_TX_RATE2, in ath9k_hw_def_set_txpower()
1877 REG_WRITE(ah, AR_PHY_POWER_TX_RATE3, in ath9k_hw_def_set_txpower()
1882 REG_WRITE(ah, AR_PHY_POWER_TX_RATE4, in ath9k_hw_def_set_txpower()
1889 REG_WRITE(ah, AR_PHY_POWER_TX_RATE5, in ath9k_hw_def_set_txpower()
1894 REG_WRITE(ah, AR_PHY_POWER_TX_RATE6, in ath9k_hw_def_set_txpower()
1901 REG_WRITE(ah, AR_PHY_POWER_TX_RATE7, in ath9k_hw_def_set_txpower()
1910 REG_WRITE(ah, AR_PHY_POWER_TX_RATE8, in ath9k_hw_def_set_txpower()
1920 REG_WRITE(ah, AR_PHY_POWER_TX_RATE9, in ath9k_hw_def_set_txpower()
1927 REG_WRITE(ah, AR_PHY_POWER_TX_SUB, in ath9k_hw_def_set_txpower()
1938 if (AR_SREV_9280_10_OR_LATER(ah)) in ath9k_hw_def_set_txpower()
1939 ah->ah_maxPowerLevel = in ath9k_hw_def_set_txpower()
1942 ah->ah_maxPowerLevel = ratesArray[i]; in ath9k_hw_def_set_txpower()
1948 ath9k_hw_4k_set_txpower(struct ath_hal *ah, in ath9k_hw_4k_set_txpower() argument
1955 struct ath_hal_5416 *ahp = AH5416(ah); in ath9k_hw_4k_set_txpower()
1970 if (!ath9k_hw_set_4k_power_per_rate_table(ah, chan, in ath9k_hw_4k_set_txpower()
1981 if (!ath9k_hw_set_4k_power_cal_table(ah, chan, &txPowerIndexOffset)) { in ath9k_hw_4k_set_txpower()
1993 if (AR_SREV_9280_10_OR_LATER(ah)) { in ath9k_hw_4k_set_txpower()
1998 REG_WRITE(ah, AR_PHY_POWER_TX_RATE1, in ath9k_hw_4k_set_txpower()
2003 REG_WRITE(ah, AR_PHY_POWER_TX_RATE2, in ath9k_hw_4k_set_txpower()
2010 REG_WRITE(ah, AR_PHY_POWER_TX_RATE3, in ath9k_hw_4k_set_txpower()
2015 REG_WRITE(ah, AR_PHY_POWER_TX_RATE4, in ath9k_hw_4k_set_txpower()
2022 REG_WRITE(ah, AR_PHY_POWER_TX_RATE5, in ath9k_hw_4k_set_txpower()
2027 REG_WRITE(ah, AR_PHY_POWER_TX_RATE6, in ath9k_hw_4k_set_txpower()
2034 REG_WRITE(ah, AR_PHY_POWER_TX_RATE7, in ath9k_hw_4k_set_txpower()
2044 REG_WRITE(ah, AR_PHY_POWER_TX_RATE8, in ath9k_hw_4k_set_txpower()
2054 REG_WRITE(ah, AR_PHY_POWER_TX_RATE9, in ath9k_hw_4k_set_txpower()
2068 if (AR_SREV_9280_10_OR_LATER(ah)) in ath9k_hw_4k_set_txpower()
2069 ah->ah_maxPowerLevel = in ath9k_hw_4k_set_txpower()
2072 ah->ah_maxPowerLevel = ratesArray[i]; in ath9k_hw_4k_set_txpower()
2078 ath9k_hw_set_txpower(struct ath_hal *ah, in ath9k_hw_set_txpower() argument
2085 struct ath_hal_5416 *ahp = AH5416(ah); in ath9k_hw_set_txpower()
2089 val = ath9k_hw_def_set_txpower(ah, chan, cfgCtl, in ath9k_hw_set_txpower()
2093 val = ath9k_hw_4k_set_txpower(ah, chan, cfgCtl, in ath9k_hw_set_txpower()
2100 ath9k_hw_set_def_addac(struct ath_hal *ah, struct ath9k_channel *chan) in ath9k_hw_set_def_addac() argument
2104 struct ath_hal_5416 *ahp = AH5416(ah); in ath9k_hw_set_def_addac()
2108 if (ah->ah_macVersion != AR_SREV_VERSION_9160) in ath9k_hw_set_def_addac()
2122 ath9k_hw_get_channel_centers(ah, chan, ¢ers); in ath9k_hw_set_def_addac()
2161 ath9k_hw_set_4k_addac(struct ath_hal *ah, struct ath9k_channel *chan) in ath9k_hw_set_4k_addac() argument
2164 struct ath_hal_5416 *ahp = AH5416(ah); in ath9k_hw_set_4k_addac()
2168 if (ah->ah_macVersion != AR_SREV_VERSION_9160) in ath9k_hw_set_4k_addac()
2185 ath9k_hw_set_addac(struct ath_hal *ah, struct ath9k_channel *chan) in ath9k_hw_set_addac() argument
2187 struct ath_hal_5416 *ahp = AH5416(ah); in ath9k_hw_set_addac()
2190 ath9k_hw_set_def_addac(ah, chan); in ath9k_hw_set_addac()
2192 ath9k_hw_set_4k_addac(ah, chan); in ath9k_hw_set_addac()
2197 ath9k_hw_eeprom_set_def_board_values(struct ath_hal *ah, in ath9k_hw_eeprom_set_def_board_values() argument
2201 struct ath_hal_5416 *ahp = AH5416(ah); in ath9k_hw_eeprom_set_def_board_values()
2211 (void) ath9k_hw_get_eeprom_antenna_cfg(ah, chan, 0, &ant_config); in ath9k_hw_eeprom_set_def_board_values()
2212 REG_WRITE(ah, AR_PHY_SWITCH_COM, ant_config); in ath9k_hw_eeprom_set_def_board_values()
2215 if (AR_SREV_9280(ah)) { in ath9k_hw_eeprom_set_def_board_values()
2220 if (AR_SREV_5416_V20_OR_LATER(ah) && in ath9k_hw_eeprom_set_def_board_values()
2227 REG_WRITE(ah, AR_PHY_SWITCH_CHAIN_0 + regChainOffset, in ath9k_hw_eeprom_set_def_board_values()
2230 REG_WRITE(ah, AR_PHY_TIMING_CTRL4(0) + regChainOffset, in ath9k_hw_eeprom_set_def_board_values()
2231 (REG_READ(ah, AR_PHY_TIMING_CTRL4(0) + regChainOffset) & in ath9k_hw_eeprom_set_def_board_values()
2239 if ((i == 0) || AR_SREV_5416_V20_OR_LATER(ah)) { in ath9k_hw_eeprom_set_def_board_values()
2244 if (AR_SREV_9280_10_OR_LATER(ah)) { in ath9k_hw_eeprom_set_def_board_values()
2245 REG_RMW_FIELD(ah, in ath9k_hw_eeprom_set_def_board_values()
2251 REG_RMW_FIELD(ah, in ath9k_hw_eeprom_set_def_board_values()
2257 REG_RMW_FIELD(ah, in ath9k_hw_eeprom_set_def_board_values()
2263 REG_RMW_FIELD(ah, in ath9k_hw_eeprom_set_def_board_values()
2270 REG_WRITE(ah, in ath9k_hw_eeprom_set_def_board_values()
2273 (REG_READ(ah, in ath9k_hw_eeprom_set_def_board_values()
2280 REG_WRITE(ah, in ath9k_hw_eeprom_set_def_board_values()
2283 (REG_READ(ah, in ath9k_hw_eeprom_set_def_board_values()
2291 if (AR_SREV_9280_10_OR_LATER(ah)) { in ath9k_hw_eeprom_set_def_board_values()
2292 REG_RMW_FIELD(ah, in ath9k_hw_eeprom_set_def_board_values()
2297 REG_RMW_FIELD(ah, in ath9k_hw_eeprom_set_def_board_values()
2303 REG_WRITE(ah, in ath9k_hw_eeprom_set_def_board_values()
2305 (REG_READ(ah, in ath9k_hw_eeprom_set_def_board_values()
2311 REG_WRITE(ah, in ath9k_hw_eeprom_set_def_board_values()
2314 (REG_READ(ah, in ath9k_hw_eeprom_set_def_board_values()
2324 if (AR_SREV_9280_10_OR_LATER(ah)) { in ath9k_hw_eeprom_set_def_board_values()
2326 ath9k_hw_analog_shift_rmw(ah, AR_AN_RF2G1_CH0, in ath9k_hw_eeprom_set_def_board_values()
2330 ath9k_hw_analog_shift_rmw(ah, AR_AN_RF2G1_CH0, in ath9k_hw_eeprom_set_def_board_values()
2334 ath9k_hw_analog_shift_rmw(ah, AR_AN_RF2G1_CH1, in ath9k_hw_eeprom_set_def_board_values()
2338 ath9k_hw_analog_shift_rmw(ah, AR_AN_RF2G1_CH1, in ath9k_hw_eeprom_set_def_board_values()
2343 ath9k_hw_analog_shift_rmw(ah, AR_AN_RF5G1_CH0, in ath9k_hw_eeprom_set_def_board_values()
2347 ath9k_hw_analog_shift_rmw(ah, AR_AN_RF5G1_CH0, in ath9k_hw_eeprom_set_def_board_values()
2351 ath9k_hw_analog_shift_rmw(ah, AR_AN_RF5G1_CH1, in ath9k_hw_eeprom_set_def_board_values()
2355 ath9k_hw_analog_shift_rmw(ah, AR_AN_RF5G1_CH1, in ath9k_hw_eeprom_set_def_board_values()
2360 ath9k_hw_analog_shift_rmw(ah, AR_AN_TOP2, in ath9k_hw_eeprom_set_def_board_values()
2364 ath9k_hw_analog_shift_rmw(ah, AR_AN_TOP2, in ath9k_hw_eeprom_set_def_board_values()
2372 REG_RMW_FIELD(ah, AR_PHY_XPA_CFG, AR_PHY_FORCE_XPA_CFG, in ath9k_hw_eeprom_set_def_board_values()
2376 REG_RMW_FIELD(ah, AR_PHY_SETTLING, AR_PHY_SETTLING_SWITCH, in ath9k_hw_eeprom_set_def_board_values()
2378 REG_RMW_FIELD(ah, AR_PHY_DESIRED_SZ, AR_PHY_DESIRED_SZ_ADC, in ath9k_hw_eeprom_set_def_board_values()
2381 if (!AR_SREV_9280_10_OR_LATER(ah)) in ath9k_hw_eeprom_set_def_board_values()
2382 REG_RMW_FIELD(ah, AR_PHY_DESIRED_SZ, in ath9k_hw_eeprom_set_def_board_values()
2386 REG_WRITE(ah, AR_PHY_RF_CTL4, in ath9k_hw_eeprom_set_def_board_values()
2392 REG_RMW_FIELD(ah, AR_PHY_RF_CTL3, AR_PHY_TX_END_TO_A2_RX_ON, in ath9k_hw_eeprom_set_def_board_values()
2394 if (AR_SREV_9280_10_OR_LATER(ah)) { in ath9k_hw_eeprom_set_def_board_values()
2395 REG_RMW_FIELD(ah, AR_PHY_CCA, AR9280_PHY_CCA_THRESH62, in ath9k_hw_eeprom_set_def_board_values()
2397 REG_RMW_FIELD(ah, AR_PHY_EXT_CCA0, in ath9k_hw_eeprom_set_def_board_values()
2401 REG_RMW_FIELD(ah, AR_PHY_CCA, AR_PHY_CCA_THRESH62, in ath9k_hw_eeprom_set_def_board_values()
2403 REG_RMW_FIELD(ah, AR_PHY_EXT_CCA, in ath9k_hw_eeprom_set_def_board_values()
2410 REG_RMW_FIELD(ah, AR_PHY_RF_CTL2, in ath9k_hw_eeprom_set_def_board_values()
2413 REG_RMW_FIELD(ah, AR_PHY_RF_CTL2, AR_PHY_TX_END_PA_ON, in ath9k_hw_eeprom_set_def_board_values()
2420 REG_RMW_FIELD(ah, AR_PHY_SETTLING, in ath9k_hw_eeprom_set_def_board_values()
2429 ath9k_hw_eeprom_set_4k_board_values(struct ath_hal *ah, in ath9k_hw_eeprom_set_4k_board_values() argument
2433 struct ath_hal_5416 *ahp = AH5416(ah); in ath9k_hw_eeprom_set_4k_board_values()
2447 (void) ath9k_hw_get_eeprom_antenna_cfg(ah, chan, 0, &ant_config); in ath9k_hw_eeprom_set_4k_board_values()
2448 REG_WRITE(ah, AR_PHY_SWITCH_COM, ant_config); in ath9k_hw_eeprom_set_4k_board_values()
2451 REG_WRITE(ah, AR_PHY_SWITCH_CHAIN_0 + regChainOffset, in ath9k_hw_eeprom_set_4k_board_values()
2454 REG_WRITE(ah, AR_PHY_TIMING_CTRL4(0) + regChainOffset, in ath9k_hw_eeprom_set_4k_board_values()
2455 (REG_READ(ah, AR_PHY_TIMING_CTRL4(0) + regChainOffset) & in ath9k_hw_eeprom_set_4k_board_values()
2464 REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset, in ath9k_hw_eeprom_set_4k_board_values()
2466 REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset, in ath9k_hw_eeprom_set_4k_board_values()
2468 REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset, in ath9k_hw_eeprom_set_4k_board_values()
2471 REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset, in ath9k_hw_eeprom_set_4k_board_values()
2475 REG_RMW_FIELD(ah, AR_PHY_RXGAIN + regChainOffset, in ath9k_hw_eeprom_set_4k_board_values()
2477 REG_RMW_FIELD(ah, AR_PHY_RXGAIN + regChainOffset, in ath9k_hw_eeprom_set_4k_board_values()
2480 if (AR_SREV_9285_11(ah)) in ath9k_hw_eeprom_set_4k_board_values()
2481 REG_WRITE(ah, AR9285_AN_TOP4, (AR9285_AN_TOP4_DEFAULT | 0x14)); in ath9k_hw_eeprom_set_4k_board_values()
2487 regVal = REG_READ(ah, 0x99ac); in ath9k_hw_eeprom_set_4k_board_values()
2494 REG_WRITE(ah, 0x99ac, regVal); in ath9k_hw_eeprom_set_4k_board_values()
2495 regVal = REG_READ(ah, 0x99ac); in ath9k_hw_eeprom_set_4k_board_values()
2496 regVal = REG_READ(ah, 0xa208); in ath9k_hw_eeprom_set_4k_board_values()
2499 REG_WRITE(ah, 0xa208, regVal); in ath9k_hw_eeprom_set_4k_board_values()
2500 regVal = REG_READ(ah, 0xa208); in ath9k_hw_eeprom_set_4k_board_values()
2543 ath9k_hw_analog_shift_rmw(ah, AR9285_AN_RF2G3, in ath9k_hw_eeprom_set_4k_board_values()
2545 ath9k_hw_analog_shift_rmw(ah, AR9285_AN_RF2G3, in ath9k_hw_eeprom_set_4k_board_values()
2547 ath9k_hw_analog_shift_rmw(ah, AR9285_AN_RF2G3, in ath9k_hw_eeprom_set_4k_board_values()
2549 ath9k_hw_analog_shift_rmw(ah, AR9285_AN_RF2G3, in ath9k_hw_eeprom_set_4k_board_values()
2551 ath9k_hw_analog_shift_rmw(ah, AR9285_AN_RF2G3, in ath9k_hw_eeprom_set_4k_board_values()
2554 ath9k_hw_analog_shift_rmw(ah, AR9285_AN_RF2G3, in ath9k_hw_eeprom_set_4k_board_values()
2556 ath9k_hw_analog_shift_rmw(ah, AR9285_AN_RF2G3, in ath9k_hw_eeprom_set_4k_board_values()
2558 ath9k_hw_analog_shift_rmw(ah, AR9285_AN_RF2G3, in ath9k_hw_eeprom_set_4k_board_values()
2560 ath9k_hw_analog_shift_rmw(ah, AR9285_AN_RF2G4, in ath9k_hw_eeprom_set_4k_board_values()
2562 ath9k_hw_analog_shift_rmw(ah, AR9285_AN_RF2G4, in ath9k_hw_eeprom_set_4k_board_values()
2565 ath9k_hw_analog_shift_rmw(ah, AR9285_AN_RF2G4, in ath9k_hw_eeprom_set_4k_board_values()
2567 ath9k_hw_analog_shift_rmw(ah, AR9285_AN_RF2G4, in ath9k_hw_eeprom_set_4k_board_values()
2569 ath9k_hw_analog_shift_rmw(ah, AR9285_AN_RF2G4, in ath9k_hw_eeprom_set_4k_board_values()
2571 ath9k_hw_analog_shift_rmw(ah, AR9285_AN_RF2G4, in ath9k_hw_eeprom_set_4k_board_values()
2573 ath9k_hw_analog_shift_rmw(ah, AR9285_AN_RF2G4, in ath9k_hw_eeprom_set_4k_board_values()
2577 if (AR_SREV_9285_11(ah)) in ath9k_hw_eeprom_set_4k_board_values()
2578 REG_WRITE(ah, AR9285_AN_TOP4, AR9285_AN_TOP4_DEFAULT); in ath9k_hw_eeprom_set_4k_board_values()
2580 REG_RMW_FIELD(ah, AR_PHY_SETTLING, AR_PHY_SETTLING_SWITCH, in ath9k_hw_eeprom_set_4k_board_values()
2582 REG_RMW_FIELD(ah, AR_PHY_DESIRED_SZ, AR_PHY_DESIRED_SZ_ADC, in ath9k_hw_eeprom_set_4k_board_values()
2585 REG_WRITE(ah, AR_PHY_RF_CTL4, in ath9k_hw_eeprom_set_4k_board_values()
2591 REG_RMW_FIELD(ah, AR_PHY_RF_CTL3, AR_PHY_TX_END_TO_A2_RX_ON, in ath9k_hw_eeprom_set_4k_board_values()
2593 REG_RMW_FIELD(ah, AR_PHY_CCA, AR9280_PHY_CCA_THRESH62, in ath9k_hw_eeprom_set_4k_board_values()
2595 REG_RMW_FIELD(ah, AR_PHY_EXT_CCA0, AR_PHY_EXT_CCA0_THRESH62, in ath9k_hw_eeprom_set_4k_board_values()
2600 REG_RMW_FIELD(ah, AR_PHY_RF_CTL2, AR_PHY_TX_END_DATA_START, in ath9k_hw_eeprom_set_4k_board_values()
2602 REG_RMW_FIELD(ah, AR_PHY_RF_CTL2, AR_PHY_TX_END_PA_ON, in ath9k_hw_eeprom_set_4k_board_values()
2609 REG_RMW_FIELD(ah, AR_PHY_SETTLING, in ath9k_hw_eeprom_set_4k_board_values()
2617 ath9k_hw_eeprom_set_board_values(struct ath_hal *ah, struct ath9k_channel *chan) in ath9k_hw_eeprom_set_board_values() argument
2619 struct ath_hal_5416 *ahp = AH5416(ah); in ath9k_hw_eeprom_set_board_values()
2623 val = ath9k_hw_eeprom_set_def_board_values(ah, chan); in ath9k_hw_eeprom_set_board_values()
2625 val = ath9k_hw_eeprom_set_4k_board_values(ah, chan); in ath9k_hw_eeprom_set_board_values()
2631 ath9k_hw_get_def_eeprom_antenna_cfg(struct ath_hal *ah, in ath9k_hw_get_def_eeprom_antenna_cfg() argument
2635 struct ath_hal_5416 *ahp = AH5416(ah); in ath9k_hw_get_def_eeprom_antenna_cfg()
2664 ath9k_hw_get_4k_eeprom_antenna_cfg(struct ath_hal *ah, in ath9k_hw_get_4k_eeprom_antenna_cfg() argument
2668 struct ath_hal_5416 *ahp = AH5416(ah); in ath9k_hw_get_4k_eeprom_antenna_cfg()
2684 ath9k_hw_get_eeprom_antenna_cfg(struct ath_hal *ah, in ath9k_hw_get_eeprom_antenna_cfg() argument
2688 struct ath_hal_5416 *ahp = AH5416(ah); in ath9k_hw_get_eeprom_antenna_cfg()
2692 val = ath9k_hw_get_def_eeprom_antenna_cfg(ah, chan, in ath9k_hw_get_eeprom_antenna_cfg()
2695 val = ath9k_hw_get_4k_eeprom_antenna_cfg(ah, chan, in ath9k_hw_get_eeprom_antenna_cfg()
2703 ath9k_hw_get_4k_num_ant_config(struct ath_hal *ah, in ath9k_hw_get_4k_num_ant_config() argument
2710 ath9k_hw_get_def_num_ant_config(struct ath_hal *ah, in ath9k_hw_get_def_num_ant_config() argument
2713 struct ath_hal_5416 *ahp = AH5416(ah); in ath9k_hw_get_def_num_ant_config()
2731 ath9k_hw_get_num_ant_config(struct ath_hal *ah, in ath9k_hw_get_num_ant_config() argument
2734 struct ath_hal_5416 *ahp = AH5416(ah); in ath9k_hw_get_num_ant_config()
2738 val = ath9k_hw_get_def_num_ant_config(ah, freq_band); in ath9k_hw_get_num_ant_config()
2740 val = ath9k_hw_get_4k_num_ant_config(ah, freq_band); in ath9k_hw_get_num_ant_config()
2746 ath9k_hw_eeprom_get_spur_chan(struct ath_hal *ah, uint16_t i, boolean_t is2GHz) in ath9k_hw_eeprom_get_spur_chan() argument
2753 struct ath_hal_5416 *ahp = AH5416(ah); in ath9k_hw_eeprom_get_spur_chan()
2758 i, is2GHz, ah->ah_config.spurchans[i][is2GHz])); in ath9k_hw_eeprom_get_spur_chan()
2760 switch (ah->ah_config.spurmode) { in ath9k_hw_eeprom_get_spur_chan()
2764 spur_val = ah->ah_config.spurchans[i][is2GHz]; in ath9k_hw_eeprom_get_spur_chan()
2783 ath9k_hw_get_eeprom_4k(struct ath_hal *ah, in ath9k_hw_get_eeprom_4k() argument
2786 struct ath_hal_5416 *ahp = AH5416(ah); in ath9k_hw_get_eeprom_4k()
2829 ath9k_hw_get_eeprom_def(struct ath_hal *ah, enum eeprom_param param) in ath9k_hw_get_eeprom_def() argument
2831 struct ath_hal_5416 *ahp = AH5416(ah); in ath9k_hw_get_eeprom_def()
2903 ath9k_hw_get_eeprom(struct ath_hal *ah, enum eeprom_param param) in ath9k_hw_get_eeprom() argument
2905 struct ath_hal_5416 *ahp = AH5416(ah); in ath9k_hw_get_eeprom()
2909 val = ath9k_hw_get_eeprom_def(ah, param); in ath9k_hw_get_eeprom()
2911 val = ath9k_hw_get_eeprom_4k(ah, param); in ath9k_hw_get_eeprom()
2917 ath9k_hw_eeprom_attach(struct ath_hal *ah) in ath9k_hw_eeprom_attach() argument
2920 struct ath_hal_5416 *ahp = AH5416(ah); in ath9k_hw_eeprom_attach()
2922 if (ath9k_hw_use_flash(ah)) in ath9k_hw_eeprom_attach()
2923 (void) ath9k_hw_flash_map(ah); in ath9k_hw_eeprom_attach()
2925 if (AR_SREV_9285(ah)) in ath9k_hw_eeprom_attach()
2930 if (!ath9k_hw_fill_eeprom(ah)) in ath9k_hw_eeprom_attach()
2933 status = ath9k_hw_check_eeprom(ah); in ath9k_hw_eeprom_attach()