714 	PUTCSR(afep, CSR_PAR0, pa0);  in afe_setrxfilt()
715 	PUTCSR(afep, CSR_PAR1, pa1);  in afe_setrxfilt()
729 		PUTCSR(afep, CSR_MAR0, afep->afe_mctab[0]);  in afe_setrxfilt()
730 		PUTCSR(afep, CSR_MAR1, afep->afe_mctab[1]);  in afe_setrxfilt()
923 	PUTCSR(afep, CSR_PAR, par);  in afe_initialize()
937 	PUTCSR(afep, CSR_NAR, nar);  in afe_initialize()
957 	PUTCSR(afep, CSR_SPR, eeread & ~SPR_SROM_CHIP);  in afe_sromwidth()
959 	PUTCSR(afep, CSR_SPR, eeread);  in afe_sromwidth()
965 		PUTCSR(afep, CSR_SPR, eeread | val);  in afe_sromwidth()
967 		PUTCSR(afep, CSR_SPR, eeread | val | SPR_SROM_CLOCK);  in afe_sromwidth()
971 	PUTCSR(afep, CSR_SPR, eeread);  in afe_sromwidth()
974 		PUTCSR(afep, CSR_SPR, eeread | SPR_SROM_CLOCK);  in afe_sromwidth()
977 			PUTCSR(afep, CSR_SPR, eeread);  in afe_sromwidth()
981 		PUTCSR(afep, CSR_SPR, eeread);  in afe_sromwidth()
986 	PUTCSR(afep, CSR_SPR, eeread &~ SPR_SROM_CHIP);  in afe_sromwidth()
1016 	PUTCSR(afep, CSR_SPR, eeread & ~SPR_SROM_CHIP);  in afe_readsromword()
1017 	PUTCSR(afep, CSR_SPR, eeread);  in afe_readsromword()
1023 		PUTCSR(afep, CSR_SPR, eeread | val);  in afe_readsromword()
1025 		PUTCSR(afep, CSR_SPR, eeread | val | SPR_SROM_CLOCK);  in afe_readsromword()
1029 	PUTCSR(afep, CSR_SPR, eeread);  in afe_readsromword()
1032 		PUTCSR(afep, CSR_SPR, eeread | SPR_SROM_CLOCK);  in afe_readsromword()
1038 		PUTCSR(afep, CSR_SPR, eeread);  in afe_readsromword()
1043 	PUTCSR(afep, CSR_SPR, eeread &~ SPR_SROM_CHIP);  in afe_readsromword()
1153 	PUTCSR(afep, CSR_SPR, val);  in afe_miitristate()
1155 	PUTCSR(afep, CSR_SPR, val | SPR_MII_CLOCK);  in afe_miitristate()
1164 	PUTCSR(afep, CSR_SPR, val);  in afe_miiwritebit()
1166 	PUTCSR(afep, CSR_SPR, val | SPR_MII_CLOCK);  in afe_miiwritebit()
1176 	PUTCSR(afep, CSR_SPR, val);  in afe_miireadbit()
1179 	PUTCSR(afep, CSR_SPR, val | SPR_MII_CLOCK);  in afe_miireadbit()
1426 		PUTCSR(afep, CSR_TDR, 0);  in afe_startmac()
1433 	PUTCSR(afep, CSR_TIMER, TIMER_LOOP |  in afe_startmac()
1464 	PUTCSR(afep, CSR_SR2, INT_RXSTOPPED | INT_TXSTOPPED);  in afe_stopmac()
1467 	PUTCSR(afep, CSR_TIMER, 0);  in afe_stopmac()
1476 	PUTCSR(afep, CSR_RDB, 0);  in afe_resetrings()
1477 	PUTCSR(afep, CSR_TDB, 0);  in afe_resetrings()
1498 	PUTCSR(afep, CSR_TDB, afep->afe_txdesc_paddr);  in afe_resetrings()
1516 	PUTCSR(afep, CSR_RDB, afep->afe_rxdesc_paddr);  in afe_resetrings()
1841 	PUTCSR(afep, CSR_SR2, status);  in afe_intr()
1854 			PUTCSR(afep, CSR_RDR, 0);	/* wake up chip */  in afe_intr()
1931 	PUTCSR(afep, CSR_IER2, mask);  in afe_enableinterrupts()
1947 	PUTCSR(afep, CSR_IER2, INT_NONE);  in afe_disableinterrupts()
1950 	PUTCSR(afep, CSR_SR2, INT_ALL);  in afe_disableinterrupts()
2037 	PUTCSR(afep, CSR_TDR, 0);  in afe_send()