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8 trapstat \- report trap statistics
12 \fB/usr/sbin/trapstat\fR [\fB-t\fR | \fB-T\fR | \fB-e\fR \fIentry\fR]
13 [\fB-C\fR \fIprocessor_set_id\fR | \fB-c\fR \fIcpulist\fR] [\fB-P\fR] [\fB-a\fR]
14 [\fB-r\fR \fIrate\fR] [ [\fIinterval\fR [\fIcount\fR]] | \fIcommand\fR | [\fIargs\fR]]
19 \fB/usr/sbin/trapstat\fR \fB-l\fR
24 The \fBtrapstat\fR utility gathers and displays run-time trap statistics on
25 UltraSPARC-based systems. The default output is a table of trap types and
33 specified with the \fB-c\fR or \fB-C\fR option.
36 Unless the \fB-r\fR option or the \fB-a\fR option is specified, the value
37 displayed in each entry of the table corresponds to the number of traps per
38 second. If the \fB-r\fR option is specified, the value corresponds to the
40 the \fB-a\fR option is specified, the value corresponds to the accumulated
44 By default, \fBtrapstat\fR displays data once per second, and runs
57 component of overall system performance for some workloads; the \fB-t\fR option
58 provides in-depth information on these traps. When run with this option,
65 information is further broken down into user- and kernel-mode misses.
73 provides in-depth TLB miss information broken down by page size using the
74 \fB-T\fR option. The information provided by the \fB-T\fR option is a superset
75 of that provided by the \fB-t\fR option; only one of \fB-t\fR and \fB-T\fR can
83 \fB\fB-a\fR\fR
87 instead of per-second or per-interval rates.
93 \fB\fB-c\fR \fIcpulist\fR \fR
98 \fIcpulist\fR can be a single processor \fBID\fR (for example, \fB4\fR), a
99 range of processor\fB ID\fRs (for example, \fB4-6\fR), or a comma separated
100 list of processor\fB ID\fRs or processor \fBID\fR ranges (for example,
101 \fB4,5,6\fR or \fB4,6-8\fR).
107 \fB\fB-C\fR \fIprocessor_set_id\fR \fR
110 Enables \fBtrapstat\fR only on the \fBCPU\fRs in the processor set specified by
114 specified processor set. If a \fBCPU\fR is added to the set, \fBtrapstat\fR
117 most one processor set can be specified.
123 \fB\fB-e\fR \fIentrylist\fR \fR
128 name (for example, the level-10 trap can be specified as \fB74\fR, \fB0x4A\fR,
129 \fB0x4a\fR, or \fBlevel-10\fR).
136 Manual.\fR If the parsable option (\fB-P\fR) is specified in addition to the
137 \fB-e\fR option, the format of the data is as follows:
149 5 Trap rate per interval
160 \fB\fB-l\fR \fR
165 both the default output and in the \fIentrylist\fR parameter for the \fB-e\fR
166 argument. If the parsable option (\fB-P\fR) is specified in addition to the
167 \fB-l\fR option, the format of the data is as follows:
186 \fB\fB-P\fR \fR
190 options (that is, \fB-e\fR, \fB-t\fR or \fB-T\fR), \fBtrapstat\fR's the
203 5 Trap rate per interval
214 \fB\fB-r\fR \fIrate\fR \fR
217 Explicitly sets the sampling rate to be \fIrate\fR samples per second. If this
218 option is specified, \fBtrapstat\fR's output changes from a traps-per-second to
219 traps-per-sampling-interval.
225 \fB\fB-t\fR\fR
230 A table is displayed with four principal columns of data: \fIitlb-miss\fR,
231 \fIitsb-miss\fR, \fIdtlb-miss\fR, and \fIdtsb-miss\fR. The columns contain both
235 each \fBCPU\fR consuming two rows: one row for user-mode events (denoted with
236 \fBu\fR) and one row for kernel-mode events (denoted with \fBk\fR). For each
239 parsable option (\fB-P\fR) is specified in addition to the \fB-t\fR option, the
251 4 I-TLB misses
252 5 Percentage of time in I-TLB miss handler
253 6 I-TSB misses
254 7 Percentage of time in I-TSB miss handler
255 8 D-TLB misses
256 9 Percentage of time in D-TLB miss handler
257 10 D-TSB misses
258 11 Percentage of time in D-TSB miss handler
269 \fB\fB-T\fR \fR
272 Enables \fBTLB\fR statistics, with page size information. As with the \fB-t\fR
274 \fIitlb-miss\fR, \fIitsb-miss\fR, \fIdtlb-miss\fR, and \fIdtsb-miss\fR. The
279 one set for user-level events (denoted with \fBu\fR) and one set for
280 kernel-level events (denoted with \fBk\fR). Each set, in turn, contains as many
283 right-most column. The two sets are delineated with a dashed line; CPUs are
284 delineated with a solid line. If the parsable option (\fB-P\fR) is specified in
285 addition to the \fB-T\fR option, the format of the data is as follows:
297 5 I-TLB misses
298 6 Percentage of time in I-TLB miss handler
299 7 I-TSB misses
300 8 Percentage of time in I-TSB miss handler
301 9 D-TLB misses
302 10 Percentage of time in D-TLB miss handler
303 11 D-TSB misses
304 12 Percentage of time in D-TSB miss handler
326 ------------------------+------------------------------------------------------
328 41 level-1 | 100 0 0 0 1 0
329 44 level-4 | 0 1 1 1 0 0
330 45 level-5 | 0 0 0 0 0 0
331 47 level-7 | 0 0 0 0 9 0
332 49 level-9 | 100 100 100 100 100 100
333 4a level-10 | 100 0 0 0 0 0
334 4d level-13 | 6 10 7 16 13 11
335 4e level-14 | 100 0 0 0 1 0
336 60 int-vec | 2607 2740 2642 2922 2920 3033
337 64 itlb-miss | 3129 2475 3167 1037 1200 569
338 68 dtlb-miss | 121061 86162 109838 37386 45639 20269
339 6c dtlb-prot | 997 847 1061 379 406 184
340 84 spill-user-32 | 2809 2133 2739 200806 332776 454504
341 88 spill-user-64 | 45819 207856 93487 228529 68373 77590
342 8c spill-user-32-cln | 784 561 767 274 353 215
343 90 spill-user-64-cln | 9 37 17 39 12 13
344 98 spill-kern-64 | 62913 50145 63869 21916 28431 11738
345 a4 spill-asuser-32 | 1327 947 1288 460 572 335
346 a8 spill-asuser-64 | 26 48 18 54 10 14
347 ac spill-asuser-32-cln | 4580 3599 4555 1538 1978 857
348 b0 spill-asuser-64-cln | 26 0 0 2 0 0
349 c4 fill-user-32 | 2862 2161 2798 191746 318115 435850
350 c8 fill-user-64 | 45813 197781 89179 217668 63905 74281
351 cc fill-user-32-cln | 3802 2833 3733 10153 16419 19475
352 d0 fill-user-64-cln | 329 10105 4873 10603 4235 3649
353 d8 fill-kern-64 | 62519 49943 63611 21824 28328 11693
354 108 syscall-32 | 2285 1634 2278 737 957 383
355 126 self-xcall | 100 0 0 0 0 0
358 ------------------------+------------------------------------
360 41 level-1 | 0 0 0 0
361 44 level-4 | 2 0 0 1
362 45 level-5 | 0 0 0 0
363 47 level-7 | 0 0 0 0
364 49 level-9 | 100 100 100 100
365 4a level-10 | 0 0 0 0
366 4d level-13 | 15 11 22 11
367 4e level-14 | 0 0 0 0
368 60 int-vec | 2813 2833 2738 2714
369 64 itlb-miss | 2636 1925 3133 3029
370 68 dtlb-miss | 90528 70639 107786 103425
371 6c dtlb-prot | 819 675 988 954
372 84 spill-user-32 | 175768 39933 2811 2742
373 88 spill-user-64 | 0 241348 96907 118298
374 8c spill-user-32-cln | 681 513 753 730
375 90 spill-user-64-cln | 0 42 16 20
376 98 spill-kern-64 | 52158 40914 62305 60141
377 a4 spill-asuser-32 | 1113 856 1251 1208
378 a8 spill-asuser-64 | 0 64 16 24
379 ac spill-asuser-32-cln | 3816 2942 4515 4381
380 b0 spill-asuser-64-cln | 0 0 0 0
381 c4 fill-user-32 | 170744 38444 2876 2784
382 c8 fill-user-64 | 0 230381 92941 111694
383 cc fill-user-32-cln | 8550 3790 3612 3553
384 d0 fill-user-64-cln | 0 10726 4495 5845
385 d8 fill-kern-64 | 51968 40760 62053 59922
386 108 syscall-32 | 1839 1495 2144 2083
387 126 self-xcall | 0 0 0 0
396 The \fB-c\fR option can be used to limit the \fBCPU\fRs on which
403 example# \fBtrapstat -c 1,12-15\fR
407 ------------------------+---------------------------------------------
409 44 level-4 | 3 0 0 1 1
410 49 level-9 | 100 100 100 100 100
411 4d level-13 | 23 8 14 19 14
412 60 int-vec | 2559 2699 2752 2688 2792
413 64 itlb-miss | 3296 1548 1174 1698 1087
414 68 dtlb-miss | 114788 54313 43040 58336 38057
415 6c dtlb-prot | 1046 549 417 545 370
416 84 spill-user-32 | 66551 29480 301588 26522 213032
417 88 spill-user-64 | 0 318652 111239 299829 221716
418 8c spill-user-32-cln | 856 347 331 416 293
419 90 spill-user-64-cln | 0 55 21 59 39
420 98 spill-kern-64 | 66464 31803 24758 34004 22277
421 a4 spill-asuser-32 | 1423 569 560 698 483
422 a8 spill-asuser-64 | 0 74 32 98 46
423 ac spill-asuser-32-cln | 4875 2250 1728 2384 1584
424 b0 spill-asuser-64-cln | 0 2 0 1 0
425 c4 fill-user-32 | 64193 28418 287516 27055 202093
426 c8 fill-user-64 | 0 305016 106692 288542 210654
427 cc fill-user-32-cln | 6733 3520 15185 2396 12035
428 d0 fill-user-64-cln | 0 13226 3506 12933 11032
429 d8 fill-kern-64 | 66220 31680 24674 33892 22196
430 108 syscall-32 | 2446 967 817 1196 755
439 The \fB-t\fR option displays in-depth \fBTLB\fR statistics, including the
442 handling D-TLB misses:
447 example# \fBtrapstat -t\fR
448 cpu m| itlb-miss %tim itsb-miss %tim | dtlb-miss %tim dtsb-miss %tim |%tim
449 -----+-------------------------------+-------------------------------+----
452 -----+-------------------------------+-------------------------------+----
455 -----+-------------------------------+-------------------------------+----
458 -----+-------------------------------+-------------------------------+----
461 -----+-------------------------------+-------------------------------+----
475 By specifying the \fB-T\fR option, \fBtrapstat\fR shows \fBTLB\fR misses broken
477 handling user-mode TLB misses on 8K pages, and another 2.3 percent of its time
478 handling user-mode TLB misses on 64K pages.
483 example# \fBtrapstat -T -c 0\fR
484 cpu m size| itlb-miss %tim itsb-miss %tim | dtlb-miss %tim dtsb-miss %tim |%tim
485 ----------+-------------------------------+-------------------------------+----
490 - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - -
505 By specifying the \fB-e\fR option, \fBtrapstat\fR displays statistics for only
507 specific data. This example yields statistics for only the \fIdtlb-prot\fR and
508 \fIsyscall-32\fR traps on CPUs 12 through 15:
513 example# \fBtrapstat -e dtlb-prot,syscall-32 -c 12-15\fR
515 ------------------------+------------------------------------
516 6c dtlb-prot | 817 754 1018 560
517 108 syscall-32 | 1426 1647 2186 1142
520 ------------------------+------------------------------------
521 6c dtlb-prot | 1085 996 800 707
522 108 syscall-32 | 2578 2167 1638 1452
531 The following example uses the \fB-r\fR option to specify a sampling rate of
532 1000 samples per second, and filter only for the level-10 trap. Additionally,
533 specifying the \fB-P\fR option yields parsable output.
537 Notice the timestamp difference between the level-10 events: 9,998,000
538 nanoseconds and 10,007,000 nanoseconds. These level-10 events correspond to the
545 example# \fBtrapstat -e level-10 -P -r 1000\fR
546 1070400 0 4a level-10 0
547 2048600 0 4a level-10 0
548 3030400 0 4a level-10 1
549 4035800 0 4a level-10 0
550 5027200 0 4a level-10 0
551 6027200 0 4a level-10 0
552 7027400 0 4a level-10 0
553 8028200 0 4a level-10 0
554 9026400 0 4a level-10 0
555 10029600 0 4a level-10 0
556 11028600 0 4a level-10 0
557 12024000 0 4a level-10 0
558 13028400 0 4a level-10 1
559 14031200 0 4a level-10 0
560 15027200 0 4a level-10 0
561 16027600 0 4a level-10 0
562 17025000 0 4a level-10 0
563 18026000 0 4a level-10 0
564 19027800 0 4a level-10 0
565 20025600 0 4a level-10 0
566 21025200 0 4a level-10 0
567 22025000 0 4a level-10 0
568 23035400 0 4a level-10 1
569 24027400 0 4a level-10 0
570 25026000 0 4a level-10 0
571 26027000 0 4a level-10 0
606 \fIThe SPARC Architecture Manual, Version 9,\fR 1994, Prentice-Hall.
619 default 3-5% per trap
620 \fB-e\fR 3-5% per specified trap
621 \fB-t\fR, \fB-T\fR T{
622 40-45% per TLB miss trap hitting in the TSB, 25-30% per TLB miss trap missing in the TSB
628 These probe effects are \fIper trap\fR not for the system as a whole. For
631 less than one half of one percent; running \fBtrapstat\fR with the \fB-t\fR or
632 \fB-T\fR option on a system spending 5% of total time processing TLB misses
636 When run with the \fB-t\fR or \fB-T\fR option, \fBtrapstat\fR accounts for its
651 Due to the potential system wide degradation induced, only the super-user can