Lines Matching +full:programmable +full:- +full:clocks

21  * based on JEDEC Standard 21-C Section Annex K: Serial Presence Detect
26  *   o Base Configuration and DRAM parameters (bytes 0x00-0x3b)
27  *   o Standard Module Parameters (bytes 0x40-0x74) these vary on whether
29  *   o Manufacturing Information (bytes 0x75-0xaf)
30  *   o End User Programmable data (0xb0-0xff).
74  * is, which tells us what the module-specific section contents are. These bits,
335  * UDIMM: Raw Card Extension, Module Nominal Height. Bits 7-5 here have a raw
356  * bit for bits 4-0. We do not define each meaning of these bit combinations in
430  * RDIMM: SSTE32882: RC3 / RC2 - Drive Strength, Command/Address. The lower
442  * RDIMM: SSTE32882: RC5 / RC4 - Drive Strength, Control and Clock
451  * Bytes 72-76 have definitions but must be written as zero and are all
509  * LRDIMM: F0RC3 / F0RC2 - Timing Control & Drive Strength, Address/Command &
525  * LRDIMM: F0RC5 / F0RC4 - Drive Strength, QxODT & QxCKE and Clock
534  * LRDIMM: F1RC11 / F1RC8 - Extended Delay for Clocks, QxCS_n and QxODT & QxCKE
545  * LRDIMM: F1RC13 / F1RC12 - Additive Delay for QxCS and QxCA
557  * LRDIMM: F1RC15 / F1RC14 - Additive Delay for QxODT and QxCKE
573  * LRDIMM: F3RC9 / F3RC8 - DRAM Interface MDQ Termination and Drive Strength
575  * LRDIMM: F3RC9 / F3RC8 - DRAM Interface MDQ Termination and Drive Strength
577  * LRDIMM: F3RC9 / F3RC8 - DRAM Interface MDQ Termination and Drive Strength
599  * LRDIMM: F[3,4]RC11 / F[3,4]RC10 - Rank 0/1 R/W QxODT Control <= 1066
600  * LRDIMM: F[3,4]RC11 / F[3,4]RC10 - Rank 2/3 R/W QxODT Control <= 1066
601  * LRDIMM: F[3,4]RC11 / F[3,4]RC10 - Rank 4/5 R/W QxODT Control <= 1066
602  * LRDIMM: F[3,4]RC11 / F[3,4]RC10 - Rank 6/7 R/W QxODT Control <= 1066
603  * LRDIMM: F[3,4]RC11 / F[3,4]RC10 - Rank 0/1 R/W QxODT Control >= 1333 <= 1600
604  * LRDIMM: F[3,4]RC11 / F[3,4]RC10 - Rank 2/3 R/W QxODT Control >= 1333 <= 1600
605  * LRDIMM: F[3,4]RC11 / F[3,4]RC10 - Rank 4/5 R/W QxODT Control >= 1333 <= 1600
606  * LRDIMM: F[3,4]RC11 / F[3,4]RC10 - Rank 6/7 R/W QxODT Control >= 1333 <= 1600
607  * LRDIMM: F[3,4]RC11 / F[3,4]RC10 - Rank 0/1 R/W QxODT Control >= 1866 <= 2133
608  * LRDIMM: F[3,4]RC11 / F[3,4]RC10 - Rank 2/3 R/W QxODT Control >= 1866 <= 2133
609  * LRDIMM: F[3,4]RC11 / F[3,4]RC10 - Rank 4/5 R/W QxODT Control >= 1866 <= 2133
610  * LRDIMM: F[3,4]RC11 / F[3,4]RC10 - Rank 6/7 R/W QxODT Control >= 1866 <= 2133
681  * S2.3 Unique Module ID Bytes. This is a two byte JEP-108 style ID.
722  * DRAM Manufacturer ID Code. This is a two byte JEP-108 style ID.