Lines Matching refs:load_end
486 prof_mod.endaddr = mi->load_end; in dump_modules()
560 (lbase > modules.load_end && lend > modules.load_end)) { in fixup_maps()
563 mi->load_end = lend; in fixup_maps()
572 mi->load_base = CEIL(modules.load_end + PGSZ, PGSZ); in fixup_maps()
573 mi->load_end = mi->load_base + (lend - lbase); in fixup_maps()
575 lbase = CEIL(mi->load_end + PGSZ, PGSZ); in fixup_maps()
835 while ((pcptr < pcse) && (*pcptr < module->load_end)) { in assign_pcsamples()
974 if (addr >= mi->load_base && addr < mi->load_end) in find_module()
1074 if (new->startaddr >= old->load_end && new->endaddr >= old->load_end) in does_overlap()
1203 mi->load_end = newmodp->endaddr; in process_modules()
1215 "end=%#llx\n", mi->load_base, mi->load_end); in process_modules()
1243 new_module->load_end = newmodp->endaddr; in process_modules()
1255 new_module->load_base, new_module->load_end); in process_modules()