148 #define CRB_CMD_SIZE_READ(regs) (regs.cmd_size)  argument
149 #define CRB_CMD_SIZE_WRITE(regs, val) \  argument
151 		regs.cmd_size = val;  \
153 #define CRB_CMD_ADDR_READ(regs) \  argument
154 	(((uint64_t)regs.cmd_addr_hi << 32) | regs.cmd_addr_lo)
155 #define CRB_CMD_ADDR_WRITE(regs, val)                \  argument
157 		regs.cmd_addr_lo = val & 0xFFFFFFFF; \
158 		regs.cmd_addr_hi = val >> 32;        \
160 #define CRB_RSP_SIZE_READ(regs) (regs.rsp_size)  argument
161 #define CRB_RSP_SIZE_WRITE(regs, val) \  argument
163 		regs.rsp_size = val;  \
165 #define CRB_RSP_ADDR_READ(regs) (regs.rsp_addr)  argument
166 #define CRB_RSP_ADDR_WRITE(regs, val) \  argument
168 		regs.rsp_addr = val;  \
184 	struct tpm_crb_regs regs;  member
211 		const uint64_t cmd_addr = CRB_CMD_ADDR_READ(crb->regs);  in tpm_crb_thread()
212 		const uint64_t rsp_addr = CRB_RSP_ADDR_READ(crb->regs);  in tpm_crb_thread()
213 		const uint32_t cmd_size = CRB_CMD_SIZE_READ(crb->regs);  in tpm_crb_thread()
214 		const uint32_t rsp_size = CRB_RSP_SIZE_READ(crb->regs);  in tpm_crb_thread()
251 		memcpy(cmd, crb->regs.data_buffer, TPM_CRB_DATA_BUFFER_SIZE);  in tpm_crb_thread()
288 		memset(crb->regs.data_buffer, 0, TPM_CRB_DATA_BUFFER_SIZE);  in tpm_crb_thread()
289 		memcpy(&crb->regs.data_buffer[rsp_off], &rsp[rsp_off], rsp_size);  in tpm_crb_thread()
291 		crb->regs.ctrl_start.start = false;  in tpm_crb_thread()
332 	ptr = (uint8_t *)&crb->regs + off;  in tpm_crb_mem_handler()
350 				crb->regs.loc_sts.granted = false;  in tpm_crb_mem_handler()
351 				crb->regs.loc_state.loc_assigned = false;  in tpm_crb_mem_handler()
353 				crb->regs.loc_sts.granted = true;  in tpm_crb_mem_handler()
354 				crb->regs.loc_state.loc_assigned = true;  in tpm_crb_mem_handler()
369 				crb->regs.ctrl_sts.tpm_idle = false;  in tpm_crb_mem_handler()
371 				crb->regs.ctrl_sts.tpm_idle = true;  in tpm_crb_mem_handler()
399 			if (!start.start || crb->regs.ctrl_start.start) {  in tpm_crb_mem_handler()
404 			crb->regs.ctrl_start.start = true;  in tpm_crb_mem_handler()
491 	crb->regs.loc_state.tpm_req_valid_sts = true;  in tpm_crb_init()
492 	crb->regs.loc_state.tpm_established = true;  in tpm_crb_init()
494 	crb->regs.intf_id.interface_type = TPM_INTF_TYPE_CRB;  in tpm_crb_init()
495 	crb->regs.intf_id.interface_version = TPM_INTF_VERSION_CRB;  in tpm_crb_init()
496 	crb->regs.intf_id.cap_locality = false;  in tpm_crb_init()
497 	crb->regs.intf_id.cap_crb_idle_bypass = false;  in tpm_crb_init()
498 	crb->regs.intf_id.cap_data_xfer_size_support =  in tpm_crb_init()
500 	crb->regs.intf_id.cap_fifo = false;  in tpm_crb_init()
501 	crb->regs.intf_id.cap_crb = true;  in tpm_crb_init()
502 	crb->regs.intf_id.interface_selector = TPM_INTF_SELECTOR_CRB;  in tpm_crb_init()
503 	crb->regs.intf_id.intf_sel_lock = false;  in tpm_crb_init()
504 	crb->regs.intf_id.rid = 0;  in tpm_crb_init()
505 	crb->regs.intf_id.vid = 0x1014; /* IBM */  in tpm_crb_init()
506 	crb->regs.intf_id.did = 0x1014; /* IBM */  in tpm_crb_init()
508 	crb->regs.ctrl_sts.tpm_idle = true;  in tpm_crb_init()
510 	CRB_CMD_SIZE_WRITE(crb->regs, TPM_CRB_DATA_BUFFER_SIZE);  in tpm_crb_init()
511 	CRB_CMD_ADDR_WRITE(crb->regs, TPM_CRB_DATA_BUFFER_ADDRESS);  in tpm_crb_init()
512 	CRB_RSP_SIZE_WRITE(crb->regs, TPM_CRB_DATA_BUFFER_SIZE);  in tpm_crb_init()
513 	CRB_RSP_ADDR_WRITE(crb->regs, TPM_CRB_DATA_BUFFER_ADDRESS);  in tpm_crb_init()