Lines Matching refs:trb
338 static void pci_xhci_dump_trb(struct xhci_trb *trb);
935 struct xhci_trb *trb) in pci_xhci_cmd_address_device() argument
944 input_ctx = XHCI_GADDR(sc, trb->qwTrb0 & ~0xFUL); in pci_xhci_cmd_address_device()
1022 struct xhci_trb *trb) in pci_xhci_cmd_config_ep() argument
1040 if ((trb->dwTrb3 & XHCI_TRB_3_DCEP_BIT) != 0) { in pci_xhci_cmd_config_ep()
1094 input_ctx = XHCI_GADDR(sc, trb->qwTrb0 & ~0xFUL); in pci_xhci_cmd_config_ep()
1145 struct xhci_trb *trb) in pci_xhci_cmd_reset_ep() argument
1154 epid = XHCI_TRB_3_EP_GET(trb->dwTrb3); in pci_xhci_cmd_reset_ep()
1165 type = XHCI_TRB_3_TYPE_GET(trb->dwTrb3); in pci_xhci_cmd_reset_ep()
1168 (trb->dwTrb3 & XHCI_TRB_3_SUSP_EP_BIT) != 0) { in pci_xhci_cmd_reset_ep()
1240 struct xhci_trb *trb) in pci_xhci_cmd_set_tr() argument
1257 (trb->qwTrb0 & ~0xF), (uint32_t)((trb->qwTrb0 >> 1) & 0x7), in pci_xhci_cmd_set_tr()
1258 (uint32_t)(trb->qwTrb0 & 0x1))); in pci_xhci_cmd_set_tr()
1260 (trb->dwTrb2 >> 16) & 0xFFFF, in pci_xhci_cmd_set_tr()
1261 XHCI_TRB_3_SLOT_GET(trb->dwTrb3), in pci_xhci_cmd_set_tr()
1262 XHCI_TRB_3_EP_GET(trb->dwTrb3), trb->dwTrb3 & 0x1)); in pci_xhci_cmd_set_tr()
1264 epid = XHCI_TRB_3_EP_GET(trb->dwTrb3); in pci_xhci_cmd_set_tr()
1288 streamid = XHCI_TRB_2_STREAM_GET(trb->dwTrb2); in pci_xhci_cmd_set_tr()
1294 devep->ep_sctx[streamid].qwSctx0 = trb->qwTrb0; in pci_xhci_cmd_set_tr()
1296 trb->qwTrb0 & ~0xF; in pci_xhci_cmd_set_tr()
1298 XHCI_EPCTX_2_DCS_GET(trb->qwTrb0); in pci_xhci_cmd_set_tr()
1305 ep_ctx->qwEpCtx2 = trb->qwTrb0 & ~0xFUL; in pci_xhci_cmd_set_tr()
1307 devep->ep_ccs = trb->qwTrb0 & 0x1; in pci_xhci_cmd_set_tr()
1321 struct xhci_trb *trb) in pci_xhci_cmd_eval_ctx() argument
1329 input_ctx = XHCI_GADDR(sc, trb->qwTrb0 & ~0xFUL); in pci_xhci_cmd_eval_ctx()
1402 struct xhci_trb *trb; in pci_xhci_complete_commands() local
1413 trb = sc->opregs.cr_p; in pci_xhci_complete_commands()
1418 sc->opregs.cr_p = trb; in pci_xhci_complete_commands()
1420 type = XHCI_TRB_3_TYPE_GET(trb->dwTrb3); in pci_xhci_complete_commands()
1422 if ((trb->dwTrb3 & XHCI_TRB_3_CYCLE_BIT) != in pci_xhci_complete_commands()
1428 type, trb->qwTrb0, trb->dwTrb2, trb->dwTrb3, in pci_xhci_complete_commands()
1429 trb->dwTrb3 & XHCI_TRB_3_CYCLE_BIT, ccs)); in pci_xhci_complete_commands()
1439 if (trb->dwTrb3 & XHCI_TRB_3_TC_BIT) in pci_xhci_complete_commands()
1448 slot = XHCI_TRB_3_SLOT_GET(trb->dwTrb3); in pci_xhci_complete_commands()
1453 slot = XHCI_TRB_3_SLOT_GET(trb->dwTrb3); in pci_xhci_complete_commands()
1454 cmderr = pci_xhci_cmd_address_device(sc, slot, trb); in pci_xhci_complete_commands()
1458 slot = XHCI_TRB_3_SLOT_GET(trb->dwTrb3); in pci_xhci_complete_commands()
1459 cmderr = pci_xhci_cmd_config_ep(sc, slot, trb); in pci_xhci_complete_commands()
1463 slot = XHCI_TRB_3_SLOT_GET(trb->dwTrb3); in pci_xhci_complete_commands()
1464 cmderr = pci_xhci_cmd_eval_ctx(sc, slot, trb); in pci_xhci_complete_commands()
1469 slot = XHCI_TRB_3_SLOT_GET(trb->dwTrb3); in pci_xhci_complete_commands()
1470 cmderr = pci_xhci_cmd_reset_ep(sc, slot, trb); in pci_xhci_complete_commands()
1475 slot = XHCI_TRB_3_SLOT_GET(trb->dwTrb3); in pci_xhci_complete_commands()
1476 cmderr = pci_xhci_cmd_reset_ep(sc, slot, trb); in pci_xhci_complete_commands()
1480 slot = XHCI_TRB_3_SLOT_GET(trb->dwTrb3); in pci_xhci_complete_commands()
1481 cmderr = pci_xhci_cmd_set_tr(sc, slot, trb); in pci_xhci_complete_commands()
1485 slot = XHCI_TRB_3_SLOT_GET(trb->dwTrb3); in pci_xhci_complete_commands()
1525 trb = pci_xhci_trb_next(sc, trb, &crcr); in pci_xhci_complete_commands()
1534 pci_xhci_dump_trb(struct xhci_trb *trb) in pci_xhci_dump_trb() argument
1564 type = XHCI_TRB_3_TYPE_GET(trb->dwTrb3); in pci_xhci_dump_trb()
1566 trb, type, in pci_xhci_dump_trb()
1568 trb->qwTrb0, trb->dwTrb2, trb->dwTrb3)); in pci_xhci_dump_trb()
1579 struct xhci_trb *trb; in pci_xhci_xfer_complete() local
1601 trb = XHCI_GADDR(sc, evtrb.qwTrb0); in pci_xhci_xfer_complete()
1602 trbflags = trb->dwTrb3; in pci_xhci_xfer_complete()
1609 trb->dwTrb3 & XHCI_TRB_3_IOC_BIT ? 1 : 0)); in pci_xhci_xfer_complete()
1619 trb->dwTrb3 = (trb->dwTrb3 & ~0x1) | (xfer->data[i].ccs); in pci_xhci_xfer_complete()
1626 if (!(trb->dwTrb3 & XHCI_TRB_3_IOC_BIT) && in pci_xhci_xfer_complete()
1628 (trb->dwTrb3 & XHCI_TRB_3_ISP_BIT))) { in pci_xhci_xfer_complete()
1642 evtrb.qwTrb0 = trb->qwTrb0; in pci_xhci_xfer_complete()
1763 struct xhci_endp_ctx *ep_ctx, struct xhci_trb *trb, uint32_t slot, in pci_xhci_handle_transfer() argument
1789 pci_xhci_dump_trb(trb); in pci_xhci_handle_transfer()
1791 trbflags = trb->dwTrb3; in pci_xhci_handle_transfer()
1805 if (trb->dwTrb3 & XHCI_TRB_3_TC_BIT) in pci_xhci_handle_transfer()
1815 XHCI_TRB_2_BYTES_GET(trb->dwTrb2) != 8) { in pci_xhci_handle_transfer()
1820 setup_trb = trb; in pci_xhci_handle_transfer()
1822 val = trb->qwTrb0; in pci_xhci_handle_transfer()
1847 &trb->qwTrb0 : XHCI_GADDR(sc, trb->qwTrb0)), in pci_xhci_handle_transfer()
1848 trb->dwTrb2 & 0x1FFFF, (void *)addr, ccs); in pci_xhci_handle_transfer()
1878 trb = pci_xhci_trb_next(sc, trb, &addr); in pci_xhci_handle_transfer()
1880 DPRINTF(("pci_xhci: next trb: 0x%lx", (uint64_t)trb)); in pci_xhci_handle_transfer()
1961 struct xhci_trb *trb; in pci_xhci_device_doorbell() local
2028 trb = XHCI_GADDR(sc, sctx_tr->ringaddr & ~0xFUL); in pci_xhci_device_doorbell()
2031 trb->dwTrb3 & XHCI_TRB_3_CYCLE_BIT)); in pci_xhci_device_doorbell()
2039 trb = devep->ep_tr; in pci_xhci_device_doorbell()
2042 trb->dwTrb3 & XHCI_TRB_3_CYCLE_BIT)); in pci_xhci_device_doorbell()
2045 if (XHCI_TRB_3_TYPE_GET(trb->dwTrb3) == 0) { in pci_xhci_device_doorbell()
2051 pci_xhci_handle_transfer(sc, dev, devep, ep_ctx, trb, slot, epid, in pci_xhci_device_doorbell()