66 	int	(*pe_cfgwrite)(struct pci_devinst *pi, int offset,
68 	int	(*pe_cfgread)(struct pci_devinst *pi, int offset,
73 				 uint64_t offset, int size, uint64_t value);
75 				uint64_t offset, int size);
240 void	pci_emul_capwrite(struct pci_devinst *pi, int offset, int bytes,
258 int	pci_emul_msix_twrite(struct pci_devinst *pi, uint64_t offset, int size,
260 uint64_t pci_emul_msix_tread(struct pci_devinst *pi, uint64_t offset, int size);
268 pci_set_cfgdata8(struct pci_devinst *pi, int offset, uint8_t val)  in pci_set_cfgdata8()  argument
270 	assert(offset <= PCI_REGMAX);  in pci_set_cfgdata8()
271 	*(uint8_t *)(pi->pi_cfgdata + offset) = val;  in pci_set_cfgdata8()
275 pci_set_cfgdata16(struct pci_devinst *pi, int offset, uint16_t val)  in pci_set_cfgdata16()  argument
277 	assert(offset <= (PCI_REGMAX - 1) && (offset & 1) == 0);  in pci_set_cfgdata16()
278 	*(uint16_t *)(pi->pi_cfgdata + offset) = val;  in pci_set_cfgdata16()
282 pci_set_cfgdata32(struct pci_devinst *pi, int offset, uint32_t val)  in pci_set_cfgdata32()  argument
284 	assert(offset <= (PCI_REGMAX - 3) && (offset & 3) == 0);  in pci_set_cfgdata32()
285 	*(uint32_t *)(pi->pi_cfgdata + offset) = val;  in pci_set_cfgdata32()
289 pci_get_cfgdata8(struct pci_devinst *pi, int offset)  in pci_get_cfgdata8()  argument
291 	assert(offset <= PCI_REGMAX);  in pci_get_cfgdata8()
292 	return (*(uint8_t *)(pi->pi_cfgdata + offset));  in pci_get_cfgdata8()
296 pci_get_cfgdata16(struct pci_devinst *pi, int offset)  in pci_get_cfgdata16()  argument
298 	assert(offset <= (PCI_REGMAX - 1) && (offset & 1) == 0);  in pci_get_cfgdata16()
299 	return (*(uint16_t *)(pi->pi_cfgdata + offset));  in pci_get_cfgdata16()
303 pci_get_cfgdata32(struct pci_devinst *pi, int offset)  in pci_get_cfgdata32()  argument
305 	assert(offset <= (PCI_REGMAX - 3) && (offset & 3) == 0);  in pci_get_cfgdata32()
306 	return (*(uint32_t *)(pi->pi_cfgdata + offset));  in pci_get_cfgdata32()