Lines Matching refs:sc
356 static void e82545_reset(struct e82545_softc *sc, int dev);
357 static void e82545_rx_enable(struct e82545_softc *sc);
358 static void e82545_rx_disable(struct e82545_softc *sc);
360 static void e82545_tx_start(struct e82545_softc *sc);
361 static void e82545_tx_enable(struct e82545_softc *sc);
362 static void e82545_tx_disable(struct e82545_softc *sc);
378 e82545_init_eeprom(struct e82545_softc *sc) in e82545_init_eeprom() argument
383 sc->eeprom_data[NVM_MAC_ADDR] = ((uint16_t)sc->esc_mac.octet[0]) | in e82545_init_eeprom()
384 (((uint16_t)sc->esc_mac.octet[1]) << 8); in e82545_init_eeprom()
385 sc->eeprom_data[NVM_MAC_ADDR+1] = ((uint16_t)sc->esc_mac.octet[2]) | in e82545_init_eeprom()
386 (((uint16_t)sc->esc_mac.octet[3]) << 8); in e82545_init_eeprom()
387 sc->eeprom_data[NVM_MAC_ADDR+2] = ((uint16_t)sc->esc_mac.octet[4]) | in e82545_init_eeprom()
388 (((uint16_t)sc->esc_mac.octet[5]) << 8); in e82545_init_eeprom()
391 sc->eeprom_data[NVM_SUB_DEV_ID] = E82545_SUBDEV_ID; in e82545_init_eeprom()
392 sc->eeprom_data[NVM_SUB_VEN_ID] = E82545_VENDOR_ID_INTEL; in e82545_init_eeprom()
393 sc->eeprom_data[NVM_DEV_ID] = E82545_DEV_ID_82545EM_COPPER; in e82545_init_eeprom()
394 sc->eeprom_data[NVM_VEN_ID] = E82545_VENDOR_ID_INTEL; in e82545_init_eeprom()
399 checksum += sc->eeprom_data[i]; in e82545_init_eeprom()
402 sc->eeprom_data[NVM_CHECKSUM_REG] = checksum; in e82545_init_eeprom()
407 e82545_write_mdi(struct e82545_softc *sc __unused, uint8_t reg_addr, in e82545_write_mdi()
414 e82545_read_mdi(struct e82545_softc *sc __unused, uint8_t reg_addr, in e82545_read_mdi()
441 e82545_eecd_strobe(struct e82545_softc *sc) in e82545_eecd_strobe() argument
450 if (sc->nvm_bits == 0) { in e82545_eecd_strobe()
453 sc->nvm_mode, sc->nvm_bits, in e82545_eecd_strobe()
454 sc->nvm_opaddr, sc->nvm_data); in e82545_eecd_strobe()
457 sc->nvm_bits--; in e82545_eecd_strobe()
458 if (sc->nvm_mode == E82545_NVM_MODE_DATAOUT) { in e82545_eecd_strobe()
460 if (sc->nvm_data & 0x8000) { in e82545_eecd_strobe()
461 sc->eeprom_control |= E1000_EECD_DO; in e82545_eecd_strobe()
463 sc->eeprom_control &= ~E1000_EECD_DO; in e82545_eecd_strobe()
465 sc->nvm_data <<= 1; in e82545_eecd_strobe()
466 if (sc->nvm_bits == 0) { in e82545_eecd_strobe()
468 sc->nvm_opaddr = 0; in e82545_eecd_strobe()
469 sc->nvm_mode = E82545_NVM_MODE_OPADDR; in e82545_eecd_strobe()
470 sc->nvm_bits = E82545_NVM_OPADDR_BITS; in e82545_eecd_strobe()
472 } else if (sc->nvm_mode == E82545_NVM_MODE_DATAIN) { in e82545_eecd_strobe()
474 sc->nvm_data <<= 1; in e82545_eecd_strobe()
475 if (sc->eeprom_control & E1000_EECD_DI) { in e82545_eecd_strobe()
476 sc->nvm_data |= 1; in e82545_eecd_strobe()
478 if (sc->nvm_bits == 0) { in e82545_eecd_strobe()
480 uint16_t op = sc->nvm_opaddr & E82545_NVM_OPCODE_MASK; in e82545_eecd_strobe()
481 uint16_t addr = sc->nvm_opaddr & E82545_NVM_ADDR_MASK; in e82545_eecd_strobe()
484 sc->nvm_opaddr); in e82545_eecd_strobe()
487 sc->nvm_opaddr); in e82545_eecd_strobe()
490 addr, sc->nvm_data); in e82545_eecd_strobe()
491 sc->eeprom_data[addr] = sc->nvm_data; in e82545_eecd_strobe()
494 sc->nvm_opaddr = 0; in e82545_eecd_strobe()
495 sc->nvm_mode = E82545_NVM_MODE_OPADDR; in e82545_eecd_strobe()
496 sc->nvm_bits = E82545_NVM_OPADDR_BITS; in e82545_eecd_strobe()
498 } else if (sc->nvm_mode == E82545_NVM_MODE_OPADDR) { in e82545_eecd_strobe()
499 sc->nvm_opaddr <<= 1; in e82545_eecd_strobe()
500 if (sc->eeprom_control & E1000_EECD_DI) { in e82545_eecd_strobe()
501 sc->nvm_opaddr |= 1; in e82545_eecd_strobe()
503 if (sc->nvm_bits == 0) { in e82545_eecd_strobe()
504 uint16_t op = sc->nvm_opaddr & E82545_NVM_OPCODE_MASK; in e82545_eecd_strobe()
508 sc->nvm_opaddr); in e82545_eecd_strobe()
510 sc->nvm_opaddr = 0; in e82545_eecd_strobe()
511 sc->nvm_mode = E82545_NVM_MODE_OPADDR; in e82545_eecd_strobe()
512 sc->nvm_bits = E82545_NVM_OPADDR_BITS; in e82545_eecd_strobe()
516 uint16_t addr = sc->nvm_opaddr & in e82545_eecd_strobe()
518 sc->nvm_mode = E82545_NVM_MODE_DATAOUT; in e82545_eecd_strobe()
519 sc->nvm_bits = E82545_NVM_DATA_BITS; in e82545_eecd_strobe()
521 sc->nvm_data = sc->eeprom_data[addr]; in e82545_eecd_strobe()
523 addr, sc->nvm_data); in e82545_eecd_strobe()
526 sc->nvm_opaddr); in e82545_eecd_strobe()
527 sc->nvm_data = 0; in e82545_eecd_strobe()
532 sc->nvm_mode = E82545_NVM_MODE_DATAIN; in e82545_eecd_strobe()
533 sc->nvm_bits = E82545_NVM_DATA_BITS; in e82545_eecd_strobe()
534 sc->nvm_data = 0; in e82545_eecd_strobe()
538 sc->nvm_opaddr); in e82545_eecd_strobe()
540 sc->nvm_opaddr = 0; in e82545_eecd_strobe()
541 sc->nvm_mode = E82545_NVM_MODE_OPADDR; in e82545_eecd_strobe()
542 sc->nvm_bits = E82545_NVM_OPADDR_BITS; in e82545_eecd_strobe()
548 sc->nvm_mode, sc->nvm_bits, in e82545_eecd_strobe()
549 sc->nvm_opaddr, sc->nvm_data); in e82545_eecd_strobe()
557 struct e82545_softc *sc = param; in e82545_itr_callback() local
559 pthread_mutex_lock(&sc->esc_mtx); in e82545_itr_callback()
560 new = sc->esc_ICR & sc->esc_IMS; in e82545_itr_callback()
561 if (new && !sc->esc_irq_asserted) { in e82545_itr_callback()
563 sc->esc_irq_asserted = 1; in e82545_itr_callback()
564 pci_lintr_assert(sc->esc_pi); in e82545_itr_callback()
566 mevent_delete(sc->esc_mevpitr); in e82545_itr_callback()
567 sc->esc_mevpitr = NULL; in e82545_itr_callback()
569 pthread_mutex_unlock(&sc->esc_mtx); in e82545_itr_callback()
573 e82545_icr_assert(struct e82545_softc *sc, uint32_t bits) in e82545_icr_assert() argument
584 new = bits & ~sc->esc_ICR & sc->esc_IMS; in e82545_icr_assert()
585 sc->esc_ICR |= bits; in e82545_icr_assert()
588 DPRINTF("icr assert: masked %x, ims %x", new, sc->esc_IMS); in e82545_icr_assert()
589 } else if (sc->esc_mevpitr != NULL) { in e82545_icr_assert()
590 DPRINTF("icr assert: throttled %x, ims %x", new, sc->esc_IMS); in e82545_icr_assert()
591 } else if (!sc->esc_irq_asserted) { in e82545_icr_assert()
593 sc->esc_irq_asserted = 1; in e82545_icr_assert()
594 pci_lintr_assert(sc->esc_pi); in e82545_icr_assert()
595 if (sc->esc_ITR != 0) { in e82545_icr_assert()
596 sc->esc_mevpitr = mevent_add( in e82545_icr_assert()
597 (sc->esc_ITR + 3905) / 3906, /* 256ns -> 1ms */ in e82545_icr_assert()
598 EVF_TIMER, e82545_itr_callback, sc); in e82545_icr_assert()
604 e82545_ims_change(struct e82545_softc *sc, uint32_t bits) in e82545_ims_change() argument
612 new = bits & sc->esc_ICR & ~sc->esc_IMS; in e82545_ims_change()
613 sc->esc_IMS |= bits; in e82545_ims_change()
616 DPRINTF("ims change: masked %x, ims %x", new, sc->esc_IMS); in e82545_ims_change()
617 } else if (sc->esc_mevpitr != NULL) { in e82545_ims_change()
618 DPRINTF("ims change: throttled %x, ims %x", new, sc->esc_IMS); in e82545_ims_change()
619 } else if (!sc->esc_irq_asserted) { in e82545_ims_change()
621 sc->esc_irq_asserted = 1; in e82545_ims_change()
622 pci_lintr_assert(sc->esc_pi); in e82545_ims_change()
623 if (sc->esc_ITR != 0) { in e82545_ims_change()
624 sc->esc_mevpitr = mevent_add( in e82545_ims_change()
625 (sc->esc_ITR + 3905) / 3906, /* 256ns -> 1ms */ in e82545_ims_change()
626 EVF_TIMER, e82545_itr_callback, sc); in e82545_ims_change()
632 e82545_icr_deassert(struct e82545_softc *sc, uint32_t bits) in e82545_icr_deassert() argument
636 sc->esc_ICR &= ~bits; in e82545_icr_deassert()
642 if (sc->esc_irq_asserted && !(sc->esc_ICR & sc->esc_IMS)) { in e82545_icr_deassert()
644 pci_lintr_deassert(sc->esc_pi); in e82545_icr_deassert()
645 sc->esc_irq_asserted = 0; in e82545_icr_deassert()
650 e82545_intr_write(struct e82545_softc *sc, uint32_t offset, uint32_t value) in e82545_intr_write() argument
657 e82545_icr_deassert(sc, value); in e82545_intr_write()
660 sc->esc_ITR = value; in e82545_intr_write()
663 sc->esc_ICS = value; /* not used: store for debug */ in e82545_intr_write()
664 e82545_icr_assert(sc, value); in e82545_intr_write()
667 e82545_ims_change(sc, value); in e82545_intr_write()
670 sc->esc_IMC = value; /* for debug */ in e82545_intr_write()
671 sc->esc_IMS &= ~value; in e82545_intr_write()
681 e82545_intr_read(struct e82545_softc *sc, uint32_t offset) in e82545_intr_read() argument
691 retval = sc->esc_ICR; in e82545_intr_read()
692 sc->esc_ICR = 0; in e82545_intr_read()
693 e82545_icr_deassert(sc, ~0); in e82545_intr_read()
696 retval = sc->esc_ITR; in e82545_intr_read()
702 retval = sc->esc_IMS; in e82545_intr_read()
715 e82545_devctl(struct e82545_softc *sc, uint32_t val) in e82545_devctl() argument
718 sc->esc_CTRL = val & ~E1000_CTRL_RST; in e82545_devctl()
722 e82545_reset(sc, 1); in e82545_devctl()
728 e82545_rx_update_rdba(struct e82545_softc *sc) in e82545_rx_update_rdba() argument
732 sc->esc_rdba = (uint64_t)sc->esc_RDBAH << 32 | in e82545_rx_update_rdba()
733 sc->esc_RDBAL; in e82545_rx_update_rdba()
736 sc->esc_rxdesc = paddr_guest2host(sc->esc_ctx, in e82545_rx_update_rdba()
737 sc->esc_rdba, sc->esc_RDLEN); in e82545_rx_update_rdba()
741 e82545_rx_ctl(struct e82545_softc *sc, uint32_t val) in e82545_rx_ctl() argument
748 sc->esc_RCTL = val & ~0xF9204c01; in e82545_rx_ctl()
751 on ? "on" : "off", sc->esc_RCTL, val); in e82545_rx_ctl()
754 if (on != sc->esc_rx_enabled) { in e82545_rx_ctl()
759 if (sc->esc_RCTL & E1000_RCTL_LBM_TCVR) { in e82545_rx_ctl()
760 sc->esc_rx_loopback = 1; in e82545_rx_ctl()
762 sc->esc_rx_loopback = 0; in e82545_rx_ctl()
765 e82545_rx_update_rdba(sc); in e82545_rx_ctl()
766 e82545_rx_enable(sc); in e82545_rx_ctl()
768 e82545_rx_disable(sc); in e82545_rx_ctl()
769 sc->esc_rx_loopback = 0; in e82545_rx_ctl()
770 sc->esc_rdba = 0; in e82545_rx_ctl()
771 sc->esc_rxdesc = NULL; in e82545_rx_ctl()
777 e82545_tx_update_tdba(struct e82545_softc *sc) in e82545_tx_update_tdba() argument
781 sc->esc_tdba = (uint64_t)sc->esc_TDBAH << 32 | sc->esc_TDBAL; in e82545_tx_update_tdba()
784 sc->esc_txdesc = paddr_guest2host(sc->esc_ctx, sc->esc_tdba, in e82545_tx_update_tdba()
785 sc->esc_TDLEN); in e82545_tx_update_tdba()
789 e82545_tx_ctl(struct e82545_softc *sc, uint32_t val) in e82545_tx_ctl() argument
796 if (on == sc->esc_tx_enabled) in e82545_tx_ctl()
800 e82545_tx_update_tdba(sc); in e82545_tx_ctl()
801 e82545_tx_enable(sc); in e82545_tx_ctl()
803 e82545_tx_disable(sc); in e82545_tx_ctl()
804 sc->esc_tdba = 0; in e82545_tx_ctl()
805 sc->esc_txdesc = NULL; in e82545_tx_ctl()
809 sc->esc_TCTL = val & ~0xFE800005; in e82545_tx_ctl()
832 struct e82545_softc *sc = param; in e82545_rx_callback() local
840 pthread_mutex_lock(&sc->esc_mtx); in e82545_rx_callback()
841 DPRINTF("rx_run: head %x, tail %x", sc->esc_RDH, sc->esc_RDT); in e82545_rx_callback()
843 if (!sc->esc_rx_enabled || sc->esc_rx_loopback) { in e82545_rx_callback()
845 sc->esc_rx_enabled, sc->esc_rx_loopback); in e82545_rx_callback()
846 while (netbe_rx_discard(sc->esc_be) > 0) { in e82545_rx_callback()
850 bufsz = e82545_bufsz(sc->esc_RCTL); in e82545_rx_callback()
851 maxpktsz = (sc->esc_RCTL & E1000_RCTL_LPE) ? 16384 : 1522; in e82545_rx_callback()
853 size = sc->esc_RDLEN / 16; in e82545_rx_callback()
854 head = sc->esc_RDH; in e82545_rx_callback()
855 left = (size + sc->esc_RDT - head) % size; in e82545_rx_callback()
859 while (netbe_rx_discard(sc->esc_be) > 0) { in e82545_rx_callback()
864 sc->esc_rx_active = 1; in e82545_rx_callback()
865 pthread_mutex_unlock(&sc->esc_mtx); in e82545_rx_callback()
871 rxd = &sc->esc_rxdesc[(head + i) % size]; in e82545_rx_callback()
872 vec[i].iov_base = paddr_guest2host(sc->esc_ctx, in e82545_rx_callback()
876 len = netbe_recv(sc->esc_be, vec, maxpktdesc); in e82545_rx_callback()
889 if (!(sc->esc_RCTL & E1000_RCTL_SECRC)) in e82545_rx_callback()
898 if ((sc->esc_RCTL & E1000_RCTL_VFE) && in e82545_rx_callback()
899 (ntohs(tp[0]) == sc->esc_VET)) { in e82545_rx_callback()
901 if ((sc->esc_fvlan[tag >> 5] & in e82545_rx_callback()
913 rxd = &sc->esc_rxdesc[(head + i) % size]; in e82545_rx_callback()
920 rxd = &sc->esc_rxdesc[(head + i) % size]; in e82545_rx_callback()
930 if ((uint32_t)len <= sc->esc_RSRPD) { in e82545_rx_callback()
942 pthread_mutex_lock(&sc->esc_mtx); in e82545_rx_callback()
943 sc->esc_rx_active = 0; in e82545_rx_callback()
944 if (sc->esc_rx_enabled == 0) in e82545_rx_callback()
945 pthread_cond_signal(&sc->esc_rx_cond); in e82545_rx_callback()
947 sc->esc_RDH = head; in e82545_rx_callback()
949 left = (size + sc->esc_RDT - head) % size; in e82545_rx_callback()
950 if (left < (size >> (((sc->esc_RCTL >> 8) & 3) + 1))) in e82545_rx_callback()
954 e82545_icr_assert(sc, cause); in e82545_rx_callback()
956 DPRINTF("rx_run done: head %x, tail %x", sc->esc_RDH, sc->esc_RDT); in e82545_rx_callback()
957 pthread_mutex_unlock(&sc->esc_mtx); in e82545_rx_callback()
1051 e82545_transmit_backend(struct e82545_softc *sc, struct iovec *iov, int iovcnt) in e82545_transmit_backend() argument
1054 if (sc->esc_be == NULL) in e82545_transmit_backend()
1057 (void) netbe_send(sc->esc_be, iov, iovcnt); in e82545_transmit_backend()
1061 e82545_transmit_done(struct e82545_softc *sc, uint16_t head, uint16_t tail, in e82545_transmit_done() argument
1067 dsc = &sc->esc_txdesc[head]; in e82545_transmit_done()
1076 e82545_transmit(struct e82545_softc *sc, uint16_t head, uint16_t tail, in e82545_transmit() argument
1108 dsc = &sc->esc_txdesc[head]; in e82545_transmit()
1119 sc->esc_txctx = dsc->cd; in e82545_transmit()
1160 iov[iovcnt].iov_base = paddr_guest2host(sc->esc_ctx, in e82545_transmit()
1180 cd = &sc->esc_txctx; in e82545_transmit()
1223 if ((sc->esc_CTRL & E1000_CTRL_VME) && in e82545_transmit()
1240 hdrlen = sc->esc_txctx.tcp_seg_setup.fields.hdr_len; in e82545_transmit()
1288 if (sc->esc_txctx.cmd_and_length & E1000_TXD_CMD_TCP) { in e82545_transmit()
1363 hdr[ETHER_ADDR_LEN*2 + 0] = sc->esc_VET >> 8; in e82545_transmit()
1364 hdr[ETHER_ADDR_LEN*2 + 1] = sc->esc_VET & 0xff; in e82545_transmit()
1391 e82545_transmit_backend(sc, iov, iovcnt); in e82545_transmit()
1396 tcp = (sc->esc_txctx.cmd_and_length & E1000_TXD_CMD_TCP) != 0; in e82545_transmit()
1397 mss = sc->esc_txctx.tcp_seg_setup.fields.mss; in e82545_transmit()
1398 paylen = (sc->esc_txctx.cmd_and_length & 0x000fffff); in e82545_transmit()
1443 if (sc->esc_txctx.cmd_and_length & E1000_TXD_CMD_IP) { in e82545_transmit()
1485 e82545_transmit_backend(sc, tiov, tiovcnt); in e82545_transmit()
1490 e82545_transmit_done(sc, ohead, head, dsize, tdwb); in e82545_transmit()
1497 e82545_tx_run(struct e82545_softc *sc) in e82545_tx_run() argument
1503 size = sc->esc_TDLEN / 16; in e82545_tx_run()
1507 head = sc->esc_TDH % size; in e82545_tx_run()
1508 tail = sc->esc_TDT % size; in e82545_tx_run()
1510 sc->esc_TDH, sc->esc_TDHr, sc->esc_TDT); in e82545_tx_run()
1512 pthread_mutex_unlock(&sc->esc_mtx); in e82545_tx_run()
1515 for (lim = size / 4; sc->esc_tx_enabled && lim > 0; lim -= sent) { in e82545_tx_run()
1516 sent = e82545_transmit(sc, head, tail, size, &rhead, &tdwb); in e82545_tx_run()
1521 pthread_mutex_lock(&sc->esc_mtx); in e82545_tx_run()
1523 sc->esc_TDH = head; in e82545_tx_run()
1524 sc->esc_TDHr = rhead; in e82545_tx_run()
1528 if (lim != size / 4 && sc->esc_TDH == sc->esc_TDT) in e82545_tx_run()
1531 e82545_icr_assert(sc, cause); in e82545_tx_run()
1534 sc->esc_TDH, sc->esc_TDHr, sc->esc_TDT); in e82545_tx_run()
1540 struct e82545_softc *sc = param; in e82545_tx_thread() local
1542 pthread_mutex_lock(&sc->esc_mtx); in e82545_tx_thread()
1544 while (!sc->esc_tx_enabled || sc->esc_TDHr == sc->esc_TDT) { in e82545_tx_thread()
1545 if (sc->esc_tx_enabled && sc->esc_TDHr != sc->esc_TDT) in e82545_tx_thread()
1547 sc->esc_tx_active = 0; in e82545_tx_thread()
1548 if (sc->esc_tx_enabled == 0) in e82545_tx_thread()
1549 pthread_cond_signal(&sc->esc_tx_cond); in e82545_tx_thread()
1550 pthread_cond_wait(&sc->esc_tx_cond, &sc->esc_mtx); in e82545_tx_thread()
1552 sc->esc_tx_active = 1; in e82545_tx_thread()
1555 e82545_tx_run(sc); in e82545_tx_thread()
1560 e82545_tx_start(struct e82545_softc *sc) in e82545_tx_start() argument
1563 if (sc->esc_tx_active == 0) in e82545_tx_start()
1564 pthread_cond_signal(&sc->esc_tx_cond); in e82545_tx_start()
1568 e82545_tx_enable(struct e82545_softc *sc) in e82545_tx_enable() argument
1571 sc->esc_tx_enabled = 1; in e82545_tx_enable()
1575 e82545_tx_disable(struct e82545_softc *sc) in e82545_tx_disable() argument
1578 sc->esc_tx_enabled = 0; in e82545_tx_disable()
1579 while (sc->esc_tx_active) in e82545_tx_disable()
1580 pthread_cond_wait(&sc->esc_tx_cond, &sc->esc_mtx); in e82545_tx_disable()
1584 e82545_rx_enable(struct e82545_softc *sc) in e82545_rx_enable() argument
1587 sc->esc_rx_enabled = 1; in e82545_rx_enable()
1591 e82545_rx_disable(struct e82545_softc *sc) in e82545_rx_disable() argument
1594 sc->esc_rx_enabled = 0; in e82545_rx_disable()
1595 while (sc->esc_rx_active) in e82545_rx_disable()
1596 pthread_cond_wait(&sc->esc_rx_cond, &sc->esc_mtx); in e82545_rx_disable()
1600 e82545_write_ra(struct e82545_softc *sc, int reg, uint32_t wval) in e82545_write_ra() argument
1608 eu = &sc->esc_uni[idx]; in e82545_write_ra()
1626 e82545_read_ra(struct e82545_softc *sc, int reg) in e82545_read_ra() argument
1635 eu = &sc->esc_uni[idx]; in e82545_read_ra()
1655 e82545_write_register(struct e82545_softc *sc, uint32_t offset, uint32_t value) in e82545_write_register() argument
1668 e82545_devctl(sc, value); in e82545_write_register()
1671 sc->esc_FCAL = value; in e82545_write_register()
1674 sc->esc_FCAH = value & ~0xFFFF0000; in e82545_write_register()
1677 sc->esc_FCT = value & ~0xFFFF0000; in e82545_write_register()
1680 sc->esc_VET = value & ~0xFFFF0000; in e82545_write_register()
1683 sc->esc_FCTTV = value & ~0xFFFF0000; in e82545_write_register()
1686 sc->esc_LEDCTL = value & ~0x30303000; in e82545_write_register()
1689 sc->esc_PBA = value & 0x0000FF80; in e82545_write_register()
1696 e82545_intr_write(sc, offset, value); in e82545_write_register()
1699 e82545_rx_ctl(sc, value); in e82545_write_register()
1702 sc->esc_FCRTL = value & ~0xFFFF0007; in e82545_write_register()
1705 sc->esc_FCRTH = value & ~0xFFFF0007; in e82545_write_register()
1708 sc->esc_RDBAL = value & ~0xF; in e82545_write_register()
1709 if (sc->esc_rx_enabled) { in e82545_write_register()
1711 e82545_rx_update_rdba(sc); in e82545_write_register()
1715 assert(!sc->esc_rx_enabled); in e82545_write_register()
1716 sc->esc_RDBAH = value; in e82545_write_register()
1719 assert(!sc->esc_rx_enabled); in e82545_write_register()
1720 sc->esc_RDLEN = value & ~0xFFF0007F; in e82545_write_register()
1724 sc->esc_RDH = value; in e82545_write_register()
1728 sc->esc_RDT = value; in e82545_write_register()
1732 sc->esc_RDTR = value & ~0xFFFF0000; in e82545_write_register()
1735 sc->esc_RXDCTL = value & ~0xFEC0C0C0; in e82545_write_register()
1738 sc->esc_RADV = value & ~0xFFFF0000; in e82545_write_register()
1741 sc->esc_RSRPD = value & ~0xFFFFF000; in e82545_write_register()
1744 sc->esc_RXCSUM = value & ~0xFFFFF800; in e82545_write_register()
1747 sc->esc_TXCW = value & ~0x3FFF0000; in e82545_write_register()
1750 e82545_tx_ctl(sc, value); in e82545_write_register()
1753 sc->esc_TIPG = value; in e82545_write_register()
1756 sc->esc_AIT = value; in e82545_write_register()
1759 sc->esc_TDBAL = value & ~0xF; in e82545_write_register()
1760 if (sc->esc_tx_enabled) in e82545_write_register()
1761 e82545_tx_update_tdba(sc); in e82545_write_register()
1764 sc->esc_TDBAH = value; in e82545_write_register()
1765 if (sc->esc_tx_enabled) in e82545_write_register()
1766 e82545_tx_update_tdba(sc); in e82545_write_register()
1769 sc->esc_TDLEN = value & ~0xFFF0007F; in e82545_write_register()
1770 if (sc->esc_tx_enabled) in e82545_write_register()
1771 e82545_tx_update_tdba(sc); in e82545_write_register()
1774 if (sc->esc_tx_enabled) { in e82545_write_register()
1782 sc->esc_TDHr = sc->esc_TDH = value; in e82545_write_register()
1785 sc->esc_TDT = value; in e82545_write_register()
1786 if (sc->esc_tx_enabled) in e82545_write_register()
1787 e82545_tx_start(sc); in e82545_write_register()
1790 sc->esc_TIDV = value & ~0xFFFF0000; in e82545_write_register()
1794 sc->esc_TXDCTL = value & ~0xC0C0C0; in e82545_write_register()
1797 sc->esc_TADV = value & ~0xFFFF0000; in e82545_write_register()
1802 e82545_write_ra(sc, ridx, value); in e82545_write_register()
1805 sc->esc_fmcast[(offset - E1000_MTA) >> 2] = value; in e82545_write_register()
1808 sc->esc_fvlan[(offset - E1000_VFTA) >> 2] = value; in e82545_write_register()
1814 uint32_t eecd_strobe = ((sc->eeprom_control & E1000_EECD_SK) ? in e82545_write_register()
1818 sc->eeprom_control &= ~eecd_mask; in e82545_write_register()
1819 sc->eeprom_control |= (value & eecd_mask); in e82545_write_register()
1822 sc->eeprom_control |= E1000_EECD_GNT; in e82545_write_register()
1824 sc->eeprom_control &= ~E1000_EECD_GNT; in e82545_write_register()
1826 if (eecd_strobe && (sc->eeprom_control & E1000_EECD_CS)) { in e82545_write_register()
1827 e82545_eecd_strobe(sc); in e82545_write_register()
1837 sc->mdi_control = in e82545_write_register()
1845 sc->mdi_control &= ~E82545_MDIC_DATA_MASK; in e82545_write_register()
1846 sc->mdi_control |= e82545_read_mdi(sc, reg_addr, phy_addr); in e82545_write_register()
1849 e82545_write_mdi(sc, reg_addr, phy_addr, in e82545_write_register()
1857 sc->mdi_control |= E1000_MDIC_READY; in e82545_write_register()
1873 e82545_read_register(struct e82545_softc *sc, uint32_t offset) in e82545_read_register() argument
1887 retval = sc->esc_CTRL; in e82545_read_register()
1894 retval = sc->esc_FCAL; in e82545_read_register()
1897 retval = sc->esc_FCAH; in e82545_read_register()
1900 retval = sc->esc_FCT; in e82545_read_register()
1903 retval = sc->esc_VET; in e82545_read_register()
1906 retval = sc->esc_FCTTV; in e82545_read_register()
1909 retval = sc->esc_LEDCTL; in e82545_read_register()
1912 retval = sc->esc_PBA; in e82545_read_register()
1919 retval = e82545_intr_read(sc, offset); in e82545_read_register()
1922 retval = sc->esc_RCTL; in e82545_read_register()
1925 retval = sc->esc_FCRTL; in e82545_read_register()
1928 retval = sc->esc_FCRTH; in e82545_read_register()
1931 retval = sc->esc_RDBAL; in e82545_read_register()
1934 retval = sc->esc_RDBAH; in e82545_read_register()
1937 retval = sc->esc_RDLEN; in e82545_read_register()
1940 retval = sc->esc_RDH; in e82545_read_register()
1943 retval = sc->esc_RDT; in e82545_read_register()
1946 retval = sc->esc_RDTR; in e82545_read_register()
1949 retval = sc->esc_RXDCTL; in e82545_read_register()
1952 retval = sc->esc_RADV; in e82545_read_register()
1955 retval = sc->esc_RSRPD; in e82545_read_register()
1958 retval = sc->esc_RXCSUM; in e82545_read_register()
1961 retval = sc->esc_TXCW; in e82545_read_register()
1964 retval = sc->esc_TCTL; in e82545_read_register()
1967 retval = sc->esc_TIPG; in e82545_read_register()
1970 retval = sc->esc_AIT; in e82545_read_register()
1973 retval = sc->esc_TDBAL; in e82545_read_register()
1976 retval = sc->esc_TDBAH; in e82545_read_register()
1979 retval = sc->esc_TDLEN; in e82545_read_register()
1982 retval = sc->esc_TDH; in e82545_read_register()
1985 retval = sc->esc_TDT; in e82545_read_register()
1988 retval = sc->esc_TIDV; in e82545_read_register()
1991 retval = sc->esc_TXDCTL; in e82545_read_register()
1994 retval = sc->esc_TADV; in e82545_read_register()
1999 retval = e82545_read_ra(sc, ridx); in e82545_read_register()
2002 retval = sc->esc_fmcast[(offset - E1000_MTA) >> 2]; in e82545_read_register()
2005 retval = sc->esc_fvlan[(offset - E1000_VFTA) >> 2]; in e82545_read_register()
2009 retval = sc->eeprom_control; in e82545_read_register()
2012 retval = sc->mdi_control; in e82545_read_register()
2019 retval = sc->missed_pkt_count; in e82545_read_register()
2022 retval = sc->pkt_rx_by_size[0]; in e82545_read_register()
2025 retval = sc->pkt_rx_by_size[1]; in e82545_read_register()
2028 retval = sc->pkt_rx_by_size[2]; in e82545_read_register()
2031 retval = sc->pkt_rx_by_size[3]; in e82545_read_register()
2034 retval = sc->pkt_rx_by_size[4]; in e82545_read_register()
2037 retval = sc->pkt_rx_by_size[5]; in e82545_read_register()
2040 retval = sc->good_pkt_rx_count; in e82545_read_register()
2043 retval = sc->bcast_pkt_rx_count; in e82545_read_register()
2046 retval = sc->mcast_pkt_rx_count; in e82545_read_register()
2050 retval = sc->good_pkt_tx_count; in e82545_read_register()
2053 retval = (uint32_t)sc->good_octets_rx; in e82545_read_register()
2056 retval = (uint32_t)(sc->good_octets_rx >> 32); in e82545_read_register()
2060 retval = (uint32_t)sc->good_octets_tx; in e82545_read_register()
2064 retval = (uint32_t)(sc->good_octets_tx >> 32); in e82545_read_register()
2067 retval = sc->oversize_rx_count; in e82545_read_register()
2070 retval = (uint32_t)(sc->good_octets_rx + sc->missed_octets); in e82545_read_register()
2073 retval = (uint32_t)((sc->good_octets_rx + in e82545_read_register()
2074 sc->missed_octets) >> 32); in e82545_read_register()
2077 retval = sc->good_pkt_rx_count + sc->missed_pkt_count + in e82545_read_register()
2078 sc->oversize_rx_count; in e82545_read_register()
2081 retval = sc->pkt_tx_by_size[0]; in e82545_read_register()
2084 retval = sc->pkt_tx_by_size[1]; in e82545_read_register()
2087 retval = sc->pkt_tx_by_size[2]; in e82545_read_register()
2090 retval = sc->pkt_tx_by_size[3]; in e82545_read_register()
2093 retval = sc->pkt_tx_by_size[4]; in e82545_read_register()
2096 retval = sc->pkt_tx_by_size[5]; in e82545_read_register()
2099 retval = sc->mcast_pkt_tx_count; in e82545_read_register()
2102 retval = sc->bcast_pkt_tx_count; in e82545_read_register()
2105 retval = sc->tso_tx_count; in e82545_read_register()
2150 struct e82545_softc *sc; in e82545_write() local
2154 sc = pi->pi_arg; in e82545_write()
2156 pthread_mutex_lock(&sc->esc_mtx); in e82545_write()
2165 sc->io_addr = (uint32_t)value; in e82545_write()
2170 } else if (sc->io_addr > E82545_IO_REGISTER_MAX) { in e82545_write()
2171 DPRINTF("Non-register io write addr:0x%x value:0x%lx", sc->io_addr, value); in e82545_write()
2173 e82545_write_register(sc, sc->io_addr, in e82545_write()
2185 e82545_write_register(sc, (uint32_t)offset, in e82545_write()
2193 pthread_mutex_unlock(&sc->esc_mtx); in e82545_write()
2199 struct e82545_softc *sc; in e82545_read() local
2203 sc = pi->pi_arg; in e82545_read()
2206 pthread_mutex_lock(&sc->esc_mtx); in e82545_read()
2215 retval = sc->io_addr; in e82545_read()
2221 if (sc->io_addr > E82545_IO_REGISTER_MAX) { in e82545_read()
2223 sc->io_addr); in e82545_read()
2225 retval = e82545_read_register(sc, sc->io_addr); in e82545_read()
2238 retval = e82545_read_register(sc, (uint32_t)offset); in e82545_read()
2246 pthread_mutex_unlock(&sc->esc_mtx); in e82545_read()
2252 e82545_reset(struct e82545_softc *sc, int drvr) in e82545_reset() argument
2256 e82545_rx_disable(sc); in e82545_reset()
2257 e82545_tx_disable(sc); in e82545_reset()
2260 if (sc->esc_irq_asserted) in e82545_reset()
2261 pci_lintr_deassert(sc->esc_pi); in e82545_reset()
2265 sc->esc_FCAL = 0; in e82545_reset()
2266 sc->esc_FCAH = 0; in e82545_reset()
2267 sc->esc_FCT = 0; in e82545_reset()
2268 sc->esc_VET = 0; in e82545_reset()
2269 sc->esc_FCTTV = 0; in e82545_reset()
2271 sc->esc_LEDCTL = 0x07061302; in e82545_reset()
2272 sc->esc_PBA = 0x00100030; in e82545_reset()
2275 sc->nvm_opaddr = 0; in e82545_reset()
2276 sc->nvm_mode = E82545_NVM_MODE_OPADDR; in e82545_reset()
2277 sc->nvm_bits = E82545_NVM_OPADDR_BITS; in e82545_reset()
2278 sc->eeprom_control = E1000_EECD_PRES | E82545_EECD_FWE_EN; in e82545_reset()
2279 e82545_init_eeprom(sc); in e82545_reset()
2282 sc->esc_ICR = 0; in e82545_reset()
2283 sc->esc_ITR = 250; in e82545_reset()
2284 sc->esc_ICS = 0; in e82545_reset()
2285 sc->esc_IMS = 0; in e82545_reset()
2286 sc->esc_IMC = 0; in e82545_reset()
2290 memset(sc->esc_fvlan, 0, sizeof(sc->esc_fvlan)); in e82545_reset()
2291 memset(sc->esc_fmcast, 0, sizeof(sc->esc_fmcast)); in e82545_reset()
2292 memset(sc->esc_uni, 0, sizeof(sc->esc_uni)); in e82545_reset()
2295 sc->esc_uni[0].eu_valid = 1; in e82545_reset()
2296 memcpy(sc->esc_uni[0].eu_eth.octet, sc->esc_mac.octet, in e82545_reset()
2301 sc->esc_uni[i].eu_valid = 0; in e82545_reset()
2306 sc->esc_RDBAL = 0; in e82545_reset()
2307 sc->esc_RDBAH = 0; in e82545_reset()
2309 sc->esc_RCTL = 0; in e82545_reset()
2310 sc->esc_FCRTL = 0; in e82545_reset()
2311 sc->esc_FCRTH = 0; in e82545_reset()
2312 sc->esc_RDLEN = 0; in e82545_reset()
2313 sc->esc_RDH = 0; in e82545_reset()
2314 sc->esc_RDT = 0; in e82545_reset()
2315 sc->esc_RDTR = 0; in e82545_reset()
2316 sc->esc_RXDCTL = (1 << 24) | (1 << 16); /* default GRAN/WTHRESH */ in e82545_reset()
2317 sc->esc_RADV = 0; in e82545_reset()
2318 sc->esc_RXCSUM = 0; in e82545_reset()
2322 sc->esc_TDBAL = 0; in e82545_reset()
2323 sc->esc_TDBAH = 0; in e82545_reset()
2324 sc->esc_TIPG = 0; in e82545_reset()
2325 sc->esc_AIT = 0; in e82545_reset()
2326 sc->esc_TIDV = 0; in e82545_reset()
2327 sc->esc_TADV = 0; in e82545_reset()
2329 sc->esc_tdba = 0; in e82545_reset()
2330 sc->esc_txdesc = NULL; in e82545_reset()
2331 sc->esc_TXCW = 0; in e82545_reset()
2332 sc->esc_TCTL = 0; in e82545_reset()
2333 sc->esc_TDLEN = 0; in e82545_reset()
2334 sc->esc_TDT = 0; in e82545_reset()
2335 sc->esc_TDHr = sc->esc_TDH = 0; in e82545_reset()
2336 sc->esc_TXDCTL = 0; in e82545_reset()
2343 struct e82545_softc *sc; in e82545_init() local
2348 sc = calloc(1, sizeof(*sc)); in e82545_init()
2350 pi->pi_arg = sc; in e82545_init()
2351 sc->esc_pi = pi; in e82545_init()
2352 sc->esc_ctx = pi->pi_vmctx; in e82545_init()
2354 pthread_mutex_init(&sc->esc_mtx, NULL); in e82545_init()
2355 pthread_cond_init(&sc->esc_rx_cond, NULL); in e82545_init()
2356 pthread_cond_init(&sc->esc_tx_cond, NULL); in e82545_init()
2357 pthread_create(&sc->esc_tx_tid, NULL, e82545_tx_thread, sc); in e82545_init()
2360 pthread_set_name_np(sc->esc_tx_tid, nstr); in e82545_init()
2385 err = net_parsemac(mac, sc->esc_mac.octet); in e82545_init()
2387 free(sc); in e82545_init()
2391 net_genmac(pi, sc->esc_mac.octet); in e82545_init()
2393 err = netbe_init(&sc->esc_be, nvl, e82545_rx_callback, sc); in e82545_init()
2395 free(sc); in e82545_init()
2400 size_t buflen = sizeof (sc->esc_mac.octet); in e82545_init()
2402 err = netbe_get_mac(sc->esc_be, sc->esc_mac.octet, &buflen); in e82545_init()
2404 free(sc); in e82545_init()
2409 netbe_rx_enable(sc->esc_be); in e82545_init()
2412 e82545_reset(sc, 0); in e82545_init()