Lines Matching full:hi
35 {"ulp_type" , 0, 0, 3, /* name,aux,lo,hi */
42 {"ulp_raw" , 0, 4, 11, /* name,aux,lo,hi */
49 {"l2t_ix" , 0, 12, 23, /* name,aux,lo,hi */
56 {"smac_sel" , 0, 24, 31, /* name,aux,lo,hi */
63 {"TF_MIGRATING" , 0, 32, 32, /* name,aux,lo,hi */
70 {"TF_NON_OFFLOAD" , 0, 33, 33, /* name,aux,lo,hi */
77 {"TF_LOCK_TID" , 0, 34, 34, /* name,aux,lo,hi */
84 {"TF_KEEPALIVE" , 0, 35, 35, /* name,aux,lo,hi */
91 {"TF_DACK" , 0, 36, 36, /* name,aux,lo,hi */
98 {"TF_DACK_MSS" , 0, 37, 37, /* name,aux,lo,hi */
105 {"TF_DACK_NOT_ACKED" , 0, 38, 38, /* name,aux,lo,hi */
112 {"TF_NAGLE" , 0, 39, 39, /* name,aux,lo,hi */
119 {"TF_SSWS_DISABLED" , 0, 40, 40, /* name,aux,lo,hi */
126 {"TF_RX_FLOW_CONTROL_DDP" , 0, 41, 41, /* name,aux,lo,hi */
133 {"TF_RX_FLOW_CONTROL_DISABLE" , 0, 42, 42, /* name,aux,lo,hi */
140 {"TF_RX_CHANNEL" , 0, 43, 43, /* name,aux,lo,hi */
147 {"TF_TX_CHANNEL" , 0, 44, 45, /* name,aux,lo,hi */
154 {"TF_TX_QUIESCE" , 0, 46, 46, /* name,aux,lo,hi */
161 {"TF_RX_QUIESCE" , 0, 47, 47, /* name,aux,lo,hi */
168 {"TF_TX_PACE_AUTO" , 0, 48, 48, /* name,aux,lo,hi */
175 {"TF_TX_PACE_FIXED" , 0, 49, 49, /* name,aux,lo,hi */
182 {"TF_TX_QUEUE" , 0, 50, 52, /* name,aux,lo,hi */
189 {"TF_TURBO" , 0, 53, 53, /* name,aux,lo,hi */
196 {"TF_CCTRL_SEL0" , 0, 54, 54, /* name,aux,lo,hi */
203 {"TF_CCTRL_SEL1" , 0, 55, 55, /* name,aux,lo,hi */
210 {"TF_CORE_FIN" , 0, 56, 56, /* name,aux,lo,hi */
217 {"TF_CORE_URG" , 0, 57, 57, /* name,aux,lo,hi */
224 {"TF_CORE_MORE" , 0, 58, 58, /* name,aux,lo,hi */
231 {"TF_CORE_PUSH" , 0, 59, 59, /* name,aux,lo,hi */
238 {"TF_CORE_FLUSH" , 0, 60, 60, /* name,aux,lo,hi */
245 {"TF_RCV_COALESCE_ENABLE" , 0, 61, 61, /* name,aux,lo,hi */
252 {"TF_RCV_COALESCE_PUSH" , 0, 62, 62, /* name,aux,lo,hi */
259 {"TF_RCV_COALESCE_LAST_PSH" , 0, 63, 63, /* name,aux,lo,hi */
266 {"TF_RCV_COALESCE_HEARTBEAT" , 0, 64, 64, /* name,aux,lo,hi */
273 {"TF_RSS_FW" , 0, 65, 65, /* name,aux,lo,hi */
280 {"TF_ACTIVE_OPEN" , 0, 66, 66, /* name,aux,lo,hi */
287 {"TF_ASK_MODE" , 0, 67, 67, /* name,aux,lo,hi */
294 {"TF_MOD_SCHD_REASON0" , 0, 68, 68, /* name,aux,lo,hi */
301 {"TF_MOD_SCHD_REASON1" , 0, 69, 69, /* name,aux,lo,hi */
308 {"TF_MOD_SCHD_REASON2" , 0, 70, 70, /* name,aux,lo,hi */
315 {"TF_MOD_SCHD_TX" , 0, 71, 71, /* name,aux,lo,hi */
322 {"TF_MOD_SCHD_RX" , 0, 72, 72, /* name,aux,lo,hi */
329 {"TF_TIMER" , 0, 73, 73, /* name,aux,lo,hi */
336 {"TF_DACK_TIMER" , 0, 74, 74, /* name,aux,lo,hi */
343 {"TF_PEER_FIN" , 0, 75, 75, /* name,aux,lo,hi */
350 {"TF_TX_COMPACT" , 0, 76, 76, /* name,aux,lo,hi */
357 {"TF_RX_COMPACT" , 0, 77, 77, /* name,aux,lo,hi */
364 {"TF_RDMA_ERROR" , 0, 78, 78, /* name,aux,lo,hi */
371 {"TF_RDMA_FLM_ERROR" , 0, 79, 79, /* name,aux,lo,hi */
378 {"TF_TX_PDU_OUT" , 0, 80, 80, /* name,aux,lo,hi */
385 {"TF_RX_PDU_OUT" , 0, 81, 81, /* name,aux,lo,hi */
392 {"TF_DUPACK_COUNT_ODD" , 0, 82, 82, /* name,aux,lo,hi */
399 {"TF_FAST_RECOVERY" , 0, 83, 83, /* name,aux,lo,hi */
406 {"TF_RECV_SCALE" , 0, 84, 84, /* name,aux,lo,hi */
413 {"TF_RECV_TSTMP" , 0, 85, 85, /* name,aux,lo,hi */
420 {"TF_RECV_SACK" , 0, 86, 86, /* name,aux,lo,hi */
427 {"TF_PEND_CTL0" , 0, 87, 87, /* name,aux,lo,hi */
434 {"TF_PEND_CTL1" , 0, 88, 88, /* name,aux,lo,hi */
441 {"TF_PEND_CTL2" , 0, 89, 89, /* name,aux,lo,hi */
448 {"TF_IP_VERSION" , 0, 90, 90, /* name,aux,lo,hi */
455 {"TF_CCTRL_ECN" , 0, 91, 91, /* name,aux,lo,hi */
462 {"TF_CCTRL_ECE" , 0, 92, 92, /* name,aux,lo,hi */
469 {"TF_CCTRL_CWR" , 0, 93, 93, /* name,aux,lo,hi */
476 {"TF_CCTRL_RFR" , 0, 94, 94, /* name,aux,lo,hi */
483 {"TF_CORE_BYPASS" , 0, 95, 95, /* name,aux,lo,hi */
490 {"rss_info" , 0, 96, 105, /* name,aux,lo,hi */
497 {"tos" , 0, 106, 111, /* name,aux,lo,hi */
504 {"t_state" , 0, 112, 115, /* name,aux,lo,hi */
511 {"max_rt" , 0, 116, 119, /* name,aux,lo,hi */
518 {"t_maxseg" , 0, 120, 123, /* name,aux,lo,hi */
525 {"snd_scale" , 0, 124, 127, /* name,aux,lo,hi */
532 {"rcv_scale" , 0, 128, 131, /* name,aux,lo,hi */
539 {"t_rxtshift" , 0, 132, 135, /* name,aux,lo,hi */
546 {"t_dupacks" , 0, 136, 139, /* name,aux,lo,hi */
553 {"timestamp_offset" , 0, 140, 143, /* name,aux,lo,hi */
560 {"rcv_adv" , 0, 144, 159, /* name,aux,lo,hi */
567 {"timestamp" , 0, 160, 191, /* name,aux,lo,hi */
574 {"t_rtt_ts_recent_age" , 0, 192, 223, /* name,aux,lo,hi */
581 {"t_rtseq_recent" , 0, 224, 255, /* name,aux,lo,hi */
588 {"t_srtt" , 0, 256, 271, /* name,aux,lo,hi */
595 {"t_rttvar" , 0, 272, 287, /* name,aux,lo,hi */
602 {"tx_max" , 0, 288, 319, /* name,aux,lo,hi */
609 {"snd_una_raw" , 0, 320, 347, /* name,aux,lo,hi */
616 {"snd_nxt_raw" , 0, 348, 375, /* name,aux,lo,hi */
623 {"snd_max_raw" , 0, 376, 403, /* name,aux,lo,hi */
630 {"snd_rec_raw" , 0, 404, 431, /* name,aux,lo,hi */
637 {"snd_cwnd" , 0, 432, 459, /* name,aux,lo,hi */
644 {"snd_ssthresh" , 0, 460, 487, /* name,aux,lo,hi */
651 {"tx_hdr_ptr_raw" , 0, 488, 504, /* name,aux,lo,hi */
658 {"tx_last_ptr_raw" , 0, 505, 521, /* name,aux,lo,hi */
665 {"rcv_nxt" , 0, 522, 553, /* name,aux,lo,hi */
672 {"rcv_wnd" , 0, 554, 581, /* name,aux,lo,hi */
679 {"rx_hdr_offset" , 0, 582, 609, /* name,aux,lo,hi */
686 {"ts_last_ack_sent_raw" , 0, 610, 637, /* name,aux,lo,hi */
693 {"rx_frag0_start_idx_raw" , 0, 638, 665, /* name,aux,lo,hi */
700 {"rx_frag1_start_idx_offset" , 0, 666, 693, /* name,aux,lo,hi */
707 {"rx_frag0_len" , 0, 694, 721, /* name,aux,lo,hi */
714 {"rx_frag1_len" , 0, 722, 749, /* name,aux,lo,hi */
721 {"pdu_len" , 0, 750, 765, /* name,aux,lo,hi */
728 {"rx_ptr_raw" , 0, 766, 782, /* name,aux,lo,hi */
735 {"rx_frag1_ptr_raw" , 0, 783, 799, /* name,aux,lo,hi */
742 {"main_slush" , 0, 800, 831, /* name,aux,lo,hi */
749 {"aux1_slush0" , 1, 832, 846, /* name,aux,lo,hi */
756 {"rx_frag2_start_idx_offset_raw", 1, 847, 874, /* name,aux,lo,hi */
763 {"rx_frag2_ptr_raw" , 1, 875, 891, /* name,aux,lo,hi */
770 {"rx_frag2_len_raw" , 1, 892, 919, /* name,aux,lo,hi */
777 {"rx_frag3_ptr_raw" , 1, 920, 936, /* name,aux,lo,hi */
784 {"rx_frag3_len_raw" , 1, 937, 964, /* name,aux,lo,hi */
791 {"rx_frag3_start_idx_offset_raw", 1, 965, 992, /* name,aux,lo,hi */
798 {"pdu_hdr_len" , 1, 993, 1000, /* name,aux,lo,hi */
805 {"aux1_slush1" , 1, 1001, 1019, /* name,aux,lo,hi */
812 {"ulp_ext" , 1, 1020, 1023, /* name,aux,lo,hi */
820 {"irs_ulp" , 2, 832, 840, /* name,aux,lo,hi */
827 {"iss_ulp" , 2, 841, 849, /* name,aux,lo,hi */
834 {"tx_pdu_len" , 2, 850, 863, /* name,aux,lo,hi */
841 {"cq_idx_sq" , 2, 864, 879, /* name,aux,lo,hi */
848 {"cq_idx_rq" , 2, 880, 895, /* name,aux,lo,hi */
855 {"qp_id" , 2, 896, 911, /* name,aux,lo,hi */
862 {"pd_id" , 2, 912, 927, /* name,aux,lo,hi */
869 {"STAG" , 2, 928, 959, /* name,aux,lo,hi */
876 {"rq_start" , 2, 960, 985, /* name,aux,lo,hi */
883 {"rq_MSN" , 2, 986, 998, /* name,aux,lo,hi */
890 {"rq_max_offset" , 2, 999, 1002, /* name,aux,lo,hi */
897 {"rq_write_ptr" , 2, 1003, 1015, /* name,aux,lo,hi */
904 {"RDMAP_opcode" , 2, 1016, 1019, /* name,aux,lo,hi */
911 {"ord_L_bit_vld" , 2, 1020, 1020, /* name,aux,lo,hi */
918 {"tx_flush" , 2, 1021, 1021, /* name,aux,lo,hi */
925 {"tx_oos_rxmt" , 2, 1022, 1022, /* name,aux,lo,hi */
932 {"tx_oos_txmt" , 2, 1023, 1023, /* name,aux,lo,hi */
940 {"rx_ddp_buf0_offset" , 3, 832, 855, /* name,aux,lo,hi */
947 {"rx_ddp_buf0_len" , 3, 856, 879, /* name,aux,lo,hi */
954 {"TF_DDP_INDICATE_OUT" , 3, 880, 880, /* name,aux,lo,hi */
961 {"TF_DDP_ACTIVE_BUF" , 3, 881, 881, /* name,aux,lo,hi */
968 {"TF_DDP_OFF" , 3, 882, 882, /* name,aux,lo,hi */
975 {"TF_DDP_WAIT_FRAG" , 3, 883, 883, /* name,aux,lo,hi */
982 {"TF_DDP_BUF_INF" , 3, 884, 884, /* name,aux,lo,hi */
989 {"TF_DDP_RX2TX" , 3, 885, 885, /* name,aux,lo,hi */
996 {"TF_DDP_INDICATE_FLL" , 3, 886, 886, /* name,aux,lo,hi */
1003 {"TF_DDP_MAIN_UNUSED" , 3, 887, 887, /* name,aux,lo,hi */
1010 {"TF_TLS_KEY_MODE" , 3, 887, 887, /* name,aux,lo,hi */
1017 {"TF_DDP_BUF0_VALID" , 3, 888, 888, /* name,aux,lo,hi */
1024 {"TF_DDP_BUF0_INDICATE" , 3, 889, 889, /* name,aux,lo,hi */
1031 {"TF_DDP_BUF0_FLUSH" , 3, 890, 890, /* name,aux,lo,hi */
1038 {"TF_DDP_PSHF_ENABLE_0" , 3, 891, 891, /* name,aux,lo,hi */
1045 {"TF_DDP_PUSH_DISABLE_0" , 3, 892, 892, /* name,aux,lo,hi */
1052 {"TF_DDP_PSH_NO_INVALIDATE0" , 3, 893, 893, /* name,aux,lo,hi */
1059 {"TF_DDP_BUF0_UNUSED" , 3, 894, 895, /* name,aux,lo,hi */
1066 {"TF_DDP_BUF1_VALID" , 3, 896, 896, /* name,aux,lo,hi */
1073 {"TF_DDP_BUF1_INDICATE" , 3, 897, 897, /* name,aux,lo,hi */
1080 {"TF_DDP_BUF1_FLUSH" , 3, 898, 898, /* name,aux,lo,hi */
1087 {"TF_DDP_PSHF_ENABLE_1" , 3, 899, 899, /* name,aux,lo,hi */
1094 {"TF_DDP_PUSH_DISABLE_1" , 3, 900, 900, /* name,aux,lo,hi */
1101 {"TF_DDP_PSH_NO_INVALIDATE1" , 3, 901, 901, /* name,aux,lo,hi */
1108 {"TF_DDP_BUF1_UNUSED" , 3, 902, 903, /* name,aux,lo,hi */
1115 {"rx_ddp_buf1_offset" , 3, 904, 927, /* name,aux,lo,hi */
1122 {"rx_ddp_buf1_len" , 3, 928, 951, /* name,aux,lo,hi */
1129 {"aux3_slush" , 3, 952, 959, /* name,aux,lo,hi */
1136 {"rx_ddp_buf0_tag" , 3, 960, 991, /* name,aux,lo,hi */
1143 {"rx_ddp_buf1_tag" , 3, 992, 1023, /* name,aux,lo,hi */
1150 {"rx_tls_buf_offset" , 4, 832, 855, /* name,aux,lo,hi */
1157 {"rx_tls_buf_len" , 4, 856, 879, /* name,aux,lo,hi */
1164 {"rx_tls_flags" , 4, 880, 895, /* name,aux,lo,hi */
1171 {"rx_tls_seq" , 4, 896, 959, /* name,aux,lo,hi */
1178 {"rx_tls_buf_tag" , 4, 960, 991, /* name,aux,lo,hi */
1185 {"rx_tls_key_tag" , 4, 992, 1023, /* name,aux,lo,hi */
1197 {"OPT_1_RSS_INFO" , 0, 0, 11, /* name,aux,lo,hi */
1204 {"OPT_1_LISTEN_INTERFACE" , 0, 12, 19, /* name,aux,lo,hi */
1211 {"OPT_1_LISTEN_FILTER" , 0, 20, 20, /* name,aux,lo,hi */
1218 {"OPT_1_SYN_DEFENSE" , 0, 21, 21, /* name,aux,lo,hi */
1225 {"OPT_1_CONNECTION_POLICY" , 0, 22, 23, /* name,aux,lo,hi */
1232 {"OPT_1_FLT_INFO" , 0, 24, 63, /* name,aux,lo,hi */
1239 {"OPT_0_ACCEPT_MODE" , 0, 64, 65, /* name,aux,lo,hi */
1246 {"OPT_0_TX_CHANNEL" , 0, 66, 67, /* name,aux,lo,hi */
1253 {"OPT_0_NO_CONGESTION_CONTROL" , 0, 68, 68, /* name,aux,lo,hi */
1260 {"OPT_0_DELAYED_ACK" , 0, 69, 69, /* name,aux,lo,hi */
1267 {"OPT_0_INJECT_TIMER" , 0, 70, 70, /* name,aux,lo,hi */
1274 {"OPT_0_NON_OFFLOAD" , 0, 71, 71, /* name,aux,lo,hi */
1281 {"OPT_0_ULP_MODE" , 0, 72, 75, /* name,aux,lo,hi */
1288 {"OPT_0_MAX_RCV_BUFFER" , 0, 76, 85, /* name,aux,lo,hi */
1295 {"OPT_0_TOS" , 0, 86, 91, /* name,aux,lo,hi */
1302 {"OPT_0_SM_SEL" , 0, 92, 99, /* name,aux,lo,hi */
1309 {"OPT_0_L2T_IX" , 0, 100, 111, /* name,aux,lo,hi */
1316 {"OPT_0_TCAM_BYPASS" , 0, 112, 112, /* name,aux,lo,hi */
1323 {"OPT_0_NAGLE" , 0, 113, 113, /* name,aux,lo,hi */
1330 {"OPT_0_WSF" , 0, 114, 117, /* name,aux,lo,hi */
1337 {"OPT_0_KEEPALIVE" , 0, 118, 118, /* name,aux,lo,hi */
1344 {"OPT_0_CONN_MAXRT" , 0, 119, 122, /* name,aux,lo,hi */
1351 {"OPT_0_MAXRT_OVERRIDE" , 0, 123, 123, /* name,aux,lo,hi */
1358 {"OPT_0_MAX_SEG" , 0, 124, 127, /* name,aux,lo,hi */
1365 {"scb_slush" , 0, 128, 1023, /* name,aux,lo,hi */
1377 {"filter" , 0, 33, 33, /* name,aux,lo,hi */
1384 {"Drop_Encapsulation_Headers" , 0, 35, 35, /* name,aux,lo,hi */
1391 {"Report_TID" , 0, 53, 53, /* name,aux,lo,hi */
1398 {"Drop" , 0, 54, 54, /* name,aux,lo,hi */
1405 {"Direct_Steer" , 0, 55, 55, /* name,aux,lo,hi */
1412 {"Mask_Hash" , 0, 48, 48, /* name,aux,lo,hi */
1419 {"Direct_Steer_Hash" , 0, 49, 49, /* name,aux,lo,hi */
1426 {"Loopback" , 0, 91, 91, /* name,aux,lo,hi */
1433 {"Loopback_TX_Channel" , 0, 44, 45, /* name,aux,lo,hi */
1440 {"Loopback_TX_Loopback" , 0, 85, 85, /* name,aux,lo,hi */
1447 {"Swap_MAC_addresses" , 0, 86, 86, /* name,aux,lo,hi */
1454 {"Rewrite_DMAC" , 0, 92, 92, /* name,aux,lo,hi */
1461 {"Rewrite_SMAC" , 0, 93, 93, /* name,aux,lo,hi */
1468 {"Insert_VLAN" , 0, 94, 94, /* name,aux,lo,hi */
1475 {"Remove_VLAN" , 0, 39, 39, /* name,aux,lo,hi */
1482 {"NAT_Mode" , 0, 50, 52, /* name,aux,lo,hi */
1489 {"NAT_seq_check" , 0, 42, 42, /* name,aux,lo,hi */
1496 {"NAT_flag_check" , 0, 84, 84, /* name,aux,lo,hi */
1503 {"Count_Hits" , 0, 36, 36, /* name,aux,lo,hi */
1510 {"Hit_frame_cnt" , 0, 160, 191, /* name,aux,lo,hi */
1517 {"Hit_byte_cnt_high" , 0, 224, 255, /* name,aux,lo,hi */
1524 {"Hit_byte_cnt_low" , 0, 192, 223, /* name,aux,lo,hi */