Lines Matching refs:fdt
66 assign_phandle(void *fdt) in assign_phandle() argument
73 fdt_property_u32(fdt, "phandle", phandle); in assign_phandle()
79 set_single_reg(void *fdt, uint64_t start, uint64_t len) in set_single_reg() argument
83 fdt_property_placeholder(fdt, "reg", 2 * sizeof(uint64_t), ®); in set_single_reg()
89 add_cpu(void *fdt, int cpuid, const char *isa, uint32_t *intc_phandle) in add_cpu() argument
95 fdt_begin_node(fdt, node_name); in add_cpu()
96 fdt_property_string(fdt, "device_type", "cpu"); in add_cpu()
97 fdt_property_string(fdt, "compatible", "riscv"); in add_cpu()
98 fdt_property_u32(fdt, "reg", cpuid); in add_cpu()
99 fdt_property_string(fdt, "riscv,isa", isa); in add_cpu()
100 fdt_property_string(fdt, "mmu-type", "riscv,sv39"); in add_cpu()
102 fdt_begin_node(fdt, "interrupt-controller"); in add_cpu()
103 *intc_phandle = assign_phandle(fdt); in add_cpu()
104 fdt_property_u32(fdt, "#address-cells", 2); in add_cpu()
105 fdt_property_u32(fdt, "#interrupt-cells", 1); in add_cpu()
106 fdt_property(fdt, "interrupt-controller", NULL, 0); in add_cpu()
107 fdt_property_string(fdt, "compatible", "riscv,cpu-intc"); in add_cpu()
108 fdt_end_node(fdt); in add_cpu()
110 fdt_end_node(fdt); in add_cpu()
114 add_cpus(void *fdt, int ncpu, const char *isa) in add_cpus() argument
118 fdt_begin_node(fdt, "cpus"); in add_cpus()
120 fdt_property_u32(fdt, "#address-cells", 1); in add_cpus()
121 fdt_property_u32(fdt, "#size-cells", 0); in add_cpus()
123 fdt_property_u32(fdt, "timebase-frequency", 1000000); in add_cpus()
127 add_cpu(fdt, cpuid, isa, &intc_phandles[cpuid]); in add_cpus()
129 fdt_end_node(fdt); in add_cpus()
136 void *fdt; in fdt_init() local
139 fdt = paddr_guest2host(ctx, fdtaddr, fdtsize); in fdt_init()
140 if (fdt == NULL) in fdt_init()
143 fdt_create(fdt, (int)fdtsize); in fdt_init()
146 fdt_finish_reservemap(fdt); in fdt_init()
149 fdt_begin_node(fdt, ""); in fdt_init()
151 fdt_property_string(fdt, "compatible", "freebsd,bhyve"); in fdt_init()
152 fdt_property_u32(fdt, "#address-cells", 2); in fdt_init()
153 fdt_property_u32(fdt, "#size-cells", 2); in fdt_init()
155 fdt_begin_node(fdt, "chosen"); in fdt_init()
156 fdt_property_string(fdt, "stdout-path", "serial0:115200n8"); in fdt_init()
159 fdt_property_string(fdt, "bootargs", bootargs); in fdt_init()
160 fdt_end_node(fdt); in fdt_init()
162 fdt_begin_node(fdt, "memory"); in fdt_init()
163 fdt_property_string(fdt, "device_type", "memory"); in fdt_init()
166 set_single_reg(fdt, vm_get_highmem_base(ctx), vm_get_highmem_size(ctx)); in fdt_init()
167 fdt_end_node(fdt); in fdt_init()
169 add_cpus(fdt, ncpu, isa); in fdt_init()
172 fdtroot = fdt; in fdt_init()
181 void *fdt, *prop; in fdt_add_aplic() local
184 fdt = fdtroot; in fdt_add_aplic()
188 fdt_begin_node(fdt, node_name); in fdt_add_aplic()
190 aplic_phandle = assign_phandle(fdt); in fdt_add_aplic()
191 fdt_property_string(fdt, "compatible", "riscv,aplic"); in fdt_add_aplic()
192 fdt_property(fdt, "interrupt-controller", NULL, 0); in fdt_add_aplic()
194 fdt_property(fdt, "msi-controller", NULL, 0); in fdt_add_aplic()
197 fdt_property_u32(fdt, "#address-cells", 2); in fdt_add_aplic()
198 fdt_property_u32(fdt, "#interrupt-cells", 2); in fdt_add_aplic()
199 fdt_property_placeholder(fdt, "reg", 2 * sizeof(uint64_t), &prop); in fdt_add_aplic()
204 fdt_property_placeholder(fdt, "interrupts-extended", in fdt_add_aplic()
210 fdt_property_u32(fdt, "riscv,num-sources", 63); in fdt_add_aplic()
212 fdt_end_node(fdt); in fdt_add_aplic()
214 fdt_property_u32(fdt, "interrupt-parent", aplic_phandle); in fdt_add_aplic()
220 void *fdt, *interrupts; in fdt_add_uart() local
225 fdt = fdtroot; in fdt_add_uart()
228 fdt_begin_node(fdt, node_name); in fdt_add_uart()
229 fdt_property_string(fdt, "compatible", "ns16550"); in fdt_add_uart()
230 set_single_reg(fdt, uart_base, uart_size); in fdt_add_uart()
231 fdt_property_u32(fdt, "clock-frequency", 3686400); in fdt_add_uart()
232 fdt_property_u32(fdt, "interrupt-parent", aplic_phandle); in fdt_add_uart()
233 fdt_property_placeholder(fdt, "interrupts", 2 * sizeof(uint32_t), in fdt_add_uart()
238 fdt_end_node(fdt); in fdt_add_uart()
241 fdt_begin_node(fdt, "aliases"); in fdt_add_uart()
242 fdt_property_string(fdt, "serial0", node_name); in fdt_add_uart()
243 fdt_end_node(fdt); in fdt_add_uart()
249 void *fdt, *prop; in fdt_add_pcie() local
254 fdt = fdtroot; in fdt_add_pcie()
256 fdt_begin_node(fdt, "pcie@1f0000000"); in fdt_add_pcie()
257 fdt_property_string(fdt, "compatible", "pci-host-ecam-generic"); in fdt_add_pcie()
258 fdt_property_u32(fdt, "#address-cells", 3); in fdt_add_pcie()
259 fdt_property_u32(fdt, "#size-cells", 2); in fdt_add_pcie()
260 fdt_property_string(fdt, "device_type", "pci"); in fdt_add_pcie()
261 fdt_property_u64(fdt, "bus-range", (0ul << 32) | 1); in fdt_add_pcie()
262 set_single_reg(fdt, 0xe0000000, 0x10000000); in fdt_add_pcie()
263 fdt_property_placeholder(fdt, "ranges", in fdt_add_pcie()
288 fdt_property_placeholder(fdt, "msi-map", 4 * sizeof(uint32_t), &prop); in fdt_add_pcie()
293 fdt_property_u32(fdt, "msi-parent", aplic_phandle); in fdt_add_pcie()
296 fdt_property_u32(fdt, "#interrupt-cells", 1); in fdt_add_pcie()
297 fdt_property_u32(fdt, "interrupt-parent", aplic_phandle); in fdt_add_pcie()
303 fdt_property_placeholder(fdt, "interrupt-map-mask", in fdt_add_pcie()
309 fdt_property_placeholder(fdt, "interrupt-map", in fdt_add_pcie()
326 fdt_end_node(fdt); in fdt_add_pcie()