Lines Matching refs:pi

149 	struct pci_io pi;  in pci_host_read_config()  local
155 bzero(&pi, sizeof(pi)); in pci_host_read_config()
156 pi.pi_sel = *sel; in pci_host_read_config()
157 pi.pi_reg = reg; in pci_host_read_config()
158 pi.pi_width = width; in pci_host_read_config()
160 if (ioctl(pcifd, PCIOCREAD, &pi) < 0) in pci_host_read_config()
163 return (pi.pi_data); in pci_host_read_config()
170 struct pci_io pi; in pci_host_write_config() local
176 bzero(&pi, sizeof(pi)); in pci_host_write_config()
177 pi.pi_sel = *sel; in pci_host_write_config()
178 pi.pi_reg = reg; in pci_host_write_config()
179 pi.pi_width = width; in pci_host_write_config()
180 pi.pi_data = data; in pci_host_write_config()
182 (void)ioctl(pcifd, PCIOCWRITE, &pi); /* XXX */ in pci_host_write_config()
187 passthru_add_msicap(struct pci_devinst *pi, int msgnum, int nextptr) in passthru_add_msicap() argument
204 pci_set_cfgdata8(pi, capoff + i, capdata[i]); in passthru_add_msicap()
216 struct pci_devinst *pi; in cfginitmsi() local
220 pi = sc->psc_pi; in cfginitmsi()
246 pci_set_cfgdata32(pi, capptr, u32); in cfginitmsi()
262 pci_set_cfgdata32(pi, capptr, u32); in cfginitmsi()
274 pi->pi_msix.pba_bar = in cfginitmsi()
276 pi->pi_msix.pba_offset = in cfginitmsi()
278 pi->pi_msix.table_bar = in cfginitmsi()
280 pi->pi_msix.table_offset = in cfginitmsi()
282 pi->pi_msix.table_count = MSIX_TABLE_COUNT(msixcap.msgctrl); in cfginitmsi()
283 pi->pi_msix.pba_size = PBA_SIZE(pi->pi_msix.table_count); in cfginitmsi()
286 table_size = pi->pi_msix.table_count * MSIX_TABLE_ENTRY_SIZE; in cfginitmsi()
287 pi->pi_msix.table = calloc(1, table_size); in cfginitmsi()
290 for (i = 0; i < pi->pi_msix.table_count; i++) { in cfginitmsi()
291 pi->pi_msix.table[i].vector_control |= in cfginitmsi()
305 msiptr = passthru_add_msicap(pi, 1, origptr); in cfginitmsi()
307 sc->psc_msi.msgctrl = pci_get_cfgdata16(pi, msiptr + 2); in cfginitmsi()
309 pci_set_cfgdata8(pi, PCIR_CAP_PTR, msiptr); in cfginitmsi()
323 struct pci_devinst *pi; in msix_table_read() local
334 pi = sc->psc_pi; in msix_table_read()
336 table_offset = pi->pi_msix.table_offset; in msix_table_read()
337 table_count = pi->pi_msix.table_count; in msix_table_read()
342 src8 = (uint8_t *)(pi->pi_msix.mapped_addr + offset); in msix_table_read()
346 src16 = (uint16_t *)(pi->pi_msix.mapped_addr + offset); in msix_table_read()
350 src32 = (uint32_t *)(pi->pi_msix.mapped_addr + offset); in msix_table_read()
354 src64 = (uint64_t *)(pi->pi_msix.mapped_addr + offset); in msix_table_read()
367 entry = &pi->pi_msix.table[index]; in msix_table_read()
398 struct pci_devinst *pi; in msix_table_write() local
408 pi = sc->psc_pi; in msix_table_write()
410 table_offset = pi->pi_msix.table_offset; in msix_table_write()
411 table_count = pi->pi_msix.table_count; in msix_table_write()
416 dest8 = (uint8_t *)(pi->pi_msix.mapped_addr + offset); in msix_table_write()
420 dest16 = (uint16_t *)(pi->pi_msix.mapped_addr + offset); in msix_table_write()
424 dest32 = (uint32_t *)(pi->pi_msix.mapped_addr + offset); in msix_table_write()
428 dest64 = (uint64_t *)(pi->pi_msix.mapped_addr + offset); in msix_table_write()
439 entry = &pi->pi_msix.table[index]; in msix_table_write()
450 if (pi->pi_msix.enabled) { in msix_table_write()
465 struct pci_devinst *pi = sc->psc_pi; in init_msix_table() local
470 assert(pci_msix_table_bar(pi) >= 0 && pci_msix_pba_bar(pi) >= 0); in init_msix_table()
487 pbm.pbm_reg = PCIR_BAR(pi->pi_msix.table_bar); in init_msix_table()
495 pi->pi_msix.mapped_addr = (uint8_t *)(uintptr_t)pbm.pbm_map_base; in init_msix_table()
496 pi->pi_msix.mapped_size = pbm.pbm_map_length; in init_msix_table()
498 table_offset = rounddown2(pi->pi_msix.table_offset, 4096); in init_msix_table()
500 table_size = pi->pi_msix.table_offset - table_offset; in init_msix_table()
501 table_size += pi->pi_msix.table_count * MSIX_TABLE_ENTRY_SIZE; in init_msix_table()
510 if (mprotect(pi->pi_msix.mapped_addr, table_offset, in init_msix_table()
513 if (table_offset + table_size != pi->pi_msix.mapped_size) in init_msix_table()
515 pi->pi_msix.mapped_addr + table_offset + table_size, in init_msix_table()
516 pi->pi_msix.mapped_size - (table_offset + table_size), in init_msix_table()
527 struct pci_devinst *pi; in cfginitbar() local
532 pi = sc->psc_pi; in cfginitbar()
578 error = pci_emul_alloc_bar(pi, i, bartype, size); in cfginitbar()
591 pi->pi_bar[i].lobits = lobits; in cfginitbar()
606 cfginit(struct pci_devinst *pi, int bus, int slot, int func) in cfginit() argument
614 sc = pi->pi_arg; in cfginit()
626 cmd = pci_get_cfgdata16(pi, PCIR_COMMAND); in cfginit()
627 intline = pci_get_cfgdata8(pi, PCIR_INTLINE); in cfginit()
628 intpin = pci_get_cfgdata8(pi, PCIR_INTPIN); in cfginit()
630 pci_set_cfgdata32(pi, i, in cfginit()
633 pci_set_cfgdata16(pi, PCIR_COMMAND, cmd); in cfginit()
634 pci_set_cfgdata8(pi, PCIR_INTLINE, intline); in cfginit()
635 pci_set_cfgdata8(pi, PCIR_INTPIN, intpin); in cfginit()
649 if (pci_msix_table_bar(pi) >= 0) { in cfginit()
853 passthru_init(struct pci_devinst *pi, nvlist_t *nvl) in passthru_init() argument
864 memflags = vm_get_memflags(pi->pi_vmctx); in passthru_init()
893 if (vm_assign_pptdev(pi->pi_vmctx, bus, slot, func) != 0) { in passthru_init()
901 pi->pi_arg = sc; in passthru_init()
902 sc->psc_pi = pi; in passthru_init()
905 if ((error = cfginit(pi, bus, slot, func)) != 0) in passthru_init()
925 if (devp->probe(pi) == 0) { in passthru_init()
932 error = dev->init(pi, nvl); in passthru_init()
941 dev->deinit(pi); in passthru_init()
943 vm_unassign_pptdev(pi->pi_vmctx, bus, slot, func); in passthru_init()
976 struct pci_devinst *pi __unused, int coff, int bytes, uint32_t *rv) in passthru_cfgread_default()
993 pci_get_cfgdata16(pi, PCIR_COMMAND); in passthru_cfgread_default()
1005 struct pci_devinst *pi __unused, int coff __unused, int bytes __unused, in passthru_cfgread_emulate()
1012 passthru_cfgread(struct pci_devinst *pi, int coff, int bytes, uint32_t *rv) in passthru_cfgread() argument
1016 sc = pi->pi_arg; in passthru_cfgread()
1019 return (sc->psc_pcir_rhandler[coff](sc, pi, coff, bytes, rv)); in passthru_cfgread()
1021 return (passthru_cfgread_default(sc, pi, coff, bytes, rv)); in passthru_cfgread()
1025 passthru_cfgwrite_default(struct passthru_softc *sc, struct pci_devinst *pi, in passthru_cfgwrite_default() argument
1035 pci_emul_capwrite(pi, coff, bytes, val, sc->psc_msi.capoff, in passthru_cfgwrite_default()
1037 error = vm_setup_pptdev_msi(pi->pi_vmctx, sc->psc_sel.pc_bus, in passthru_cfgwrite_default()
1039 pi->pi_msi.addr, pi->pi_msi.msg_data, in passthru_cfgwrite_default()
1040 pi->pi_msi.maxmsgnum); in passthru_cfgwrite_default()
1047 pci_emul_capwrite(pi, coff, bytes, val, sc->psc_msix.capoff, in passthru_cfgwrite_default()
1049 if (pi->pi_msix.enabled) { in passthru_cfgwrite_default()
1050 msix_table_entries = pi->pi_msix.table_count; in passthru_cfgwrite_default()
1052 error = vm_setup_pptdev_msix(pi->pi_vmctx, in passthru_cfgwrite_default()
1055 pi->pi_msix.table[i].addr, in passthru_cfgwrite_default()
1056 pi->pi_msix.table[i].msg_data, in passthru_cfgwrite_default()
1057 pi->pi_msix.table[i].vector_control); in passthru_cfgwrite_default()
1063 error = vm_disable_pptdev_msix(pi->pi_vmctx, in passthru_cfgwrite_default()
1084 cmd_old = pci_get_cfgdata16(pi, PCIR_COMMAND); in passthru_cfgwrite_default()
1085 pci_set_cfgdata16(pi, PCIR_COMMAND, val & 0xffff); in passthru_cfgwrite_default()
1086 pci_emul_cmd_changed(pi, cmd_old); in passthru_cfgwrite_default()
1097 struct pci_devinst *pi __unused, int coff __unused, int bytes __unused, in passthru_cfgwrite_emulate()
1104 passthru_cfgwrite(struct pci_devinst *pi, int coff, int bytes, uint32_t val) in passthru_cfgwrite() argument
1108 sc = pi->pi_arg; in passthru_cfgwrite()
1111 return (sc->psc_pcir_whandler[coff](sc, pi, coff, bytes, val)); in passthru_cfgwrite()
1113 return (passthru_cfgwrite_default(sc, pi, coff, bytes, val)); in passthru_cfgwrite()
1117 passthru_write(struct pci_devinst *pi, int baridx, uint64_t offset, int size, in passthru_write() argument
1123 sc = pi->pi_arg; in passthru_write()
1125 if (baridx == pci_msix_table_bar(pi)) { in passthru_write()
1128 assert(pi->pi_bar[baridx].type == PCIBAR_IO); in passthru_write()
1145 passthru_read(struct pci_devinst *pi, int baridx, uint64_t offset, int size) in passthru_read() argument
1151 sc = pi->pi_arg; in passthru_read()
1153 if (baridx == pci_msix_table_bar(pi)) { in passthru_read()
1156 assert(pi->pi_bar[baridx].type == PCIBAR_IO); in passthru_read()
1176 passthru_msix_addr(struct pci_devinst *pi, int baridx, int enabled, in passthru_msix_addr() argument
1183 sc = pi->pi_arg; in passthru_msix_addr()
1184 table_offset = rounddown2(pi->pi_msix.table_offset, 4096); in passthru_msix_addr()
1187 if (vm_unmap_pptdev_mmio(pi->pi_vmctx, in passthru_msix_addr()
1194 if (vm_map_pptdev_mmio(pi->pi_vmctx, sc->psc_sel.pc_bus, in passthru_msix_addr()
1202 table_size = pi->pi_msix.table_offset - table_offset; in passthru_msix_addr()
1203 table_size += pi->pi_msix.table_count * MSIX_TABLE_ENTRY_SIZE; in passthru_msix_addr()
1205 remaining = pi->pi_bar[baridx].size - table_offset - table_size; in passthru_msix_addr()
1209 if (vm_unmap_pptdev_mmio(pi->pi_vmctx, in passthru_msix_addr()
1216 if (vm_map_pptdev_mmio(pi->pi_vmctx, sc->psc_sel.pc_bus, in passthru_msix_addr()
1228 passthru_mmio_addr(struct pci_devinst *pi, int baridx, int enabled, in passthru_mmio_addr() argument
1233 sc = pi->pi_arg; in passthru_mmio_addr()
1235 if (vm_unmap_pptdev_mmio(pi->pi_vmctx, sc->psc_sel.pc_bus, in passthru_mmio_addr()
1241 if (vm_map_pptdev_mmio(pi->pi_vmctx, sc->psc_sel.pc_bus, in passthru_mmio_addr()
1251 passthru_addr_rom(struct pci_devinst *const pi, const int idx, in passthru_addr_rom() argument
1254 const uint64_t addr = pi->pi_bar[idx].addr; in passthru_addr_rom()
1255 const uint64_t size = pi->pi_bar[idx].size; in passthru_addr_rom()
1258 if (vm_munmap_memseg(pi->pi_vmctx, addr, size) != 0) { in passthru_addr_rom()
1264 if (vm_mmap_memseg(pi->pi_vmctx, addr, VM_PCIROM, in passthru_addr_rom()
1265 pi->pi_romoffset, size, PROT_READ | PROT_EXEC) != 0) { in passthru_addr_rom()
1273 passthru_addr(struct pci_devinst *pi, int baridx, int enabled, uint64_t address) in passthru_addr() argument
1275 switch (pi->pi_bar[baridx].type) { in passthru_addr()
1280 passthru_addr_rom(pi, baridx, enabled); in passthru_addr()
1284 if (baridx == pci_msix_table_bar(pi)) in passthru_addr()
1285 passthru_msix_addr(pi, baridx, enabled, address); in passthru_addr()
1287 passthru_mmio_addr(pi, baridx, enabled, address); in passthru_addr()
1291 pi->pi_bar[baridx].type); in passthru_addr()