1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
63  * Per-vCPU cache. Since most accesses from a vCPU will be to
75 	if (a->mr_end < b->mr_base)  in mmio_rb_range_compare()
76 		return (-1);  in mmio_rb_range_compare()
77 	else if (a->mr_base > b->mr_end)  in mmio_rb_range_compare()
79 	return (0);  in mmio_rb_range_compare()
94 		return (0);  in mmio_rb_lookup()
111 		       new->mr_base, new->mr_end,  in mmio_rb_add()
112 		       overlap->mr_base, overlap->mr_end,  in mmio_rb_add()
113 		       new->mr_param.name, overlap->mr_param.name);  in mmio_rb_add()
119 	return (0);  in mmio_rb_add()
122 #if 0
131 		printf(" %lx:%lx, %s\n", np->mr_base, np->mr_end,
132 		       np->mr_param.name);
135 	assert(perror == 0);
141 typedef int (mem_cb_t)(struct vcpu *vcpu, uint64_t gpa, struct mem_range *mr,
145 mem_read(struct vcpu *vcpu, uint64_t gpa, uint64_t *rval, int size, void *arg)  in mem_read()  argument
150 	error = (*mr->handler)(vcpu, MEM_F_READ, gpa, size, rval, mr->arg1,  in mem_read()
151 	    mr->arg2);  in mem_read()
156 mem_write(struct vcpu *vcpu, uint64_t gpa, uint64_t wval, int size, void *arg)  in mem_write()  argument
161 	error = (*mr->handler)(vcpu, MEM_F_WRITE, gpa, size, &wval, mr->arg1,  in mem_write()
162 	    mr->arg2);  in mem_write()
175 	 * First check the per-vCPU cache  in access_memory()
178 	    paddr >= mmio_hint[vcpuid]->mr_base &&  in access_memory()
179 	    paddr <= mmio_hint[vcpuid]->mr_end) {  in access_memory()
185 		if (mmio_rb_lookup(&mmio_rb_root, paddr, &entry) == 0) {  in access_memory()
186 			/* Update the per-vCPU cache */  in access_memory()
190 			assert(perror == 0);  in access_memory()
208 	immutable = (entry->mr_param.flags & MEM_F_IMMUTABLE);  in access_memory()
211 		assert(perror == 0);  in access_memory()
214 	err = cb(vcpu, paddr, &entry->mr_param, arg);  in access_memory()
218 		assert(perror == 0);  in access_memory()
236 	return (vmm_emulate_instruction(vcpu, paddr, ema->vie, ema->paging,  in emulate_mem_cb()
263 	return (mr->handler(vcpu, rma->operation, paddr, rma->size,  in rw_mem_cb()
264 	    rma->val, mr->arg1, mr->arg2));  in rw_mem_cb()
268 read_mem(struct vcpu *vcpu, uint64_t gpa, uint64_t *rval, int size)  in read_mem()  argument
275 	return (access_memory(vcpu, gpa, rw_mem_cb, &rma));  in read_mem()
279 write_mem(struct vcpu *vcpu, uint64_t gpa, uint64_t wval, int size)  in write_mem()  argument
286 	return (access_memory(vcpu, gpa, rw_mem_cb, &rma));  in write_mem()
295 	err = 0;  in register_mem_int()
303 		mrp->mr_param = *memp;  in register_mem_int()
304 		mrp->mr_base = memp->base;  in register_mem_int()
305 		mrp->mr_end = memp->base + memp->size - 1;  in register_mem_int()
307 		if (mmio_rb_lookup(rbt, memp->base, &entry) != 0)  in register_mem_int()
310 		assert(perror == 0);  in register_mem_int()
340 	err = mmio_rb_lookup(&mmio_rb_root, memp->base, &entry);  in unregister_mem()
341 	if (err == 0) {  in unregister_mem()
342 		mr = &entry->mr_param;  in unregister_mem()
343 		assert(mr->name == memp->name);  in unregister_mem()
344 		assert(mr->base == memp->base && mr->size == memp->size);  in unregister_mem()
345 		assert((mr->flags & MEM_F_IMMUTABLE) == 0);  in unregister_mem()
348 		/* flush Per-vCPU cache */  in unregister_mem()
349 		for (i = 0; i < mmio_ncpu; i++) {  in unregister_mem()
355 	assert(perror == 0);  in unregister_mem()