Lines Matching +full:0 +full:x304

41 /// OpRegion Mailbox 0 Header structure. The OpRegion Header is used to
43 /// Offset 0x0, Size 0x100
46 int8_t sign[0x10]; ///< Offset 0x00 OpRegion Signature
47 uint32_t size; ///< Offset 0x10 OpRegion Size
48 uint32_t over; ///< Offset 0x14 OpRegion Structure Version
49 uint8_t sver[0x20]; ///< Offset 0x18 System BIOS Build Version
50 uint8_t vver[0x10]; ///< Offset 0x38 Video BIOS Build Version
51 uint8_t gver[0x10]; ///< Offset 0x48 Graphic Driver Build Version
52 uint32_t mbox; ///< Offset 0x58 Supported Mailboxes
53 uint32_t dmod; ///< Offset 0x5C Driver Model
54 uint32_t pcon; ///< Offset 0x60 Platform Configuration
55 int16_t dver[0x10]; ///< Offset 0x64 GOP Version
56 uint8_t rm01[0x7C]; ///< Offset 0x84 Reserved Must be zero
61 /// Offset 0x100, Size 0x100
64 uint32_t drdy; ///< Offset 0x100 Driver Readiness
65 uint32_t csts; ///< Offset 0x104 Status
66 uint32_t cevt; ///< Offset 0x108 Current Event
67 uint8_t rm11[0x14]; ///< Offset 0x10C Reserved Must be Zero
68 uint32_t didl[8]; ///< Offset 0x120 Supported Display Devices ID List
70 cpdl[8]; ///< Offset 0x140 Currently Attached Display Devices List
72 cadl[8]; ///< Offset 0x160 Currently Active Display Devices List
73 uint32_t nadl[8]; ///< Offset 0x180 Next Active Devices List
74 uint32_t aslp; ///< Offset 0x1A0 ASL Sleep Time Out
75 uint32_t tidx; ///< Offset 0x1A4 Toggle Table Index
76 uint32_t chpd; ///< Offset 0x1A8 Current Hotplug Enable Indicator
77 uint32_t clid; ///< Offset 0x1AC Current Lid State Indicator
78 uint32_t cdck; ///< Offset 0x1B0 Current Docking State Indicator
79 uint32_t sxsw; ///< Offset 0x1B4 Display Switch Notification on Sx
81 uint32_t evts; ///< Offset 0x1B8 Events supported by ASL
82 uint32_t cnot; ///< Offset 0x1BC Current OS Notification
83 uint32_t NRDY; ///< Offset 0x1C0 Driver Status
84 uint8_t did2[0x1C]; ///< Offset 0x1C4 Extended Supported Devices ID
87 cpd2[0x1C]; ///< Offset 0x1E0 Extended Attached Display Devices List
88 uint8_t rm12[4]; ///< Offset 0x1FC - 0x1FF Reserved Must be zero
93 /// Offset 0x200, Size 0x100
96 uint32_t scic; ///< Offset 0x200 Software SCI Command / Status / Data
97 uint32_t parm; ///< Offset 0x204 Software SCI Parameters
98 uint32_t dslp; ///< Offset 0x208 Driver Sleep Time Out
99 uint8_t rm21[0xF4]; ///< Offset 0x20C - 0x2FF Reserved Must be zero
104 /// Offset 0x300, Size 0x100
107 uint32_t ardy; ///< Offset 0x300 Driver Readiness
108 uint32_t aslc; ///< Offset 0x304 ASLE Interrupt Command / Status
109 uint32_t tche; ///< Offset 0x308 Technology Enabled Indicator
110 uint32_t alsi; ///< Offset 0x30C Current ALS Luminance Reading
111 uint32_t bclp; ///< Offset 0x310 Requested Backlight Brightness
112 uint32_t pfit; ///< Offset 0x314 Panel Fitting State or Request
113 uint32_t cblv; ///< Offset 0x318 Current Brightness Level
114 uint16_t bclm[0x14]; ///< Offset 0x31C Backlight Brightness Levels Duty
116 uint32_t cpfm; ///< Offset 0x344 Current Panel Fitting Mode
117 uint32_t epfm; ///< Offset 0x348 Enabled Panel Fitting Modes
118 uint8_t plut[0x4A]; ///< Offset 0x34C Panel Look Up Table & Identifier
119 uint32_t pfmb; ///< Offset 0x396 PWM Frequency and Minimum Brightness
120 uint32_t ccdv; ///< Offset 0x39A Color Correction Default Values
121 uint32_t pcft; ///< Offset 0x39E Power Conservation Features
122 uint32_t srot; ///< Offset 0x3A2 Supported Rotation Angles
123 uint32_t iuer; ///< Offset 0x3A6 Intel Ultrabook(TM) Event Register
124 uint64_t fdss; ///< Offset 0x3AA DSS Buffer address allocated for IFFS
126 uint32_t fdsp; ///< Offset 0x3B2 Size of DSS buffer
127 uint32_t stat; ///< Offset 0x3B6 State Indicator
128 uint64_t rvda; ///< Offset 0x3BA Absolute/Relative Address of Raw VBT
130 uint32_t rvds; ///< Offset 0x3C2 Raw VBT Data Size
131 uint8_t rsvd2[0x3A]; ///< Offset 0x3C6 - 0x3FF Reserved Must be zero.
132 ///< Bug in spec 0x45(69)
137 /// Offset 0x400, Size 0x1800
140 uint8_t rvbt[IGD_OPREGION_VBT_SIZE_6K]; ///< Offset 0x400 - 0x1BFF Raw
146 /// data sync Offset 0x1C00, Size 0x400
149 uint32_t phed; ///< Offset 0x1C00 Panel Header
150 uint8_t bddc[0x100]; ///< Offset 0x1C04 Panel EDID (DDC data)
151 uint8_t rm51[0x2FC]; ///< Offset 0x1D04 - 0x1FFF Reserved Must be zero
159 header; ///< OpRegion header (Offset 0x0, Size 0x100)
161 ///< (Offset 0x100, Size 0x100)
163 ///< (Offset 0x200, Size 0x100)
165 mbox3; ///< Mailbox 3: BIOS to Driver Notification (Offset 0x300,
166 ///< Size 0x100)
168 ///< (Offset 0x400, Size 0x1800)
171 ///< 0x1C00, Size 0x400)