Lines Matching +full:fault +full:- +full:log +full:- +full:enable
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2013-2015 The FreeBSD Foundation
39 #define DMAR_ROOT_R1_CTP_MASK 0xfffffffffffff000 /* Mask for Context-Entry
49 #define DMAR_CTX1_FPD 2 /* Fault Processing Disable */
54 #define DMAR_CTX1_T_PASS 8 /* Pass-Through */
57 #define DMAR_CTX2_AW_2LVL 0 /* 2-level page tables */
58 #define DMAR_CTX2_AW_3LVL 1 /* 3-level page tables */
59 #define DMAR_CTX2_AW_4LVL 2 /* 4-level page tables */
60 #define DMAR_CTX2_AW_5LVL 3 /* 5-level page tables */
61 #define DMAR_CTX2_AW_6LVL 4 /* 6-level page tables */
78 #define DMAR_IRTE2_SVT_NONE (0ULL << (82 - 64))
79 #define DMAR_IRTE2_SVT_RID (1ULL << (82 - 64))
80 #define DMAR_IRTE2_SVT_BUS (2ULL << (82 - 64))
81 /* Source-id Qualifier */
82 #define DMAR_IRTE2_SQ_RID (0ULL << (80 - 64))
83 #define DMAR_IRTE2_SQ_RID_N2 (1ULL << (80 - 64))
84 #define DMAR_IRTE2_SQ_RID_N21 (2ULL << (80 - 64))
85 #define DMAR_IRTE2_SQ_RID_N210 (3ULL << (80 - 64))
111 #define DMAR_IRTE1_FPD (1ULL << 1) /* Fault Processing Disable */
128 /* Num of Fault-recording regs */
130 #define DMAR_CAP_SPS(x) ((u_int)(((x) >> 34) & 0xf)) /* Super-Page Support */
136 /* Fault-recording reg offset */
138 #define DMAR_CAP_ZLR (1 << 22) /* Zero-length reads */
149 #define DMAR_CAP_PHMR (1 << 6) /* Protected High-mem Region */
150 #define DMAR_CAP_PLMR (1 << 5) /* Protected Low-mem Region */
151 #define DMAR_CAP_RWBF (1 << 4) /* Required Write-Buffer Flushing */
152 #define DMAR_CAP_AFL (1 << 3) /* Advanced Fault Logging */
182 #define DMAR_GCMD_TE (1U << 31) /* Translation Enable */
184 #define DMAR_GCMD_SFL (1 << 29) /* Set Fault Log */
185 #define DMAR_GCMD_EAFL (1 << 28) /* Enable Advanced Fault Logging */
187 #define DMAR_GCMD_QIE (1 << 26) /* Queued Invalidation Enable */
188 #define DMAR_GCMD_IRE (1 << 25) /* Interrupt Remapping Enable */
194 #define DMAR_GSTS_TES (1U << 31) /* Translation Enable Status */
196 #define DMAR_GSTS_FLS (1 << 29) /* Fault Log Status */
197 #define DMAR_GSTS_AFLS (1 << 28) /* Advanced Fault Logging Status */
199 #define DMAR_GSTS_QIES (1 << 26) /* Queued Invalidation Enable Status */
200 #define DMAR_GSTS_IRES (1 << 25) /* Interrupt Remapping Enable Status */
206 /* Root-Entry Table Address register */
213 #define DMAR_CCMD_ICC (1ULL << 63) /* Invalidate Context-Cache */
226 #define DMAR_CCMD_SID(x) (((x) & 0xffff) << 16) /* Source-ID */
227 #define DMAR_CCMD_DID(x) ((x) & 0xffff) /* Domain-ID */
242 #define DMAR_IOTLB_IIRG_DOM (0x2ULL << 60) /* Domain-selective */
243 #define DMAR_IOTLB_IIRG_PAGE (0x3ULL << 60) /* Page-selective */
248 #define DMAR_IOTLB_IAIG_DOM (0x2ULL << 57) /* Domain-selective */
249 #define DMAR_IOTLB_IAIG_PAGE (0x3ULL << 57) /* Page-selective */
254 /* Fault Status register */
256 #define DMAR_FSTS_FRI(x) (((x) >> 8) & 0xff) /* Fault Record Index */
257 #define DMAR_FSTS_ITE (1 << 6) /* Invalidation Time-out */
260 #define DMAR_FSTS_APF (1 << 3) /* Advanced Pending Fault */
261 #define DMAR_FSTS_AFO (1 << 2) /* Advanced Fault Overflow */
262 #define DMAR_FSTS_PPF (1 << 1) /* Primary Pending Fault */
263 #define DMAR_FSTS_PFO 1 /* Fault Overflow */
265 /* Fault Event Control register */
270 /* Fault Event Data register */
273 /* Fault Event Address register */
276 /* Fault Event Upper Address register */
279 /* Advanced Fault Log register */
282 /* Fault Recording Register, also usable for Advanced Fault Log records */
283 #define DMAR_FRCD2_F (1ULL << 63) /* Fault */
289 #define DMAR_FRCD2_FR(x) ((int)((x >> 32) & 0xff)) /* Fault Reason */
291 #define DMAR_FRCS1_FI_MASK 0xffffffffff000 /* Fault Info, Address Mask */
293 /* Protected Memory Enable register */
295 #define DMAR_PMEN_EPM (1U << 31) /* Enable Protected Memory */
298 /* Protected Low-Memory Base register */
301 /* Protected Low-Memory Limit register */
304 /* Protected High-Memory Base register */
307 /* Protected High-Memory Limit register */
316 /* Context-cache Invalidate Descriptor */
334 /* Device-TLB Invalidate Descriptor */
339 #define DMAR_IQ_DESCR_IEC_IDX (1 << 4) /* Index-Selective Invalidation */
353 /* PASID-Cache Invalidate Descriptor */
356 /* Extended Device-TLB Invalidate Descriptor */
397 Enable */