Lines Matching +full:low +full:- +full:vt
1 /*-
65 uint64_t low, uint16_t rid);
77 if (unit == NULL || !unit->ir_enabled) { in dmar_alloc_msi_intr()
79 cookies[i] = -1; in dmar_alloc_msi_intr()
83 error = vmem_alloc(unit->irtids, count, M_FIRSTFIT | M_NOWAIT, in dmar_alloc_msi_intr()
101 uint64_t low; in dmar_map_msi_intr() local
110 * See VT-d specification, 5.1.6 Remapping Hardware - in dmar_map_msi_intr()
121 if (unit == NULL || !unit->ir_enabled || cookie == -1) in dmar_map_msi_intr()
124 low = (DMAR_X2APIC(unit) ? DMAR_IRTE1_DST_x2APIC(cpu) : in dmar_map_msi_intr()
128 dmar_ir_program_irte(unit, cookie, low, rid); in dmar_map_msi_intr()
132 * See VT-d specification, 5.1.5.2 MSI and MSI-X in dmar_map_msi_intr()
147 if (cookie == -1) in dmar_unmap_msi_intr()
159 uint64_t low, iorte; in dmar_map_ioapic_intr() local
165 if (unit == NULL || !unit->ir_enabled) { in dmar_map_ioapic_intr()
166 *cookie = -1; in dmar_map_ioapic_intr()
170 error = vmem_alloc(unit->irtids, 1, M_FIRSTFIT | M_NOWAIT, &vmem_res); in dmar_map_ioapic_intr()
177 low = 0; in dmar_map_ioapic_intr()
180 low |= DMAR_IRTE1_DLM_ExtINT; in dmar_map_ioapic_intr()
183 low |= DMAR_IRTE1_DLM_NMI; in dmar_map_ioapic_intr()
186 low |= DMAR_IRTE1_DLM_SMI; in dmar_map_ioapic_intr()
190 low |= DMAR_IRTE1_DLM_FM | DMAR_IRTE1_V(vector); in dmar_map_ioapic_intr()
193 low |= (DMAR_X2APIC(unit) ? DMAR_IRTE1_DST_x2APIC(cpu) : in dmar_map_ioapic_intr()
197 dmar_ir_program_irte(unit, idx, low, rid); in dmar_map_ioapic_intr()
201 * See VT-d specification, 5.1.5.1 I/OxAPIC in dmar_map_ioapic_intr()
223 if (idx == -1) in dmar_unmap_ioapic_intr()
225 *cookie = -1; in dmar_unmap_ioapic_intr()
227 KASSERT(unit != NULL && unit->ir_enabled, in dmar_unmap_ioapic_intr()
263 dmar_ir_program_irte(struct dmar_unit *unit, u_int idx, uint64_t low, in dmar_ir_program_irte() argument
269 KASSERT(idx < unit->irte_cnt, in dmar_ir_program_irte()
270 ("bad cookie %d %d", idx, unit->irte_cnt)); in dmar_ir_program_irte()
271 irte = &(unit->irt[idx]); in dmar_ir_program_irte()
275 device_printf(unit->iommu.dev, in dmar_ir_program_irte()
276 "programming irte[%d] rid %#x high %#jx low %#jx\n", in dmar_ir_program_irte()
277 idx, rid, (uintmax_t)high, (uintmax_t)low); in dmar_ir_program_irte()
280 if ((irte->irte1 & DMAR_IRTE1_P) != 0) { in dmar_ir_program_irte()
283 * is to remap the interrupt for balancing. Only low in dmar_ir_program_irte()
287 KASSERT(irte->irte2 == high, in dmar_ir_program_irte()
288 ("irte2 mismatch, %jx %jx", (uintmax_t)irte->irte2, in dmar_ir_program_irte()
290 dmar_pte_update(&irte->irte1, low); in dmar_ir_program_irte()
292 dmar_pte_store(&irte->irte2, high); in dmar_ir_program_irte()
293 dmar_pte_store(&irte->irte1, low); in dmar_ir_program_irte()
305 KASSERT(unit != NULL && unit->ir_enabled, in dmar_ir_free_irte()
307 KASSERT(cookie < unit->irte_cnt, in dmar_ir_free_irte()
308 ("bad cookie %u %u", cookie, unit->irte_cnt)); in dmar_ir_free_irte()
309 irte = &(unit->irt[cookie]); in dmar_ir_free_irte()
310 dmar_pte_clear(&irte->irte1); in dmar_ir_free_irte()
311 dmar_pte_clear(&irte->irte2); in dmar_ir_free_irte()
315 vmem_free(unit->irtids, cookie, 1); in dmar_ir_free_irte()
322 SYSCTL_ADD_INT(&unit->iommu.sysctl_ctx, in dmar_init_irt()
323 SYSCTL_CHILDREN(device_get_sysctl_tree(unit->iommu.dev)), in dmar_init_irt()
324 OID_AUTO, "ir", CTLFLAG_RD, &unit->ir_enabled, 0, in dmar_init_irt()
326 if ((unit->hw_ecap & DMAR_ECAP_IR) == 0) in dmar_init_irt()
328 unit->ir_enabled = 1; in dmar_init_irt()
329 TUNABLE_INT_FETCH("hw.dmar.ir", &unit->ir_enabled); in dmar_init_irt()
330 TUNABLE_INT_FETCH("hw.iommu.ir", &unit->ir_enabled); in dmar_init_irt()
331 if (!unit->ir_enabled) in dmar_init_irt()
333 if (!unit->qi_enabled) { in dmar_init_irt()
334 unit->ir_enabled = 0; in dmar_init_irt()
336 device_printf(unit->iommu.dev, in dmar_init_irt()
340 unit->irte_cnt = roundup_pow_of_two(num_io_irqs); in dmar_init_irt()
341 if (unit->memdomain == -1) { in dmar_init_irt()
342 unit->irt = kmem_alloc_contig( in dmar_init_irt()
343 unit->irte_cnt * sizeof(dmar_irte_t), in dmar_init_irt()
348 unit->irt = kmem_alloc_contig_domainset( in dmar_init_irt()
349 DOMAINSET_PREF(unit->memdomain), in dmar_init_irt()
350 unit->irte_cnt * sizeof(dmar_irte_t), in dmar_init_irt()
355 if (unit->irt == NULL) in dmar_init_irt()
357 unit->irt_phys = pmap_kextract((vm_offset_t)unit->irt); in dmar_init_irt()
358 unit->irtids = vmem_create("dmarirt", 0, unit->irte_cnt, 1, 0, in dmar_init_irt()
382 unit->ir_enabled = 0; in dmar_fini_irt()
383 if (unit->irt != NULL) { in dmar_fini_irt()
386 vmem_destroy(unit->irtids); in dmar_fini_irt()
387 kmem_free(unit->irt, unit->irte_cnt * sizeof(dmar_irte_t)); in dmar_fini_irt()