68 #include <dev/iommu/iommu.h>
69 #include <x86/iommu/amd_reg.h>
70 #include <x86/iommu/x86_iommu.h>
71 #include <x86/iommu/amd_iommu.h>
76  * All enumerated AMD IOMMU units.
241 	if (bus_get_domain(sc->iommu.dev, &dom) == 0)  in amdiommu_create_dev_tbl()
315 	msi_count = pci_msi_count(sc->iommu.dev);  in amdiommu_setup_intr()
316 	msix_count = pci_msix_count(sc->iommu.dev);  in amdiommu_setup_intr()
318 		device_printf(sc->iommu.dev, "needs MSI-class intr\n");  in amdiommu_setup_intr()
326 	 * one IOMMU unit per function, and uses MSI.  in amdiommu_setup_intr()
329 		sc->msix_table = bus_alloc_resource_any(sc->iommu.dev,  in amdiommu_setup_intr()
336 			sc->msix_pba = bus_alloc_resource_any(sc->iommu.dev,  in amdiommu_setup_intr()
340 				bus_release_resource(sc->iommu.dev,  in amdiommu_setup_intr()
351 		error = pci_alloc_msix(sc->iommu.dev, &msix_count);  in amdiommu_setup_intr()
356 		error = pci_alloc_msi(sc->iommu.dev, &msi_count);  in amdiommu_setup_intr()
361 		device_printf(sc->iommu.dev,  in amdiommu_setup_intr()
367 	 * XXXKIB Spec states that MISC0.MsiNum must be zero for IOMMU  in amdiommu_setup_intr()
375 		sc->irq_cmdev_rid += pci_read_config(sc->iommu.dev,  in amdiommu_setup_intr()
380 	sc->irq_cmdev = bus_alloc_resource_any(sc->iommu.dev, SYS_RES_IRQ,  in amdiommu_setup_intr()
383 		device_printf(sc->iommu.dev,  in amdiommu_setup_intr()
387 	error = bus_setup_intr(sc->iommu.dev, sc->irq_cmdev,  in amdiommu_setup_intr()
391 		device_printf(sc->iommu.dev,  in amdiommu_setup_intr()
395 	bus_describe_intr(sc->iommu.dev, sc->irq_cmdev, sc->irq_cmdev_cookie,  in amdiommu_setup_intr()
451 	sc->iommu.unit = device_get_unit(dev);  in amdiommu_attach()
452 	sc->iommu.dev = dev;  in amdiommu_attach()
475 	mtx_init(&sc->iommu.lock, "amdihw", NULL, MTX_DEF);  in amdiommu_attach()
476 	sc->domids = new_unrhdr(0, 0xffff, &sc->iommu.lock);  in amdiommu_attach()
478 	sysctl_ctx_init(&sc->iommu.sysctl_ctx);  in amdiommu_attach()
542 	 * Unlike DMAR, AMD IOMMU does not process command queue  in amdiommu_attach()
543 	 * unless IOMMU is enabled.  But since non-present devtab  in amdiommu_attach()
544 	 * entry makes IOMMU ignore transactions from corresponding  in amdiommu_attach()
545 	 * initiator, de-facto IOMMU operations are disabled for the  in amdiommu_attach()
561 	iommu_fini_busdma(&sc->iommu);  in amdiommu_attach()
575 	sysctl_ctx_free(&sc->iommu.sysctl_ctx);  in amdiommu_attach()
577 	mtx_destroy(&sc->iommu.lock);  in amdiommu_attach()
843 	error = device_get_prop(dev, device_get_nameunit(unit->iommu.dev),  in amdiommu_dev_fetch_flagsp()
847 		device_set_prop(dev, device_get_nameunit(unit->iommu.dev),  in amdiommu_dev_fetch_flagsp()
924 	iommu_device_set_iommu_prop(dev, unit->iommu.dev);  in amdiommu_find_unit()
938 			    unit->iommu.unit, ifu.rid_real, ifu.dte, ifu.edte);  in amdiommu_find_unit()
973 		iommu_device_set_iommu_prop(apic_dev, unit->iommu.dev);  in amdiommu_find_unit_for_ioapic()
990 		    unit->iommu.unit, apic_id, ifu.rid_real, ifu.dte,  in amdiommu_find_unit_for_ioapic()
1031 	iommu_device_set_iommu_prop(hpet, unit->iommu.dev);  in amdiommu_find_unit_for_hpet()
1041 		    unit->iommu.unit, hpet_no, ifu.rid_real, ifu.dte,  in amdiommu_find_unit_for_hpet()
1064 	return (&unit->iommu);  in amdiommu_find_method()
1070 	struct amdiommu_unit *iommu;  in amdiommu_get_x86_common()  local
1072 	iommu = IOMMU2AMD(unit);  in amdiommu_get_x86_common()
1073 	return (&iommu->x86c);  in amdiommu_get_x86_common()
1140 	    unit->iommu.unit, unit, (uintmax_t)unit->mmio_base,  in amdiommu_print_one()