129 		KASSERT((entry->flags & IOMMU_MAP_ENTRY_MAP) != 0,  in amdiommu_domain_unload()
132 		    cansleep ? IOMMU_PGF_WAITOK : 0);  in amdiommu_domain_unload()
133 		KASSERT(error == 0, ("unmap %p error %d", domain, error));  in amdiommu_domain_unload()
159 	KASSERT(domain->ctx_cnt == 0,  in amdiommu_domain_destroy()
161 	KASSERT(domain->refs == 0,  in amdiommu_domain_destroy()
164 	if ((domain->iodom.flags & IOMMU_DOMAIN_GAS_INITED) != 0) {  in amdiommu_domain_destroy()
169 	if ((domain->iodom.flags & IOMMU_DOMAIN_PGTBL_INITED) != 0) {  in amdiommu_domain_destroy()
258 		if (error != 0)  in amdiommu_domain_alloc()
261 		error = iommu_gas_reserve_region(iodom, 0xfee00000,  in amdiommu_domain_alloc()
262 		    0xfeefffff + 1, &iodom->msi_entry);  in amdiommu_domain_alloc()
263 		if (error != 0)  in amdiommu_domain_alloc()
310 	KASSERT(domain->refs > 0,  in amdiommu_ctx_unlink()
374 	KASSERT((ctx->context.flags & IOMMU_CTX_DISABLED) == 0,  in amdiommu_free_ctx_locked()
382 	dtep->v = 0;  in amdiommu_free_ctx_locked()
384 	memset(dtep, 0, sizeof(*dtep));  in amdiommu_free_ctx_locked()
445 	dtep->initpass = (dte & ACPI_IVHD_INIT_PASS) != 0;  in dte_entry_init_one()
446 	dtep->eintpass = (dte & ACPI_IVHD_EINT_PASS) != 0;  in dte_entry_init_one()
447 	dtep->nmipass = (dte & ACPI_IVHD_NMI_PASS) != 0;  in dte_entry_init_one()
449 	dtep->lint0pass = (dte & ACPI_IVHD_LINT0_PASS) != 0;  in dte_entry_init_one()
450 	dtep->lint1pass = (dte & ACPI_IVHD_LINT1_PASS) != 0;  in dte_entry_init_one()
454 		dtep->i = 0;  in dte_entry_init_one()
463 	if ((DOM2IODOM(domain)->flags & IOMMU_DOMAIN_IDMAP) != 0) {  in dte_entry_init_one()
466 		MPASS(domain->pglvl > 0 && domain->pglvl <=  in dte_entry_init_one()
488 	KASSERT(dtep->v == 0,  in dte_entry_init()
495 		for (i = 0; i <= PCI_BUSMAX; i++) {  in dte_entry_init()
523 	    (slot == 0 && func == 0),  in amdiommu_get_ctx_for_dev()
601 	if (error != 0)  in amdiommu_get_ctx()