Lines Matching +full:16 +full:- +full:bits
1 /*-
43 int32_t en_cw; /* control word (16bits) */
44 int32_t en_sw; /* status word (16bits) */
45 int32_t en_tw; /* tag word (16bits) */
48 uint16_t en_opcode; /* opcode last executed (11 bits) */
61 struct fpacc87 sv_ac[8]; /* accumulator contents, 0-7 */
68 uint8_t xmm_bytes[16];
71 /* Contents of the upper 16 bytes of each AVX extended accumulator. */
73 uint8_t ymm_bytes[16];
85 uint16_t en_cw; /* control word (16bits) */
86 uint16_t en_sw; /* status word (16bits) */
87 uint16_t en_tw; /* tag word (16bits) */
88 uint16_t en_opcode; /* opcode last executed (11 bits) */
96 uint32_t en_mxcsr_mask; /* valid bits in mxcsr */
100 uint16_t en_cw; /* control word (16bits) */
101 uint16_t en_sw; /* status word (16bits) */
102 uint8_t en_tw; /* tag word (8bits) */
104 uint16_t en_opcode; /* opcode last executed (11 bits ) */
108 uint32_t en_mxcsr_mask; /* valid bits in mxcsr */
120 } __aligned(16);
135 struct xmmacc sv_xmm[16];
137 } __aligned(16);
150 struct ymmacc sx_ymm[16];
159 struct xmmacc sv_xmm[16];
166 struct ymmacc sx_ymm[16];
175 struct xmmacc sv_xmm[16];
188 * 64-bit precision
193 * If its using an intermediate fpu register, it has 80/64 bits to work
194 * with. If it uses memory, it has 64/53 bits to work with. However,