146 #define WRITE_FIDVID(fid, vid, ctrl)	\  argument
148 	    (((ctrl) << 32) | (1ULL << 16) | ((vid) << 8) | (fid)))
210 	int vid;  member
272 pn7_setfidvid(struct pn_softc *sc, int fid, int vid)  in pn7_setfidvid()  argument
282 	if (fid == cfid && vid == cvid)  in pn7_setfidvid()
288 	ctl |= PN7_CTR_VID(vid);  in pn7_setfidvid()
296 		if (vid != cvid)  in pn7_setfidvid()
323 pn8_write_fidvid(u_int fid, u_int vid, uint64_t ctrl, uint64_t *status)  in pn8_write_fidvid()  argument
328 		WRITE_FIDVID(fid, vid, ctrl);  in pn8_write_fidvid()
335 pn8_setfidvid(struct pn_softc *sc, int fid, int vid)  in pn8_setfidvid()  argument
350 	if (fid == cfid && vid == cvid)  in pn8_setfidvid()
354 	 * Phase 1: Raise core voltage to requested VID if frequency is  in pn8_setfidvid()
357 	while (cvid > vid) {  in pn8_setfidvid()
423 	if (cvid != vid) {  in pn8_setfidvid()
424 		rv = pn8_write_fidvid(cfid, vid, 1ULL, &status);  in pn8_setfidvid()
430 	if (cfid != fid || cvid != vid)  in pn8_setfidvid()
440 	int fid, vid;  in pn_set()  local
456 	vid = sc->powernow_states[i].vid;  in pn_set()
462 		rv = pn7_setfidvid(sc, fid, vid);  in pn_set()
465 		rv = pn8_setfidvid(sc, fid, vid);  in pn_set()
500 		    cvid == sc->powernow_states[i].vid)  in pn_get()
532 		sets[i].volts = sc->vid_to_volts[sc->powernow_states[i].vid];  in pn_settings()
552  * Given a set of pair of fid/vid, and number of performance states,
566 		state.vid = *p++;  in decode_pst()
602 			int vid = sc->powernow_states[i].vid;  in decode_pst()  local
604 			printf("powernow: %2i %8dkHz FID %02x VID %02x\n",  in decode_pst()
608 			    vid);  in decode_pst()
795 			state.vid = ACPI_PN7_CTRL_TO_VID(ctrl);  in pn_decode_acpi()
802 			state.vid = ACPI_PN8_CTRL_TO_VID(ctrl);  in pn_decode_acpi()